add ax88772C AX88772C_eeprom_tools

hc

2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2

 kernel/drivers/i2c/busses/i2c-exynos5.c
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@@ -1,11 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /**
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  * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
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  *
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  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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 */
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 #include <linux/kernel.h>
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@@ -167,13 +164,6 @@
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 #define HSI2C_MASTER_ID(x)			((x & 0xff) << 24)
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 #define MASTER_ID(x)				((x & 0x7) + 0x08)
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-/*
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- * Controller operating frequency, timing values for operation
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- * are calculated against this frequency
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- */
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-#define HSI2C_HS_TX_CLOCK	1000000
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-#define HSI2C_FS_TX_CLOCK	100000
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-
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 #define EXYNOS5_I2C_TIMEOUT (msecs_to_jiffies(100))
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 enum i2c_type_exynos {
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@@ -183,7 +173,6 @@
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173
 
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 struct exynos5_i2c {
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 	struct i2c_adapter	adap;
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-	unsigned int		suspended:1;
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 	struct i2c_msg		*msg;
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 	struct completion	msg_complete;
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@@ -268,6 +257,9 @@
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  * exynos5_i2c_set_timing: updates the registers with appropriate
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  * timing values calculated
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  *
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+ * Timing values for operation are calculated against either 100kHz
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+ * or 1MHz controller operating frequency.
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+ *
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  * Returns 0 on success, -EINVAL if the cycle length cannot
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  * be calculated.
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  */
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@@ -285,7 +277,7 @@
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 	unsigned int t_ftl_cycle;
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 	unsigned int clkin = clk_get_rate(i2c->clk);
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 	unsigned int op_clk = hs_timings ? i2c->op_clock :
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-		(i2c->op_clock >= HSI2C_HS_TX_CLOCK) ? HSI2C_FS_TX_CLOCK :
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+		(i2c->op_clock >= I2C_MAX_FAST_MODE_PLUS_FREQ) ? I2C_MAX_STANDARD_MODE_FREQ :
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 		i2c->op_clock;
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 	int div, clk_cycle, temp;
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283
 
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@@ -357,7 +349,7 @@
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 	/* always set Fast Speed timings */
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 	int ret = exynos5_i2c_set_timing(i2c, false);
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-	if (ret < 0 || i2c->op_clock < HSI2C_HS_TX_CLOCK)
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+	if (ret < 0 || i2c->op_clock < I2C_MAX_FAST_MODE_PLUS_FREQ)
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 		return ret;
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 	return exynos5_i2c_set_timing(i2c, true);
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@@ -380,7 +372,7 @@
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 					i2c->regs + HSI2C_CTL);
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 	writel(HSI2C_TRAILING_COUNT, i2c->regs + HSI2C_TRAILIG_CTL);
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-	if (i2c->op_clock >= HSI2C_HS_TX_CLOCK) {
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+	if (i2c->op_clock >= I2C_MAX_FAST_MODE_PLUS_FREQ) {
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 		writel(HSI2C_MASTER_ID(MASTER_ID(i2c->adap.nr)),
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 					i2c->regs + HSI2C_ADDR);
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 		i2c_conf |= HSI2C_HS_MODE;
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@@ -614,6 +606,7 @@
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 	u32 i2c_ctl;
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 	u32 int_en = 0;
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 	u32 i2c_auto_conf = 0;
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+	u32 i2c_addr = 0;
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 	u32 fifo_ctl;
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 	unsigned long flags;
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 	unsigned short trig_lvl;
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@@ -648,7 +641,12 @@
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 		int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN;
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 	}
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-	writel(HSI2C_SLV_ADDR_MAS(i2c->msg->addr), i2c->regs + HSI2C_ADDR);
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+	i2c_addr = HSI2C_SLV_ADDR_MAS(i2c->msg->addr);
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+
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+	if (i2c->op_clock >= I2C_MAX_FAST_MODE_PLUS_FREQ)
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+		i2c_addr |= HSI2C_MASTER_ID(MASTER_ID(i2c->adap.nr));
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+
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+	writel(i2c_addr, i2c->regs + HSI2C_ADDR);
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 	writel(fifo_ctl, i2c->regs + HSI2C_FIFO_CTL);
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 	writel(i2c_ctl, i2c->regs + HSI2C_CTL);
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@@ -715,11 +713,6 @@
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 	struct exynos5_i2c *i2c = adap->algo_data;
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 	int i, ret;
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-	if (i2c->suspended) {
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-		dev_err(i2c->dev, "HS-I2C is not initialized.\n");
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-		return -EIO;
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-	}
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-
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 	ret = clk_enable(i2c->clk);
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 	if (ret)
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 		return ret;
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@@ -749,7 +742,6 @@
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 {
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 	struct device_node *np = pdev->dev.of_node;
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 	struct exynos5_i2c *i2c;
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-	struct resource *mem;
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 	int ret;
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 	i2c = devm_kzalloc(&pdev->dev, sizeof(struct exynos5_i2c), GFP_KERNEL);
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@@ -757,7 +749,7 @@
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 		return -ENOMEM;
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 	if (of_property_read_u32(np, "clock-frequency", &i2c->op_clock))
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-		i2c->op_clock = HSI2C_FS_TX_CLOCK;
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+		i2c->op_clock = I2C_MAX_STANDARD_MODE_FREQ;
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 	strlcpy(i2c->adap.name, "exynos5-i2c", sizeof(i2c->adap.name));
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 	i2c->adap.owner   = THIS_MODULE;
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@@ -775,8 +767,7 @@
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 	if (ret)
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 		return ret;
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-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
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+	i2c->regs = devm_platform_ioremap_resource(pdev, 0);
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 	if (IS_ERR(i2c->regs)) {
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 		ret = PTR_ERR(i2c->regs);
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 		goto err_clk;
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@@ -845,8 +836,7 @@
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 {
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 	struct exynos5_i2c *i2c = dev_get_drvdata(dev);
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-	i2c->suspended = 1;
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-
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+	i2c_mark_adapter_suspended(&i2c->adap);
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 	clk_unprepare(i2c->clk);
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 	return 0;
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@@ -869,7 +859,7 @@
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 	exynos5_i2c_init(i2c);
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 	clk_disable(i2c->clk);
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-	i2c->suspended = 0;
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+	i2c_mark_adapter_resumed(&i2c->adap);
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 	return 0;
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 }
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@@ -893,6 +883,6 @@
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 module_platform_driver(exynos5_i2c_driver);
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 MODULE_DESCRIPTION("Exynos5 HS-I2C Bus driver");
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-MODULE_AUTHOR("Naveen Krishna Chatradhi, <ch.naveen@samsung.com>");
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-MODULE_AUTHOR("Taekgyun Ko, <taeggyun.ko@samsung.com>");
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+MODULE_AUTHOR("Naveen Krishna Chatradhi <ch.naveen@samsung.com>");
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+MODULE_AUTHOR("Taekgyun Ko <taeggyun.ko@samsung.com>");
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 MODULE_LICENSE("GPL v2");