| .. | .. |
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| 432 | 432 | |
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| 433 | 433 | regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); |
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| 434 | 434 | /* Ensure length byte is a valid value */ |
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| 435 | | - if (flags & I2C_M_RECV_LEN && |
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| 436 | | - tmp <= I2C_SMBUS_BLOCK_MAX && tmp > 0) { |
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| 435 | + if (flags & I2C_M_RECV_LEN) { |
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| 436 | + /* |
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| 437 | + * if IC_EMPTYFIFO_HOLD_MASTER_EN is set, which cannot be |
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| 438 | + * detected from the registers, the controller can be |
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| 439 | + * disabled if the STOP bit is set. But it is only set |
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| 440 | + * after receiving block data response length in |
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| 441 | + * I2C_FUNC_SMBUS_BLOCK_DATA case. That needs to read |
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| 442 | + * another byte with STOP bit set when the block data |
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| 443 | + * response length is invalid to complete the transaction. |
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| 444 | + */ |
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| 445 | + if (!tmp || tmp > I2C_SMBUS_BLOCK_MAX) |
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| 446 | + tmp = 1; |
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| 447 | + |
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| 437 | 448 | len = i2c_dw_recv_len(dev, tmp); |
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| 438 | 449 | } |
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| 439 | 450 | *buf++ = tmp; |
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