forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2
kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c
....@@ -23,7 +23,7 @@
2323
2424 #include <subdev/timer.h>
2525
26
-static void
26
+void
2727 gv100_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark)
2828 {
2929 struct nvkm_device *device = sor->disp->engine.subdev.device;
....@@ -31,7 +31,7 @@
3131 nvkm_mask(device, 0x616550 + hoff, 0x0c00003f, 0x08000000 | watermark);
3232 }
3333
34
-static void
34
+void
3535 gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v)
3636 {
3737 struct nvkm_device *device = sor->disp->engine.subdev.device;
....@@ -40,7 +40,7 @@
4040 nvkm_mask(device, 0x61656c + hoff, 0x00ffffff, v);
4141 }
4242
43
-static void
43
+void
4444 gv100_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
4545 {
4646 struct nvkm_device *device = sor->disp->engine.subdev.device;
....@@ -54,7 +54,7 @@
5454 );
5555 }
5656
57
-static void
57
+void
5858 gv100_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state)
5959 {
6060 struct nvkm_device *device = sor->disp->engine.subdev.device;
....@@ -78,7 +78,7 @@
7878 }
7979
8080 static const struct nvkm_ior_func
81
-gv100_sor = {
81
+gv100_sor_hda = {
8282 .route = {
8383 .get = gm200_sor_route_get,
8484 .set = gm200_sor_route_set,
....@@ -88,6 +88,7 @@
8888 .clock = gf119_sor_clock,
8989 .hdmi = {
9090 .ctrl = gv100_hdmi_ctrl,
91
+ .scdc = gm200_hdmi_scdc,
9192 },
9293 .dp = {
9394 .lanes = { 0, 1, 2, 3 },
....@@ -102,12 +103,46 @@
102103 .hda = {
103104 .hpd = gf119_hda_hpd,
104105 .eld = gf119_hda_eld,
106
+ .device_entry = gv100_hda_device_entry,
107
+ },
108
+};
109
+
110
+static const struct nvkm_ior_func
111
+gv100_sor = {
112
+ .route = {
113
+ .get = gm200_sor_route_get,
114
+ .set = gm200_sor_route_set,
115
+ },
116
+ .state = gv100_sor_state,
117
+ .power = nv50_sor_power,
118
+ .clock = gf119_sor_clock,
119
+ .hdmi = {
120
+ .ctrl = gv100_hdmi_ctrl,
121
+ .scdc = gm200_hdmi_scdc,
122
+ },
123
+ .dp = {
124
+ .lanes = { 0, 1, 2, 3 },
125
+ .links = gf119_sor_dp_links,
126
+ .power = g94_sor_dp_power,
127
+ .pattern = gm107_sor_dp_pattern,
128
+ .drive = gm200_sor_dp_drive,
129
+ .audio = gv100_sor_dp_audio,
130
+ .audio_sym = gv100_sor_dp_audio_sym,
131
+ .watermark = gv100_sor_dp_watermark,
105132 },
106133 };
107134
108135 int
109136 gv100_sor_new(struct nvkm_disp *disp, int id)
110137 {
138
+ struct nvkm_device *device = disp->engine.subdev.device;
139
+ u32 hda;
140
+
141
+ if (!((hda = nvkm_rd32(device, 0x08a15c)) & 0x40000000))
142
+ hda = nvkm_rd32(device, 0x118fb0) >> 8;
143
+
144
+ if (hda & BIT(id))
145
+ return nvkm_ior_new_(&gv100_sor_hda, disp, SOR, id);
111146 return nvkm_ior_new_(&gv100_sor, disp, SOR, id);
112147 }
113148