add ax88772C AX88772C_eeprom_tools

hc

2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2

 kernel/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
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@@ -6,21 +6,20 @@
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 #ifndef __ETNAVIV_GPU_H__
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 #define __ETNAVIV_GPU_H__
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-#include <linux/clk.h>
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-#include <linux/regulator/consumer.h>
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-
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 #include "etnaviv_cmdbuf.h"
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+#include "etnaviv_gem.h"
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+#include "etnaviv_mmu.h"
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 #include "etnaviv_drv.h"
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 struct etnaviv_gem_submit;
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 struct etnaviv_vram_mapping;
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 struct etnaviv_chip_identity {
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-	/* Chip model. */
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 	u32 model;
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-
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-	/* Revision value.*/
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 	u32 revision;
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+	u32 product_id;
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+	u32 customer_id;
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+	u32 eco_id;
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 	/* Supported feature fields. */
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 	u32 features;
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@@ -87,7 +86,8 @@
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 };
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 struct etnaviv_cmdbuf_suballoc;
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-struct etnaviv_cmdbuf;
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+struct regulator;
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+struct clk;
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 #define ETNA_NR_EVENTS 30
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@@ -98,16 +98,14 @@
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 	struct mutex lock;
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 	struct etnaviv_chip_identity identity;
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 	enum etnaviv_sec_mode sec_mode;
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-	struct etnaviv_file_private *lastctx;
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 	struct workqueue_struct *wq;
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 	struct drm_gpu_scheduler sched;
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+	bool initialized;
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+	bool fe_running;
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 	/* 'ring'-buffer: */
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 	struct etnaviv_cmdbuf buffer;
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 	int exec_state;
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-
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-	/* bus base address of memory  */
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-	u32 memory_base;
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 	/* event management: */
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 	DECLARE_BITMAP(event_bitmap, ETNA_NR_EVENTS);
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@@ -121,7 +119,6 @@
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 	struct mutex fence_lock;
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 	struct idr fence_idr;
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 	u32 next_fence;
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-	u32 active_fence;
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 	u32 completed_fence;
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 	wait_queue_head_t fence_event;
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 	u64 fence_context;
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@@ -133,12 +130,12 @@
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 	/* hang detection */
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 	u32 hangcheck_dma_addr;
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+	u32 hangcheck_fence;
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 	void __iomem *mmio;
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 	int irq;
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-	struct etnaviv_iommu *mmu;
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-	struct etnaviv_cmdbuf_suballoc *cmdbuf_suballoc;
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+	struct etnaviv_iommu_context *mmu_context;
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 	unsigned int flush_seq;
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 	/* Power Control: */
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@@ -162,11 +159,6 @@
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 	return readl(gpu->mmio + reg);
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 }
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-static inline bool fence_completed(struct etnaviv_gpu *gpu, u32 fence)
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-{
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-	return fence_after_eq(gpu->completed_fence, fence);
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-}
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-
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 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value);
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 int etnaviv_gpu_init(struct etnaviv_gpu *gpu);
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@@ -179,9 +171,10 @@
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 void etnaviv_gpu_recover_hang(struct etnaviv_gpu *gpu);
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 void etnaviv_gpu_retire(struct etnaviv_gpu *gpu);
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 int etnaviv_gpu_wait_fence_interruptible(struct etnaviv_gpu *gpu,
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-	u32 fence, struct timespec *timeout);
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+	u32 fence, struct drm_etnaviv_timespec *timeout);
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 int etnaviv_gpu_wait_obj_inactive(struct etnaviv_gpu *gpu,
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-	struct etnaviv_gem_object *etnaviv_obj, struct timespec *timeout);
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+	struct etnaviv_gem_object *etnaviv_obj,
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+	struct drm_etnaviv_timespec *timeout);
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 struct dma_fence *etnaviv_gpu_submit(struct etnaviv_gem_submit *submit);
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 int etnaviv_gpu_pm_get_sync(struct etnaviv_gpu *gpu);
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 void etnaviv_gpu_pm_put(struct etnaviv_gpu *gpu);