| .. | .. |
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| 304 | 304 | static void __init armada37xx_cpufreq_avs_setup(struct regmap *base, |
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| 305 | 305 | struct armada_37xx_dvfs *dvfs) |
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| 306 | 306 | { |
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| 307 | | - unsigned int avs_val = 0, freq; |
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| 307 | + unsigned int avs_val = 0; |
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| 308 | 308 | int load_level = 0; |
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| 309 | 309 | |
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| 310 | 310 | if (base == NULL) |
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| .. | .. |
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| 322 | 322 | |
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| 323 | 323 | |
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| 324 | 324 | for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++) { |
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| 325 | | - freq = dvfs->cpu_freq_max / dvfs->divider[load_level]; |
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| 326 | | - |
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| 327 | 325 | avs_val = dvfs->avs[load_level]; |
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| 328 | 326 | regmap_update_bits(base, ARMADA_37XX_AVS_VSET(load_level-1), |
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| 329 | 327 | ARMADA_37XX_AVS_VDD_MASK << ARMADA_37XX_AVS_HIGH_VDD_LIMIT | |
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| .. | .. |
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| 445 | 443 | return -ENODEV; |
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| 446 | 444 | } |
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| 447 | 445 | |
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| 448 | | - clk = clk_get(cpu_dev, 0); |
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| 446 | + clk = clk_get(cpu_dev, NULL); |
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| 449 | 447 | if (IS_ERR(clk)) { |
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| 450 | 448 | dev_err(cpu_dev, "Cannot get clock for CPU0\n"); |
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| 451 | 449 | return PTR_ERR(clk); |
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