add ax88772C AX88772C_eeprom_tools

hc

2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2

 kernel/drivers/clk/ti/dpll.c
..
..
@@ -39,6 +39,8 @@
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 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
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 	.determine_rate	= &omap4_dpll_regm4xen_determine_rate,
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 	.get_parent	= &omap2_init_dpll_parent,
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+	.save_context	= &omap3_core_dpll_save_context,
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+	.restore_context = &omap3_core_dpll_restore_context,
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 };
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 #else
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 static const struct clk_ops dpll_m4xen_ck_ops = {};
..
..
@@ -62,6 +64,8 @@
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 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
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 	.determine_rate	= &omap3_noncore_dpll_determine_rate,
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 	.get_parent	= &omap2_init_dpll_parent,
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+	.save_context	= &omap3_noncore_dpll_save_context,
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+	.restore_context = &omap3_noncore_dpll_restore_context,
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 };
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70
 
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 static const struct clk_ops dpll_no_gate_ck_ops = {
..
..
@@ -72,6 +76,8 @@
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 	.set_parent	= &omap3_noncore_dpll_set_parent,
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 	.set_rate_and_parent	= &omap3_noncore_dpll_set_rate_and_parent,
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 	.determine_rate	= &omap3_noncore_dpll_determine_rate,
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+	.save_context	= &omap3_noncore_dpll_save_context,
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+	.restore_context = &omap3_noncore_dpll_restore_context
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 };
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 #else
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 static const struct clk_ops dpll_core_ck_ops = {};
..
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@@ -159,11 +165,12 @@
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 	struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
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 	struct dpll_data *dd = clk_hw->dpll_data;
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 	struct clk *clk;
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+	const struct clk_init_data *init = hw->init;
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169
 
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 	clk = of_clk_get(node, 0);
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 	if (IS_ERR(clk)) {
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-		pr_debug("clk-ref missing for %s, retry later\n",
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-			 node->name);
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+		pr_debug("clk-ref missing for %pOFn, retry later\n",
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+			 node);
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 		if (!ti_clk_retry_init(node, hw, _register_dpll))
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 			return;
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..
..
@@ -175,8 +182,8 @@
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 	clk = of_clk_get(node, 1);
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183
 
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 	if (IS_ERR(clk)) {
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-		pr_debug("clk-bypass missing for %s, retry later\n",
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-			 node->name);
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+		pr_debug("clk-bypass missing for %pOFn, retry later\n",
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+			 node);
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 		if (!ti_clk_retry_init(node, hw, _register_dpll))
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 			return;
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..
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@@ -186,20 +193,19 @@
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 	dd->clk_bypass = __clk_get_hw(clk);
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194
 
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 	/* register the clock */
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-	clk = ti_clk_register(NULL, &clk_hw->hw, node->name);
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+	clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name);
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197
 
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 	if (!IS_ERR(clk)) {
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-		omap2_init_clk_hw_omap_clocks(&clk_hw->hw);
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 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
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-		kfree(clk_hw->hw.init->parent_names);
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-		kfree(clk_hw->hw.init);
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+		kfree(init->parent_names);
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+		kfree(init);
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 		return;
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 	}
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 cleanup:
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 	kfree(clk_hw->dpll_data);
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-	kfree(clk_hw->hw.init->parent_names);
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-	kfree(clk_hw->hw.init);
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+	kfree(init->parent_names);
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+	kfree(init);
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 	kfree(clk_hw);
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 }
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..
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@@ -226,7 +232,7 @@
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232
 
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 	parent_name = of_clk_get_parent_name(node, 0);
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 	if (!parent_name) {
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-		pr_err("%s must have parent\n", node->name);
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+		pr_err("%pOFn must have parent\n", node);
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 		return;
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 	}
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..
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@@ -259,14 +265,12 @@
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 #endif
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 	/* register the clock */
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-	clk = ti_clk_register(NULL, &clk_hw->hw, name);
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+	clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
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269
 
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-	if (IS_ERR(clk)) {
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+	if (IS_ERR(clk))
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 		kfree(clk_hw);
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-	} else {
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-		omap2_init_clk_hw_omap_clocks(&clk_hw->hw);
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+	else
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 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
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-	}
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 }
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 #endif
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..
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@@ -288,13 +292,11 @@
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 	struct dpll_data *dd = NULL;
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 	u8 dpll_mode = 0;
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-	dd = kzalloc(sizeof(*dd), GFP_KERNEL);
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+	dd = kmemdup(ddt, sizeof(*dd), GFP_KERNEL);
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 	clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
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 	init = kzalloc(sizeof(*init), GFP_KERNEL);
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 	if (!dd || !clk_hw || !init)
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 		goto cleanup;
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-
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-	memcpy(dd, ddt, sizeof(*dd));
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 	clk_hw->dpll_data = dd;
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 	clk_hw->ops = &clkhwops_omap3_dpll;
..
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@@ -305,7 +307,7 @@
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307
 
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 	init->num_parents = of_clk_get_parent_count(node);
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 	if (!init->num_parents) {
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-		pr_err("%s must have parent(s)\n", node->name);
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+		pr_err("%pOFn must have parent(s)\n", node);
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 		goto cleanup;
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 	}
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..
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@@ -404,7 +406,7 @@
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 	if ((of_machine_is_compatible("ti,omap3630") ||
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 	     of_machine_is_compatible("ti,omap36xx")) &&
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-	    !strcmp(node->name, "dpll5_ck"))
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+	     of_node_name_eq(node, "dpll5_ck"))
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 		of_ti_dpll_setup(node, &omap3_dpll5_ck_ops, &dd);
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 	else
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 		of_ti_dpll_setup(node, &omap3_dpll_ck_ops, &dd);