.. | .. |
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140 | 140 | struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw); |
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141 | 141 | struct dpll_data *ad = clk_hw->dpll_data; |
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142 | 142 | struct clk *clk; |
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| 143 | + const struct clk_init_data *init = clk_hw->hw.init; |
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143 | 144 | |
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144 | 145 | clk = of_clk_get(node, 0); |
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145 | 146 | if (IS_ERR(clk)) { |
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146 | | - pr_debug("clk-ref for %s not ready, retry\n", |
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147 | | - node->name); |
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| 147 | + pr_debug("clk-ref for %pOFn not ready, retry\n", |
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| 148 | + node); |
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148 | 149 | if (!ti_clk_retry_init(node, hw, omap_clk_register_apll)) |
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149 | 150 | return; |
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150 | 151 | |
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.. | .. |
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155 | 156 | |
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156 | 157 | clk = of_clk_get(node, 1); |
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157 | 158 | if (IS_ERR(clk)) { |
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158 | | - pr_debug("clk-bypass for %s not ready, retry\n", |
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159 | | - node->name); |
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| 159 | + pr_debug("clk-bypass for %pOFn not ready, retry\n", |
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| 160 | + node); |
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160 | 161 | if (!ti_clk_retry_init(node, hw, omap_clk_register_apll)) |
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161 | 162 | return; |
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162 | 163 | |
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.. | .. |
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165 | 166 | |
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166 | 167 | ad->clk_bypass = __clk_get_hw(clk); |
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167 | 168 | |
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168 | | - clk = ti_clk_register(NULL, &clk_hw->hw, node->name); |
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| 169 | + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); |
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169 | 170 | if (!IS_ERR(clk)) { |
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170 | 171 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
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171 | | - kfree(clk_hw->hw.init->parent_names); |
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172 | | - kfree(clk_hw->hw.init); |
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| 172 | + kfree(init->parent_names); |
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| 173 | + kfree(init); |
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173 | 174 | return; |
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174 | 175 | } |
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175 | 176 | |
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176 | 177 | cleanup: |
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177 | 178 | kfree(clk_hw->dpll_data); |
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178 | | - kfree(clk_hw->hw.init->parent_names); |
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179 | | - kfree(clk_hw->hw.init); |
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| 179 | + kfree(init->parent_names); |
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| 180 | + kfree(init); |
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180 | 181 | kfree(clk_hw); |
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181 | 182 | } |
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182 | 183 | |
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.. | .. |
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202 | 203 | |
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203 | 204 | init->num_parents = of_clk_get_parent_count(node); |
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204 | 205 | if (init->num_parents < 1) { |
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205 | | - pr_err("dra7 apll %s must have parent(s)\n", node->name); |
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| 206 | + pr_err("dra7 apll %pOFn must have parent(s)\n", node); |
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206 | 207 | goto cleanup; |
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207 | 208 | } |
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208 | 209 | |
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.. | .. |
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366 | 367 | |
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367 | 368 | init->num_parents = of_clk_get_parent_count(node); |
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368 | 369 | if (init->num_parents != 1) { |
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369 | | - pr_err("%s must have one parent\n", node->name); |
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| 370 | + pr_err("%pOFn must have one parent\n", node); |
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370 | 371 | goto cleanup; |
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371 | 372 | } |
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372 | 373 | |
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.. | .. |
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374 | 375 | init->parent_names = &parent_name; |
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375 | 376 | |
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376 | 377 | if (of_property_read_u32(node, "ti,clock-frequency", &val)) { |
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377 | | - pr_err("%s missing clock-frequency\n", node->name); |
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| 378 | + pr_err("%pOFn missing clock-frequency\n", node); |
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378 | 379 | goto cleanup; |
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379 | 380 | } |
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380 | 381 | clk_hw->fixed_rate = val; |
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381 | 382 | |
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382 | 383 | if (of_property_read_u32(node, "ti,bit-shift", &val)) { |
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383 | | - pr_err("%s missing bit-shift\n", node->name); |
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| 384 | + pr_err("%pOFn missing bit-shift\n", node); |
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384 | 385 | goto cleanup; |
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385 | 386 | } |
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386 | 387 | |
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.. | .. |
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389 | 390 | ad->autoidle_mask = 0x3 << val; |
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390 | 391 | |
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391 | 392 | if (of_property_read_u32(node, "ti,idlest-shift", &val)) { |
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392 | | - pr_err("%s missing idlest-shift\n", node->name); |
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| 393 | + pr_err("%pOFn missing idlest-shift\n", node); |
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393 | 394 | goto cleanup; |
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394 | 395 | } |
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395 | 396 | |
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.. | .. |
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402 | 403 | if (ret) |
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403 | 404 | goto cleanup; |
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404 | 405 | |
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405 | | - clk = clk_register(NULL, &clk_hw->hw); |
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| 406 | + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); |
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406 | 407 | if (!IS_ERR(clk)) { |
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407 | 408 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
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408 | 409 | kfree(init); |
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