forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2
kernel/drivers/clk/tegra/clk-sdmmc-mux.c
....@@ -12,6 +12,7 @@
1212
1313 #include <linux/clk-provider.h>
1414 #include <linux/err.h>
15
+#include <linux/io.h>
1516 #include <linux/types.h>
1617
1718 #include "clk.h"
....@@ -193,6 +194,30 @@
193194 gate_ops->disable(gate_hw);
194195 }
195196
197
+static void clk_sdmmc_mux_disable_unused(struct clk_hw *hw)
198
+{
199
+ struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
200
+ const struct clk_ops *gate_ops = sdmmc_mux->gate_ops;
201
+ struct clk_hw *gate_hw = &sdmmc_mux->gate.hw;
202
+
203
+ gate_ops->disable_unused(gate_hw);
204
+}
205
+
206
+static void clk_sdmmc_mux_restore_context(struct clk_hw *hw)
207
+{
208
+ struct clk_hw *parent = clk_hw_get_parent(hw);
209
+ unsigned long parent_rate = clk_hw_get_rate(parent);
210
+ unsigned long rate = clk_hw_get_rate(hw);
211
+ int parent_id;
212
+
213
+ parent_id = clk_hw_get_parent_index(hw);
214
+ if (WARN_ON(parent_id < 0))
215
+ return;
216
+
217
+ clk_sdmmc_mux_set_parent(hw, parent_id);
218
+ clk_sdmmc_mux_set_rate(hw, rate, parent_rate);
219
+}
220
+
196221 static const struct clk_ops tegra_clk_sdmmc_mux_ops = {
197222 .get_parent = clk_sdmmc_mux_get_parent,
198223 .set_parent = clk_sdmmc_mux_set_parent,
....@@ -202,6 +227,8 @@
202227 .is_enabled = clk_sdmmc_mux_is_enabled,
203228 .enable = clk_sdmmc_mux_enable,
204229 .disable = clk_sdmmc_mux_disable,
230
+ .disable_unused = clk_sdmmc_mux_disable_unused,
231
+ .restore_context = clk_sdmmc_mux_restore_context,
205232 };
206233
207234 struct clk *tegra_clk_register_sdmmc_mux_div(const char *name,
....@@ -209,7 +236,7 @@
209236 unsigned long flags, void *lock)
210237 {
211238 struct clk *clk;
212
- struct clk_init_data init = {};
239
+ struct clk_init_data init;
213240 const struct tegra_clk_periph_regs *bank;
214241 struct tegra_sdmmc_mux *sdmmc_mux;
215242