forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2
kernel/drivers/clk/mediatek/clk-mtk.c
....@@ -1,15 +1,7 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright (c) 2014 MediaTek Inc.
34 * Author: James Liao <jamesjj.liao@mediatek.com>
4
- *
5
- * This program is free software; you can redistribute it and/or modify
6
- * it under the terms of the GNU General Public License version 2 as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful,
10
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
- * GNU General Public License for more details.
135 */
146
157 #include <linux/of.h>
....@@ -20,6 +12,7 @@
2012 #include <linux/delay.h>
2113 #include <linux/clkdev.h>
2214 #include <linux/mfd/syscon.h>
15
+#include <linux/device.h>
2316
2417 #include "clk-mtk.h"
2518 #include "clk-gate.h"
....@@ -101,9 +94,10 @@
10194 }
10295 }
10396
104
-int mtk_clk_register_gates(struct device_node *node,
97
+int mtk_clk_register_gates_with_dev(struct device_node *node,
10598 const struct mtk_gate *clks,
106
- int num, struct clk_onecell_data *clk_data)
99
+ int num, struct clk_onecell_data *clk_data,
100
+ struct device *dev)
107101 {
108102 int i;
109103 struct clk *clk;
....@@ -130,7 +124,7 @@
130124 gate->regs->set_ofs,
131125 gate->regs->clr_ofs,
132126 gate->regs->sta_ofs,
133
- gate->shift, gate->ops);
127
+ gate->shift, gate->ops, gate->flags, dev);
134128
135129 if (IS_ERR(clk)) {
136130 pr_err("Failed to register clk %s: %ld\n",
....@@ -142,6 +136,14 @@
142136 }
143137
144138 return 0;
139
+}
140
+
141
+int mtk_clk_register_gates(struct device_node *node,
142
+ const struct mtk_gate *clks,
143
+ int num, struct clk_onecell_data *clk_data)
144
+{
145
+ return mtk_clk_register_gates_with_dev(node,
146
+ clks, num, clk_data, NULL);
145147 }
146148
147149 struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
....@@ -167,7 +169,7 @@
167169 mux->mask = BIT(mc->mux_width) - 1;
168170 mux->shift = mc->mux_shift;
169171 mux->lock = lock;
170
-
172
+ mux->flags = mc->mux_flags;
171173 mux_hw = &mux->hw;
172174 mux_ops = &clk_mux_ops;
173175