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hc
2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2 
 kernel/drivers/ata/ahci.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  *  ahci.c - AHCI SATA support
34  *
....@@ -7,29 +8,12 @@
78  *
89  *  Copyright 2004-2005 Red Hat, Inc.
910  *
10
- *
11
- *  This program is free software; you can redistribute it and/or modify
12
- *  it under the terms of the GNU General Public License as published by
13
- *  the Free Software Foundation; either version 2, or (at your option)
14
- *  any later version.
15
- *
16
- *  This program is distributed in the hope that it will be useful,
17
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
- *  GNU General Public License for more details.
20
- *
21
- *  You should have received a copy of the GNU General Public License
22
- *  along with this program; see the file COPYING.  If not, write to
23
- *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24
- *
25
- *
2611  * libata documentation is available via 'make {ps|pdf}docs',
2712  * as Documentation/driver-api/libata.rst
2813  *
2914  * AHCI hardware documentation:
3015  * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf
3116  * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf
32
- *
3317  */
3418 
3519 #include <linux/kernel.h>
....@@ -56,6 +40,7 @@
5640 enum {
5741 	AHCI_PCI_BAR_STA2X11	= 0,
5842 	AHCI_PCI_BAR_CAVIUM	= 0,
43
+	AHCI_PCI_BAR_LOONGSON	= 0,
5944 	AHCI_PCI_BAR_ENMOTUS	= 2,
6045 	AHCI_PCI_BAR_CAVIUM_GEN5	= 4,
6146 	AHCI_PCI_BAR_STANDARD	= 5,
....@@ -65,13 +50,15 @@
6550 	/* board IDs by feature in alphabetical order */
6651 	board_ahci,
6752 	board_ahci_ign_iferr,
68
-	board_ahci_mobile,
53
+	board_ahci_low_power,
54
+	board_ahci_no_debounce_delay,
6955 	board_ahci_nomsi,
7056 	board_ahci_noncq,
7157 	board_ahci_nosntf,
7258 	board_ahci_yes_fbs,
7359 
7460 	/* board IDs for specific chipsets in alphabetical order */
61
+	board_ahci_al,
7562 	board_ahci_avn,
7663 	board_ahci_mcp65,
7764 	board_ahci_mcp77,
....@@ -97,6 +84,7 @@
9784 static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
9885 static void ahci_remove_one(struct pci_dev *dev);
9986 static void ahci_shutdown_one(struct pci_dev *dev);
87
+static void ahci_intel_pcs_quirk(struct pci_dev *pdev, struct ahci_host_priv *hpriv);
10088 static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
10189 				 unsigned long deadline);
10290 static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class,
....@@ -148,9 +136,16 @@
148136 		.udma_mask	= ATA_UDMA6,
149137 		.port_ops	= &ahci_ops,
150138 	},
151
-	[board_ahci_mobile] = {
139
+	[board_ahci_low_power] = {
152140 		AHCI_HFLAGS	(AHCI_HFLAG_IS_MOBILE),
153141 		.flags		= AHCI_FLAG_COMMON,
142
+		.pio_mask	= ATA_PIO4,
143
+		.udma_mask	= ATA_UDMA6,
144
+		.port_ops	= &ahci_ops,
145
+	},
146
+	[board_ahci_no_debounce_delay] = {
147
+		.flags		= AHCI_FLAG_COMMON,
148
+		.link_flags	= ATA_LFLAG_NO_DEBOUNCE_DELAY,
154149 		.pio_mask	= ATA_PIO4,
155150 		.udma_mask	= ATA_UDMA6,
156151 		.port_ops	= &ahci_ops,
....@@ -184,6 +179,13 @@
184179 		.port_ops	= &ahci_ops,
185180 	},
186181 	/* by chipsets */
182
+	[board_ahci_al] = {
183
+		AHCI_HFLAGS	(AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_MSI),
184
+		.flags		= AHCI_FLAG_COMMON,
185
+		.pio_mask	= ATA_PIO4,
186
+		.udma_mask	= ATA_UDMA6,
187
+		.port_ops	= &ahci_ops,
188
+	},
187189 	[board_ahci_avn] = {
188190 		.flags		= AHCI_FLAG_COMMON,
189191 		.pio_mask	= ATA_PIO4,
....@@ -253,6 +255,7 @@
253255 
254256 static const struct pci_device_id ahci_pci_tbl[] = {
255257 	/* Intel */
258
+	{ PCI_VDEVICE(INTEL, 0x06d6), board_ahci }, /* Comet Lake PCH-H RAID */
256259 	{ PCI_VDEVICE(INTEL, 0x2652), board_ahci }, /* ICH6 */
257260 	{ PCI_VDEVICE(INTEL, 0x2653), board_ahci }, /* ICH6M */
258261 	{ PCI_VDEVICE(INTEL, 0x27c1), board_ahci }, /* ICH7 */
....@@ -273,13 +276,13 @@
273276 	{ PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */
274277 	{ PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */
275278 	{ PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */
276
-	{ PCI_VDEVICE(INTEL, 0x2929), board_ahci_mobile }, /* ICH9M */
277
-	{ PCI_VDEVICE(INTEL, 0x292a), board_ahci_mobile }, /* ICH9M */
278
-	{ PCI_VDEVICE(INTEL, 0x292b), board_ahci_mobile }, /* ICH9M */
279
-	{ PCI_VDEVICE(INTEL, 0x292c), board_ahci_mobile }, /* ICH9M */
280
-	{ PCI_VDEVICE(INTEL, 0x292f), board_ahci_mobile }, /* ICH9M */
279
+	{ PCI_VDEVICE(INTEL, 0x2929), board_ahci_low_power }, /* ICH9M */
280
+	{ PCI_VDEVICE(INTEL, 0x292a), board_ahci_low_power }, /* ICH9M */
281
+	{ PCI_VDEVICE(INTEL, 0x292b), board_ahci_low_power }, /* ICH9M */
282
+	{ PCI_VDEVICE(INTEL, 0x292c), board_ahci_low_power }, /* ICH9M */
283
+	{ PCI_VDEVICE(INTEL, 0x292f), board_ahci_low_power }, /* ICH9M */
281284 	{ PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */
282
-	{ PCI_VDEVICE(INTEL, 0x294e), board_ahci_mobile }, /* ICH9M */
285
+	{ PCI_VDEVICE(INTEL, 0x294e), board_ahci_low_power }, /* ICH9M */
283286 	{ PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */
284287 	{ PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */
285288 	{ PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
....@@ -289,9 +292,9 @@
289292 	{ PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
290293 	{ PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
291294 	{ PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
292
-	{ PCI_VDEVICE(INTEL, 0x3b29), board_ahci_mobile }, /* PCH M AHCI */
295
+	{ PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */
293296 	{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
294
-	{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_mobile }, /* PCH M RAID */
297
+	{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_low_power }, /* PCH M RAID */
295298 	{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
296299 	{ PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */
297300 	{ PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */
....@@ -314,9 +317,9 @@
314317 	{ PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */
315318 	{ PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */
316319 	{ PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
317
-	{ PCI_VDEVICE(INTEL, 0x1c03), board_ahci_mobile }, /* CPT M AHCI */
320
+	{ PCI_VDEVICE(INTEL, 0x1c03), board_ahci_low_power }, /* CPT M AHCI */
318321 	{ PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
319
-	{ PCI_VDEVICE(INTEL, 0x1c05), board_ahci_mobile }, /* CPT M RAID */
322
+	{ PCI_VDEVICE(INTEL, 0x1c05), board_ahci_low_power }, /* CPT M RAID */
320323 	{ PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
321324 	{ PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
322325 	{ PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */
....@@ -325,29 +328,29 @@
325328 	{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */
326329 	{ PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
327330 	{ PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */
328
-	{ PCI_VDEVICE(INTEL, 0x1e03), board_ahci_mobile }, /* Panther M AHCI */
331
+	{ PCI_VDEVICE(INTEL, 0x1e03), board_ahci_low_power }, /* Panther M AHCI */
329332 	{ PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */
330333 	{ PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */
331334 	{ PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */
332
-	{ PCI_VDEVICE(INTEL, 0x1e07), board_ahci_mobile }, /* Panther M RAID */
335
+	{ PCI_VDEVICE(INTEL, 0x1e07), board_ahci_low_power }, /* Panther M RAID */
333336 	{ PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */
334337 	{ PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */
335
-	{ PCI_VDEVICE(INTEL, 0x8c03), board_ahci_mobile }, /* Lynx M AHCI */
338
+	{ PCI_VDEVICE(INTEL, 0x8c03), board_ahci_low_power }, /* Lynx M AHCI */
336339 	{ PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */
337
-	{ PCI_VDEVICE(INTEL, 0x8c05), board_ahci_mobile }, /* Lynx M RAID */
340
+	{ PCI_VDEVICE(INTEL, 0x8c05), board_ahci_low_power }, /* Lynx M RAID */
338341 	{ PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */
339
-	{ PCI_VDEVICE(INTEL, 0x8c07), board_ahci_mobile }, /* Lynx M RAID */
342
+	{ PCI_VDEVICE(INTEL, 0x8c07), board_ahci_low_power }, /* Lynx M RAID */
340343 	{ PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */
341
-	{ PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_mobile }, /* Lynx M RAID */
342
-	{ PCI_VDEVICE(INTEL, 0x9c02), board_ahci_mobile }, /* Lynx LP AHCI */
343
-	{ PCI_VDEVICE(INTEL, 0x9c03), board_ahci_mobile }, /* Lynx LP AHCI */
344
-	{ PCI_VDEVICE(INTEL, 0x9c04), board_ahci_mobile }, /* Lynx LP RAID */
345
-	{ PCI_VDEVICE(INTEL, 0x9c05), board_ahci_mobile }, /* Lynx LP RAID */
346
-	{ PCI_VDEVICE(INTEL, 0x9c06), board_ahci_mobile }, /* Lynx LP RAID */
347
-	{ PCI_VDEVICE(INTEL, 0x9c07), board_ahci_mobile }, /* Lynx LP RAID */
348
-	{ PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_mobile }, /* Lynx LP RAID */
349
-	{ PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_mobile }, /* Lynx LP RAID */
350
-	{ PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_mobile }, /* Cannon Lake PCH-LP AHCI */
344
+	{ PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_low_power }, /* Lynx M RAID */
345
+	{ PCI_VDEVICE(INTEL, 0x9c02), board_ahci_low_power }, /* Lynx LP AHCI */
346
+	{ PCI_VDEVICE(INTEL, 0x9c03), board_ahci_low_power }, /* Lynx LP AHCI */
347
+	{ PCI_VDEVICE(INTEL, 0x9c04), board_ahci_low_power }, /* Lynx LP RAID */
348
+	{ PCI_VDEVICE(INTEL, 0x9c05), board_ahci_low_power }, /* Lynx LP RAID */
349
+	{ PCI_VDEVICE(INTEL, 0x9c06), board_ahci_low_power }, /* Lynx LP RAID */
350
+	{ PCI_VDEVICE(INTEL, 0x9c07), board_ahci_low_power }, /* Lynx LP RAID */
351
+	{ PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_low_power }, /* Lynx LP RAID */
352
+	{ PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_low_power }, /* Lynx LP RAID */
353
+	{ PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_low_power }, /* Cannon Lake PCH-LP AHCI */
351354 	{ PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */
352355 	{ PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */
353356 	{ PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */
....@@ -366,6 +369,10 @@
366369 	{ PCI_VDEVICE(INTEL, 0x1f3f), board_ahci_avn }, /* Avoton RAID */
367370 	{ PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg RAID */
368371 	{ PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Wellsburg RAID */
372
+	{ PCI_VDEVICE(INTEL, 0x43d4), board_ahci }, /* Rocket Lake PCH-H RAID */
373
+	{ PCI_VDEVICE(INTEL, 0x43d5), board_ahci }, /* Rocket Lake PCH-H RAID */
374
+	{ PCI_VDEVICE(INTEL, 0x43d6), board_ahci }, /* Rocket Lake PCH-H RAID */
375
+	{ PCI_VDEVICE(INTEL, 0x43d7), board_ahci }, /* Rocket Lake PCH-H RAID */
369376 	{ PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */
370377 	{ PCI_VDEVICE(INTEL, 0x8d04), board_ahci }, /* Wellsburg RAID */
371378 	{ PCI_VDEVICE(INTEL, 0x8d06), board_ahci }, /* Wellsburg RAID */
....@@ -375,26 +382,26 @@
375382 	{ PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */
376383 	{ PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */
377384 	{ PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */
378
-	{ PCI_VDEVICE(INTEL, 0x9c83), board_ahci_mobile }, /* Wildcat LP AHCI */
379
-	{ PCI_VDEVICE(INTEL, 0x9c85), board_ahci_mobile }, /* Wildcat LP RAID */
380
-	{ PCI_VDEVICE(INTEL, 0x9c87), board_ahci_mobile }, /* Wildcat LP RAID */
381
-	{ PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_mobile }, /* Wildcat LP RAID */
385
+	{ PCI_VDEVICE(INTEL, 0x9c83), board_ahci_low_power }, /* Wildcat LP AHCI */
386
+	{ PCI_VDEVICE(INTEL, 0x9c85), board_ahci_low_power }, /* Wildcat LP RAID */
387
+	{ PCI_VDEVICE(INTEL, 0x9c87), board_ahci_low_power }, /* Wildcat LP RAID */
388
+	{ PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_low_power }, /* Wildcat LP RAID */
382389 	{ PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */
383
-	{ PCI_VDEVICE(INTEL, 0x8c83), board_ahci_mobile }, /* 9 Series M AHCI */
390
+	{ PCI_VDEVICE(INTEL, 0x8c83), board_ahci_low_power }, /* 9 Series M AHCI */
384391 	{ PCI_VDEVICE(INTEL, 0x8c84), board_ahci }, /* 9 Series RAID */
385
-	{ PCI_VDEVICE(INTEL, 0x8c85), board_ahci_mobile }, /* 9 Series M RAID */
392
+	{ PCI_VDEVICE(INTEL, 0x8c85), board_ahci_low_power }, /* 9 Series M RAID */
386393 	{ PCI_VDEVICE(INTEL, 0x8c86), board_ahci }, /* 9 Series RAID */
387
-	{ PCI_VDEVICE(INTEL, 0x8c87), board_ahci_mobile }, /* 9 Series M RAID */
394
+	{ PCI_VDEVICE(INTEL, 0x8c87), board_ahci_low_power }, /* 9 Series M RAID */
388395 	{ PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */
389
-	{ PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_mobile }, /* 9 Series M RAID */
390
-	{ PCI_VDEVICE(INTEL, 0x9d03), board_ahci_mobile }, /* Sunrise LP AHCI */
391
-	{ PCI_VDEVICE(INTEL, 0x9d05), board_ahci_mobile }, /* Sunrise LP RAID */
392
-	{ PCI_VDEVICE(INTEL, 0x9d07), board_ahci_mobile }, /* Sunrise LP RAID */
396
+	{ PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_low_power }, /* 9 Series M RAID */
397
+	{ PCI_VDEVICE(INTEL, 0x9d03), board_ahci_low_power }, /* Sunrise LP AHCI */
398
+	{ PCI_VDEVICE(INTEL, 0x9d05), board_ahci_low_power }, /* Sunrise LP RAID */
399
+	{ PCI_VDEVICE(INTEL, 0x9d07), board_ahci_low_power }, /* Sunrise LP RAID */
393400 	{ PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */
394
-	{ PCI_VDEVICE(INTEL, 0xa103), board_ahci_mobile }, /* Sunrise M AHCI */
401
+	{ PCI_VDEVICE(INTEL, 0xa103), board_ahci_low_power }, /* Sunrise M AHCI */
395402 	{ PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */
396403 	{ PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */
397
-	{ PCI_VDEVICE(INTEL, 0xa107), board_ahci_mobile }, /* Sunrise M RAID */
404
+	{ PCI_VDEVICE(INTEL, 0xa107), board_ahci_low_power }, /* Sunrise M RAID */
398405 	{ PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
399406 	{ PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/
400407 	{ PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Lewisburg AHCI*/
....@@ -410,11 +417,16 @@
410417 	{ PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/
411418 	{ PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */
412419 	{ PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */
413
-	{ PCI_VDEVICE(INTEL, 0x0f22), board_ahci_mobile }, /* Bay Trail AHCI */
414
-	{ PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */
415
-	{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */
416
-	{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */
417
-	{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */
420
+	{ PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */
421
+	{ PCI_VDEVICE(INTEL, 0x0f22), board_ahci_low_power }, /* Bay Trail AHCI */
422
+	{ PCI_VDEVICE(INTEL, 0x0f23), board_ahci_low_power }, /* Bay Trail AHCI */
423
+	{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_low_power }, /* Cherry Tr. AHCI */
424
+	{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_low_power }, /* ApolloLake AHCI */
425
+	{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */
426
+	{ PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */
427
+	{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
428
+	/* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */
429
+	{ PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */
418430 
419431 	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
420432 	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
....@@ -433,10 +445,16 @@
433445 	{ PCI_VDEVICE(ATI, 0x4394), board_ahci_sb700 }, /* ATI SB700/800 */
434446 	{ PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */
435447 
448
+	/* Amazon's Annapurna Labs support */
449
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031),
450
+		.class = PCI_CLASS_STORAGE_SATA_AHCI,
451
+		.class_mask = 0xffffff,
452
+		board_ahci_al },
436453 	/* AMD */
437454 	{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
455
+	{ PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */
438456 	{ PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
439
-	{ PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */
457
+	{ PCI_VDEVICE(AMD, 0x7901), board_ahci_low_power }, /* AMD Green Sardine */
440458 	/* AMD is using RAID class only for ahci controllers */
441459 	{ PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
442460 	  PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
....@@ -594,6 +612,9 @@
594612 	/* Enmotus */
595613 	{ PCI_DEVICE(0x1c44, 0x8000), board_ahci },
596614 
615
+	/* Loongson */
616
+	{ PCI_VDEVICE(LOONGSON, 0x7a08), board_ahci },
617
+
597618 	/* Generic, PCI class code for AHCI */
598619 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
599620 	  PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
....@@ -655,6 +676,25 @@
655676 	ahci_save_initial_config(&pdev->dev, hpriv);
656677 }
657678 
679
+static int ahci_pci_reset_controller(struct ata_host *host)
680
+{
681
+	struct pci_dev *pdev = to_pci_dev(host->dev);
682
+	struct ahci_host_priv *hpriv = host->private_data;
683
+	int rc;
684
+
685
+	rc = ahci_reset_controller(host);
686
+	if (rc)
687
+		return rc;
688
+
689
+	/*
690
+	 * If platform firmware failed to enable ports, try to enable
691
+	 * them here.
692
+	 */
693
+	ahci_intel_pcs_quirk(pdev, hpriv);
694
+
695
+	return 0;
696
+}
697
+
658698 static void ahci_pci_init_controller(struct ata_host *host)
659699 {
660700 	struct ahci_host_priv *hpriv = host->private_data;
....@@ -674,7 +714,7 @@
674714 
675715 		/* clear port IRQ */
676716 		tmp = readl(port_mmio + PORT_IRQ_STAT);
677
-		VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp);
717
+		dev_dbg(&pdev->dev, "PORT_IRQ_STAT 0x%x\n", tmp);
678718 		if (tmp)
679719 			writel(tmp, port_mmio + PORT_IRQ_STAT);
680720 	}
....@@ -803,8 +843,7 @@
803843 				(sstatus & 0xf) != 1)
804844 			break;
805845 
806
-		ata_link_printk(link, KERN_INFO, "avn bounce port%d\n",
807
-				port);
846
+		ata_link_info(link,  "avn bounce port%d\n", port);
808847 
809848 		pci_read_config_word(pdev, 0x92, &val);
810849 		val &= ~(1 << port);
....@@ -857,7 +896,7 @@
857896 	struct ata_host *host = pci_get_drvdata(pdev);
858897 	int rc;
859898 
860
-	rc = ahci_reset_controller(host);
899
+	rc = ahci_pci_reset_controller(host);
861900 	if (rc)
862901 		return rc;
863902 	ahci_pci_init_controller(host);
....@@ -892,7 +931,7 @@
892931 		ahci_mcp89_apple_enable(pdev);
893932 
894933 	if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
895
-		rc = ahci_reset_controller(host);
934
+		rc = ahci_pci_reset_controller(host);
896935 		if (rc)
897936 			return rc;
898937 
....@@ -909,40 +948,23 @@
909948 
910949 static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
911950 {
951
+	const int dma_bits = using_dac ? 64 : 32;
912952 	int rc;
913953 
914954 	/*
915955 	 * If the device fixup already set the dma_mask to some non-standard
916956 	 * value, don't extend it here. This happens on STA2X11, for example.
957
+	 *
958
+	 * XXX: manipulating the DMA mask from platform code is completely
959
+	 * bogus, platform code should use dev->bus_dma_limit instead..
917960 	 */
918961 	if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32))
919962 		return 0;
920963 
921
-	if (using_dac &&
922
-	    !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
923
-		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
924
-		if (rc) {
925
-			rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
926
-			if (rc) {
927
-				dev_err(&pdev->dev,
928
-					"64-bit DMA enable failed\n");
929
-				return rc;
930
-			}
931
-		}
932
-	} else {
933
-		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
934
-		if (rc) {
935
-			dev_err(&pdev->dev, "32-bit DMA enable failed\n");
936
-			return rc;
937
-		}
938
-		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
939
-		if (rc) {
940
-			dev_err(&pdev->dev,
941
-				"32-bit consistent DMA enable failed\n");
942
-			return rc;
943
-		}
944
-	}
945
-	return 0;
964
+	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits));
965
+	if (rc)
966
+		dev_err(&pdev->dev, "DMA enable failed\n");
967
+	return rc;
946968 }
947969 
948970 static void ahci_pci_print_info(struct ata_host *host)
....@@ -1484,7 +1506,6 @@
14841506 	u32 irq_stat, irq_masked;
14851507 	unsigned int handled = 1;
14861508 
1487
-	VPRINTK("ENTER\n");
14881509 	hpriv = host->private_data;
14891510 	mmio = hpriv->mmio;
14901511 	irq_stat = readl(mmio + HOST_IRQ_STAT);
....@@ -1501,7 +1522,6 @@
15011522 		irq_stat = readl(mmio + HOST_IRQ_STAT);
15021523 		spin_unlock(&host->lock);
15031524 	} while (irq_stat);
1504
-	VPRINTK("EXIT\n");
15051525 
15061526 	return IRQ_RETVAL(handled);
15071527 }
....@@ -1510,7 +1530,7 @@
15101530 static void ahci_remap_check(struct pci_dev *pdev, int bar,
15111531 		struct ahci_host_priv *hpriv)
15121532 {
1513
-	int i, count = 0;
1533
+	int i;
15141534 	u32 cap;
15151535 
15161536 	/*
....@@ -1531,13 +1551,14 @@
15311551 			continue;
15321552 
15331553 		/* We've found a remapped device */
1534
-		count++;
1554
+		hpriv->remapped_nvme++;
15351555 	}
15361556 
1537
-	if (!count)
1557
+	if (!hpriv->remapped_nvme)
15381558 		return;
15391559 
1540
-	dev_warn(&pdev->dev, "Found %d remapped NVMe devices.\n", count);
1560
+	dev_warn(&pdev->dev, "Found %u remapped NVMe devices.\n",
1561
+		 hpriv->remapped_nvme);
15411562 	dev_warn(&pdev->dev,
15421563 		 "Switch your BIOS from RAID to AHCI mode to use them.\n");
15431564 
....@@ -1657,6 +1678,18 @@
16571678 	}
16581679 }
16591680 
1681
+static ssize_t remapped_nvme_show(struct device *dev,
1682
+				  struct device_attribute *attr,
1683
+				  char *buf)
1684
+{
1685
+	struct ata_host *host = dev_get_drvdata(dev);
1686
+	struct ahci_host_priv *hpriv = host->private_data;
1687
+
1688
+	return sprintf(buf, "%u\n", hpriv->remapped_nvme);
1689
+}
1690
+
1691
+static DEVICE_ATTR_RO(remapped_nvme);
1692
+
16601693 static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
16611694 {
16621695 	unsigned int board_id = ent->driver_data;
....@@ -1702,6 +1735,9 @@
17021735 			ahci_pci_bar = AHCI_PCI_BAR_CAVIUM;
17031736 		if (pdev->device == 0xa084)
17041737 			ahci_pci_bar = AHCI_PCI_BAR_CAVIUM_GEN5;
1738
+	} else if (pdev->vendor == PCI_VENDOR_ID_LOONGSON) {
1739
+		if (pdev->device == 0x7a08)
1740
+			ahci_pci_bar = AHCI_PCI_BAR_LOONGSON;
17051741 	}
17061742 
17071743 	/* acquire resources */
....@@ -1757,23 +1793,26 @@
17571793 	/* detect remapped nvme devices */
17581794 	ahci_remap_check(pdev, ahci_pci_bar, hpriv);
17591795 
1796
+	sysfs_add_file_to_group(&pdev->dev.kobj,
1797
+				&dev_attr_remapped_nvme.attr,
1798
+				NULL);
1799
+
17601800 	/* must set flag prior to save config in order to take effect */
17611801 	if (ahci_broken_devslp(pdev))
17621802 		hpriv->flags |= AHCI_HFLAG_NO_DEVSLP;
17631803 
17641804 #ifdef CONFIG_ARM64
1805
+	if (pdev->vendor == PCI_VENDOR_ID_HUAWEI &&
1806
+	    pdev->device == 0xa235 &&
1807
+	    pdev->revision < 0x30)
1808
+		hpriv->flags |= AHCI_HFLAG_NO_SXS;
1809
+
17651810 	if (pdev->vendor == 0x177d && pdev->device == 0xa01c)
17661811 		hpriv->irq_handler = ahci_thunderx_irq_handler;
17671812 #endif
17681813 
17691814 	/* save initial config */
17701815 	ahci_pci_save_initial_config(pdev, hpriv);
1771
-
1772
-	/*
1773
-	 * If platform firmware failed to enable ports, try to enable
1774
-	 * them here.
1775
-	 */
1776
-	ahci_intel_pcs_quirk(pdev, hpriv);
17771816 
17781817 	/* prepare host */
17791818 	if (hpriv->cap & HOST_CAP_NCQ) {
....@@ -1852,6 +1891,15 @@
18521891 	else
18531892 		dev_info(&pdev->dev, "SSS flag set, parallel bus scan disabled\n");
18541893 
1894
+	if (!(hpriv->cap & HOST_CAP_PART))
1895
+		host->flags |= ATA_HOST_NO_PART;
1896
+
1897
+	if (!(hpriv->cap & HOST_CAP_SSC))
1898
+		host->flags |= ATA_HOST_NO_SSC;
1899
+
1900
+	if (!(hpriv->cap2 & HOST_CAP2_SDS))
1901
+		host->flags |= ATA_HOST_NO_DEVSLP;
1902
+
18551903 	if (pi.flags & ATA_FLAG_EM)
18561904 		ahci_reset_em(host);
18571905 
....@@ -1884,7 +1932,7 @@
18841932 	if (rc)
18851933 		return rc;
18861934 
1887
-	rc = ahci_reset_controller(host);
1935
+	rc = ahci_pci_reset_controller(host);
18881936 	if (rc)
18891937 		return rc;
18901938 
....@@ -1908,6 +1956,9 @@
19081956 
19091957 static void ahci_remove_one(struct pci_dev *pdev)
19101958 {
1959
+	sysfs_remove_file_from_group(&pdev->dev.kobj,
1960
+				     &dev_attr_remapped_nvme.attr,
1961
+				     NULL);
19111962 	pm_runtime_get_noresume(&pdev->dev);
19121963 	ata_pci_remove_one(pdev);
19131964 }