add ax88772C AX88772C_eeprom_tools

hc

2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
..
..
@@ -90,9 +90,130 @@
90
90
     	};
91
91
 #endif
92
92
 
93
+		leds: leds {
94
+		compatible = "gpio-leds";
95
+		sig_led: sig_led {
96
+			gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
97
+			default-state = "on";
98
+		};
99
+	};
100
+	
101
+		leds: leds {
102
+		compatible = "gpio-leds";	
103
+		err_led: err_led {
104
+			gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
105
+			default-state = "on";
106
+		};
107
+	};
108
+
109
+
110
+	ndj_io_init {
111
+         	compatible = "nk_io_control";	
112
+			pinctrl-names = "default";
113
+        	pinctrl-0 = <&nk_io_gpio>;
114
+			
115
+			//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
116
+			
117
+			vcc_5v {
118
+				gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
119
+				gpio_function = <0>;	
120
+			};
121
+			
122
+			vcc_12v {
123
+				gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;  //VCC12_IO_EN_GPIO0_C7_3V3
124
+				gpio_function = <0>;
125
+			};
126
+			
127
+			vcc_3.3v {
128
+				gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
129
+				gpio_function = <0>;
130
+			};
131
+			
132
+			hub_host2_rst {
133
+				gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;  //HUB_RST_GPIO4_D2_3V3
134
+				gpio_function = <3>;
135
+			};
136
+			
137
+			hub_host3 {
138
+				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
139
+				gpio_function = <0>;
140
+			};
141
+			
142
+			wake_4g {
143
+				gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
144
+				gpio_function = <0>;
145
+			};
146
+			
147
+			air_mode_4g {
148
+				gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
149
+				gpio_function = <0>;
150
+			};
151
+			
152
+			reset_4g {
153
+				gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
154
+				gpio_function = <3>;
155
+			};
156
+			
157
+			en_4g {
158
+				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
159
+				gpio_function = <0>;
160
+			};
161
+			
162
+			//gpio99 {
163
+			//	gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
164
+			//	gpio_function = <1>;
165
+			//};
166
+			
167
+			wifi_power_en {
168
+				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
169
+				gpio_function = <0>;
170
+			};
171
+	#if 0		
172
+			do1 {
173
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
174
+				gpio_function = <0>;
175
+			};
176
+			
177
+			do2 {
178
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
179
+				gpio_function = <0>;
180
+			};
181
+			
182
+			do3 {
183
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
184
+				gpio_function = <0>;
185
+			};
186
+			
187
+			do4 {
188
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
189
+				gpio_function = <0>;
190
+			};
191
+			
192
+			do5 {
193
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
194
+				gpio_function = <0>;
195
+			};
196
+			
197
+			do6 {
198
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
199
+				gpio_function = <0>;
200
+			};
201
+			
202
+			do7 {
203
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
204
+				gpio_function = <0>;
205
+			};
206
+			
207
+			di1 {
208
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
209
+				gpio_function = <1>;
210
+			};
211
+	#endif
212
+		};
213
+#if 0			
93
214
 	    nk_io_init {
94
215
                 compatible = "nk_io_control";
95
-				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
216
+//				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
96
217
                 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
97
218
                 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
98
219
                 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
..
..
@@ -108,7 +229,7 @@
108
229
 				pinctrl-names = "default";
109
230
 				pinctrl-0 = <&nk_io_gpio>;				
110
231
         };
111
-		
232
+#endif	
112
233
 		panel: panel {
113
234
 				compatible = "simple-panel";
114
235
 				backlight = <&backlight>;
..
..
@@ -128,8 +249,8 @@
128
249
 				nodka-lvds = <15>;
129
250
 
130
251
 				display-timings {
131
-                native-mode = <&timing0>;
132
-                timing0: timing0 {
252
+                native-mode = <&timing>;
253
+                timing: timing {
133
254
 					clock-frequency = <72500000>;
134
255
 					hactive = <1280>;
135
256
 					vactive = <800>;
..
..
@@ -146,8 +267,8 @@
146
267
 					};
147
268
 				};
148
269
 				ports {
149
-					panel_in: endpoint {
150
-					remote-endpoint = <&edp_out>;
270
+					panel_in_lvds: endpoint {
271
+					remote-endpoint = <&lvds_out>;
151
272
 						};
152
273
 					};   
153
274
 				};
..
..
@@ -239,7 +360,7 @@
239
360
  */
240
361
  
241
362
 &video_phy1 {
242
-	status = "okay";
363
+	status = "disabled";
243
364
 }; 
244
365
 &dsi1 {
245
366
 	status = "disabled";
..
..
@@ -250,11 +371,11 @@
250
371
 };
251
372
 
252
373
 &dsi1_in_vp1 {
253
-	status = "okay";
374
+	status = "disabled";
254
375
 };
255
376
 
256
377
 &dsi1_panel {
257
-	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
378
+//	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
258
379
     vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
259
380
     reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
260
381
     vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
..
..
@@ -274,20 +395,11 @@
274
395
 
275
396
 &edp {
276
397
     force-hpd;
277
-    status = "okay";
278
-    ports {
279
-        port@1 {
280
-            reg = <1>;
281
-            edp_out: endpoint {
282
-                remote-endpoint = <&panel_in>;
283
-            };
284
-        };
285
-    };
398
+	status = "disabled";
286
399
 };
287
400
 
288
401
 &edp_phy {
289
-  status = "okay";
290
-
402
+	status = "disabled";
291
403
 };
292
404
 
293
405
 &edp_in_vp0 {
..
..
@@ -295,18 +407,40 @@
295
407
 };
296
408
 
297
409
 &edp_in_vp1 {
298
-    status = "okay";
410
+    status = "disabled";
299
411
 
300
412
 };
301
413
 
302
414
 &route_edp {
303
-    status = "okay";
415
+    status = "disabled";
304
416
     connect = <&vp1_out_edp>;
305
417
 };
306
418
 
307
419
 &route_edp {
308
-	status = "okay";
420
+	status = "disabled";
309
421
 };
422
+
423
+&lvds {
424
+	status = "disabled";
425
+	ports {
426
+		port@1 {
427
+			reg = <1>;
428
+			lvds_out:endpoint {
429
+				remote-endpoint = <&panel_in_lvds>;
430
+			};
431
+		};
432
+	};
433
+};
434
+
435
+&route_lvds{
436
+	status = "okay";
437
+	connect = <&vp1_out_lvds>;
438
+};
439
+
440
+&lvds_in_vp1 {
441
+	status = "disabled";
442
+};
443
+
310
444
 /*
311
445
 *  edp_end
312
446
 */
..
..
@@ -351,7 +485,7 @@
351
485
 	phy-mode = "rgmii";
352
486
 	clock_in_out = "output";
353
487
 
354
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
488
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
355
489
 	snps,reset-active-low;
356
490
 	/* Reset time is 20ms, 100ms for rtl8211f */
357
491
 	snps,reset-delays-us = <0 20000 100000>;
..
..
@@ -371,7 +505,9 @@
371
505
 	rx_delay = <0x2f>;
372
506
 
373
507
 	phy-handle = <&rgmii_phy0>;
508
+	
374
509
 	status = "disabled";
510
+	
375
511
 };
376
512
 
377
513
 &gmac1 {
..
..
@@ -405,9 +541,7 @@
405
541
  * power-supply should switche to vcc3v3_lcd1_n
406
542
  * when mipi panel is connected to dsi1.
407
543
  */
408
-&gt1x {
409
-	power-supply = <&vcc3v3_lcd0_n>;
410
-};
544
+
411
545
 
412
546
 &i2c3 {
413
547
 	status = "okay";
..
..
@@ -426,7 +560,7 @@
426
560
 };
427
561
 
428
562
 &i2c4 {
429
-	status = "okay";
563
+	status = "disabled";
430
564
 	gc8034: gc8034@37 {
431
565
 		compatible = "galaxycore,gc8034";
432
566
 		status = "okay";
..
..
@@ -438,7 +572,6 @@
438
572
 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
439
573
 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
440
574
 		rockchip,grf = <&grf>;
441
-		power-domains = <&power RK3568_PD_VI>;
442
575
 		rockchip,camera-module-index = <0>;
443
576
 		rockchip,camera-module-facing = "back";
444
577
 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..
..
@@ -472,7 +605,7 @@
472
605
 		};
473
606
 	};
474
607
 	ov5695: ov5695@36 {
475
-		status = "okay";
608
+		status = "disabled";
476
609
 		compatible = "ovti,ov5695";
477
610
 		reg = <0x36>;
478
611
 		clocks = <&cru CLK_CIF_OUT>;
..
..
@@ -525,7 +658,7 @@
525
658
 
526
659
 
527
660
 &pcie30phy {
528
-	status = "okay";
661
+	status = "disabled";
529
662
 };
530
663
 
531
664
 &pcie2x1 {
..
..
@@ -584,11 +717,21 @@
584
717
 							<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
585
718
 							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
586
719
 							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
720
+							<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
721
+							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
722
+							<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
587
723
 							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
588
-							<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
589
-							<2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
590
-							<2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
591
-							<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
724
+							<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B0_u_3V3  DO1
725
+							<0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B3_u_3V3  DO2
726
+							<0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B4_u_3V3  DO3
727
+							<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B5_u_3V3  DO4
728
+							<0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B6_u_3V3  DO5
729
+							
730
+							<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C0_d_3V3 DI1_1
731
+							<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C1_d_3V3 DI2_1
732
+							<0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C2_d_3V3 DI3_1
733
+							<0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C3_d_3V3 DI4_1
734
+							<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C5_d_3V3 DI5_1
592
735
 							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
593
736
 		};
594
737
 	};
..
..
@@ -615,8 +758,6 @@
615
758
 		};
616
759
 	};
617
760
 };
618
-
619
-
620
761
 
621
762
 
622
763
 
..
..
@@ -656,15 +797,6 @@
656
797
 	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
657
798
 };
658
799
 
659
-&vcc3v3_lcd0_n {
660
-	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
661
-	enable-active-high;
662
-};
663
-
664
-&vcc3v3_lcd1_n {
665
-	gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
666
-	enable-active-high;
667
-};
668
800
 
669
801
 &wireless_wlan {
670
802
 	pinctrl-names = "default";
..
..
@@ -684,17 +816,17 @@
684
816
 	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
685
817
     BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
686
818
     BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
687
-	status = "okay";
819
+	status = "disabled";
688
820
 };
689
821
 
690
822
 &uart0 {
691
-	status = "okay";
823
+	status = "disabled";
692
824
 };
693
825
 
694
826
 &uart1 {	
695
827
 	pinctrl-names = "default";	
696
828
 	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;	
697
-	status = "okay";		
829
+	status = "disabled";		
698
830
 };
699
831
 
700
832
 &uart3 {
..
..
@@ -703,7 +835,7 @@
703
835
 };
704
836
 
705
837
 &uart4 {
706
-	status = "okay";
838
+	status = "disabled";
707
839
 	pinctrl-0 = <&uart4m1_xfer>;
708
840
 };
709
841
 
..
..
@@ -712,12 +844,18 @@
712
844
 	pinctrl-0 = <&uart5m1_xfer>;
713
845
 };
714
846
 
847
+
715
848
 &uart7 {
716
849
 	status = "okay";
717
850
 	pinctrl-0 = <&uart7m1_xfer>;
718
851
 };
719
852
 
853
+&uart8 {
854
+	status = "disabled";
855
+	pinctrl-0 = <&uart8m1_xfer>;
856
+};
857
+
720
858
 &uart9 {
721
-	status = "okay";
859
+	status = "disabled";
722
860
 	pinctrl-0 = <&uart9m1_xfer>;
723
861
 };