forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -8,6 +8,7 @@
88
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314
....@@ -17,7 +18,8 @@
1718
1819 rk_headset: rk-headset {
1920 compatible = "rockchip_headset";
20
- headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 pinctrl-names = "default";
2224 pinctrl-0 = <&hp_det>;
2325 };
....@@ -32,15 +34,6 @@
3234 vin-supply = <&vcc3v3_sys>;
3335 };
3436
35
- vcc3v3_vga: vcc3v3-vga {
36
- compatible = "regulator-fixed";
37
- regulator-name = "vcc3v3_vga";
38
- regulator-always-on;
39
- regulator-boot-on;
40
- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41
- enable-active-high;
42
- vin-supply = <&vcc3v3_sys>;
43
- };
4437
4538 pcie30_avdd0v9: pcie30-avdd0v9 {
4639 compatible = "regulator-fixed";
....@@ -67,7 +60,9 @@
6760 regulator-name = "vcc3v3_pcie";
6861 regulator-min-microvolt = <3300000>;
6962 regulator-max-microvolt = <3300000>;
63
+ regulator-always-on;
7064 enable-active-high;
65
+ regulator-boot-on;
7166 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
7267 startup-delay-us = <5000>;
7368 vin-supply = <&dc_12v>;
....@@ -95,37 +90,188 @@
9590 };
9691 #endif
9792
93
+ leds: leds {
94
+ compatible = "gpio-leds";
95
+ sig_led: sig_led {
96
+ gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
97
+ default-state = "on";
98
+ };
99
+ };
100
+
101
+ leds: leds {
102
+ compatible = "gpio-leds";
103
+ err_led: err_led {
104
+ gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
105
+ default-state = "on";
106
+ };
107
+ };
108
+
109
+
110
+ ndj_io_init {
111
+ compatible = "nk_io_control";
112
+ pinctrl-names = "default";
113
+ pinctrl-0 = <&nk_io_gpio>;
114
+
115
+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
116
+
117
+ vcc_5v {
118
+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
119
+ gpio_function = <0>;
120
+ };
121
+
122
+ vcc_12v {
123
+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
124
+ gpio_function = <0>;
125
+ };
126
+
127
+ vcc_3.3v {
128
+ gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
129
+ gpio_function = <0>;
130
+ };
131
+
132
+ hub_host2_rst {
133
+ gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
134
+ gpio_function = <3>;
135
+ };
136
+
137
+ hub_host3 {
138
+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
139
+ gpio_function = <0>;
140
+ };
141
+
142
+ wake_4g {
143
+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
144
+ gpio_function = <0>;
145
+ };
146
+
147
+ air_mode_4g {
148
+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
149
+ gpio_function = <0>;
150
+ };
151
+
152
+ reset_4g {
153
+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
154
+ gpio_function = <3>;
155
+ };
156
+
157
+ en_4g {
158
+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
159
+ gpio_function = <0>;
160
+ };
161
+
162
+ //gpio99 {
163
+ // gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
164
+ // gpio_function = <1>;
165
+ //};
166
+
167
+ wifi_power_en {
168
+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
169
+ gpio_function = <0>;
170
+ };
171
+ #if 0
172
+ do1 {
173
+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
174
+ gpio_function = <0>;
175
+ };
176
+
177
+ do2 {
178
+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
179
+ gpio_function = <0>;
180
+ };
181
+
182
+ do3 {
183
+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
184
+ gpio_function = <0>;
185
+ };
186
+
187
+ do4 {
188
+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
189
+ gpio_function = <0>;
190
+ };
191
+
192
+ do5 {
193
+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
194
+ gpio_function = <0>;
195
+ };
196
+
197
+ do6 {
198
+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
199
+ gpio_function = <0>;
200
+ };
201
+
202
+ do7 {
203
+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
204
+ gpio_function = <0>;
205
+ };
206
+
207
+ di1 {
208
+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
209
+ gpio_function = <1>;
210
+ };
211
+ #endif
212
+ };
213
+#if 0
98214 nk_io_init {
99215 compatible = "nk_io_control";
100
- usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
101
- lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
102
- lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
103
- vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
216
+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
104217 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
105218 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
106
-// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
107219 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
108220 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
109221 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
110222 reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
111223 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
112224 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
113
-
114
- edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
115
- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
116
- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
117
- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
118
- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
119
- edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
120
-// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
121
-// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
122
-
225
+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
226
+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
123227 wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
124
-
228
+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
125229 pinctrl-names = "default";
126
- pinctrl-0 = <&nk_io_gpio>;
127
- nodka_lvds = <9>;
230
+ pinctrl-0 = <&nk_io_gpio>;
128231 };
232
+#endif
233
+ panel: panel {
234
+ compatible = "simple-panel";
235
+ backlight = <&backlight>;
236
+ power-supply = <&vcc3v3_lcd0_n>;
237
+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
238
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
239
+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
240
+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
241
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
242
+ bpc = <8>;
243
+ prepare-delay-ms = <200>;
244
+ enable-delay-ms = <20>;
245
+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
246
+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
247
+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
248
+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
249
+ nodka-lvds = <15>;
250
+
251
+ display-timings {
252
+ native-mode = <&timing>;
253
+ timing: timing {
254
+ clock-frequency = <72500000>;
255
+ hactive = <1280>;
256
+ vactive = <800>;
257
+ hfront-porch = <70>;
258
+ hsync-len = <2>;
259
+ hback-porch = <88>;
260
+ vfront-porch = <7>;
261
+ vsync-len = <4>;
262
+ vback-porch = <17>;
263
+ hsync-active = <21>;
264
+ vsync-active = <0>;
265
+ de-active = <0>;
266
+ pixelclk-active = <0>;
267
+ };
268
+ };
269
+ ports {
270
+ panel_in_lvds: endpoint {
271
+ remote-endpoint = <&lvds_out>;
272
+ };
273
+ };
274
+ };
129275 };
130276
131277 &combphy0_us {
....@@ -141,11 +287,11 @@
141287 };
142288
143289 &csi2_dphy_hw {
144
- status = "okay";
290
+ status = "disabled";
145291 };
146292
147293 &csi2_dphy0 {
148
- status = "okay";
294
+ status = "disabled";
149295
150296 ports {
151297 #address-cells = <1>;
....@@ -188,8 +334,12 @@
188334 * video_phy0 needs to be enabled
189335 * when dsi0 is enabled
190336 */
337
+&video_phy0 {
338
+ status = "disabled";
339
+};
340
+
191341 &dsi0 {
192
- status = "okay";
342
+ status = "disabled";
193343 };
194344
195345 &dsi0_in_vp0 {
....@@ -197,7 +347,7 @@
197347 };
198348
199349 &dsi0_in_vp1 {
200
- status = "okay";
350
+ status = "disabled";
201351 };
202352
203353 &dsi0_panel {
....@@ -208,6 +358,10 @@
208358 * video_phy1 needs to be enabled
209359 * when dsi1 is enabled
210360 */
361
+
362
+&video_phy1 {
363
+ status = "disabled";
364
+};
211365 &dsi1 {
212366 status = "disabled";
213367 };
....@@ -221,31 +375,117 @@
221375 };
222376
223377 &dsi1_panel {
224
- power-supply = <&vcc3v3_lcd1_n>;
378
+// power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
379
+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
380
+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
381
+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
382
+ pinctrl-names = "default";
383
+ pinctrl-0 = <&lcd1_rst_gpio>;
225384 };
226385
386
+&route_dsi1 {
387
+ status = "disabled";
388
+ connect = <&vp1_out_dsi1>;
389
+};
390
+
391
+
392
+/*
393
+* edp_start
394
+*/
395
+
227396 &edp {
228
- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
229
- status = "okay";
397
+ force-hpd;
398
+ status = "disabled";
230399 };
231400
232401 &edp_phy {
233
- status = "okay";
402
+ status = "disabled";
234403 };
235404
236405 &edp_in_vp0 {
237
- status = "okay";
406
+ status = "disabled";
238407 };
239408
240409 &edp_in_vp1 {
410
+ status = "disabled";
411
+
412
+};
413
+
414
+&route_edp {
415
+ status = "disabled";
416
+ connect = <&vp1_out_edp>;
417
+};
418
+
419
+&route_edp {
241420 status = "disabled";
242421 };
422
+
423
+&lvds {
424
+ status = "disabled";
425
+ ports {
426
+ port@1 {
427
+ reg = <1>;
428
+ lvds_out:endpoint {
429
+ remote-endpoint = <&panel_in_lvds>;
430
+ };
431
+ };
432
+ };
433
+};
434
+
435
+&route_lvds{
436
+ status = "okay";
437
+ connect = <&vp1_out_lvds>;
438
+};
439
+
440
+&lvds_in_vp1 {
441
+ status = "disabled";
442
+};
443
+
444
+/*
445
+* edp_end
446
+*/
447
+
448
+/*
449
+* Hdmi_start
450
+*/
451
+
452
+&hdmi {
453
+ status = "okay";
454
+ rockchip,phy-table =
455
+ <92812500 0x8009 0x0000 0x0270>,
456
+ <165000000 0x800b 0x0000 0x026d>,
457
+ <185625000 0x800b 0x0000 0x01ed>,
458
+ <297000000 0x800b 0x0000 0x01ad>,
459
+ <594000000 0x8029 0x0000 0x0088>,
460
+ <000000000 0x0000 0x0000 0x0000>;
461
+};
462
+
463
+&route_hdmi {
464
+ status = "okay";
465
+ connect = <&vp0_out_hdmi>;
466
+};
467
+
468
+&hdmi_in_vp0 {
469
+ status = "okay";
470
+};
471
+
472
+&hdmi_in_vp1 {
473
+ status = "disabled";
474
+};
475
+
476
+&hdmi_sound {
477
+ status = "okay";
478
+};
479
+
480
+/*
481
+ * Hdmi_END
482
+*/
243483
244484 &gmac0 {
245485 phy-mode = "rgmii";
246486 clock_in_out = "output";
247487
248
- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
488
+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
249489 snps,reset-active-low;
250490 /* Reset time is 20ms, 100ms for rtl8211f */
251491 snps,reset-delays-us = <0 20000 100000>;
....@@ -265,7 +505,9 @@
265505 rx_delay = <0x2f>;
266506
267507 phy-handle = <&rgmii_phy0>;
508
+
268509 status = "disabled";
510
+
269511 };
270512
271513 &gmac1 {
....@@ -299,9 +541,7 @@
299541 * power-supply should switche to vcc3v3_lcd1_n
300542 * when mipi panel is connected to dsi1.
301543 */
302
-&gt1x {
303
- power-supply = <&vcc3v3_lcd0_n>;
304
-};
544
+
305545
306546 &i2c3 {
307547 status = "okay";
....@@ -317,13 +557,10 @@
317557 compatible = "nk_mcu";
318558 reg = <0x15>;
319559 };
320
-
321
-
322
-
323560 };
324561
325562 &i2c4 {
326
- status = "okay";
563
+ status = "disabled";
327564 gc8034: gc8034@37 {
328565 compatible = "galaxycore,gc8034";
329566 status = "okay";
....@@ -335,7 +572,6 @@
335572 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
336573 pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
337574 rockchip,grf = <&grf>;
338
- power-domains = <&power RK3568_PD_VI>;
339575 rockchip,camera-module-index = <0>;
340576 rockchip,camera-module-facing = "back";
341577 rockchip,camera-module-name = "RK-CMK-8M-2-v1";
....@@ -369,7 +605,7 @@
369605 };
370606 };
371607 ov5695: ov5695@36 {
372
- status = "okay";
608
+ status = "disabled";
373609 compatible = "ovti,ov5695";
374610 reg = <0x36>;
375611 clocks = <&cru CLK_CIF_OUT>;
....@@ -392,6 +628,19 @@
392628 };
393629 };
394630
631
+&i2c5 {
632
+ status = "okay";
633
+
634
+ hym8563: hym8563@51 {
635
+ compatible = "haoyu,hym8563";
636
+ reg = <0x51>;
637
+ #clock-cells = <0>;
638
+ clock-frequency = <32768>;
639
+ clock-output-names = "xin32k";
640
+ /* rtc_int is not connected */
641
+ };
642
+};
643
+
395644 &mdio0 {
396645 rgmii_phy0: phy@0 {
397646 compatible = "ethernet-phy-ieee802.3-c22";
....@@ -406,20 +655,14 @@
406655 };
407656 };
408657
409
-&video_phy0 {
410
- status = "okay";
411
-};
412658
413
-&video_phy1 {
659
+
660
+&pcie30phy {
414661 status = "disabled";
415662 };
416663
417
-&pcie30phy {
418
- status = "okay";
419
-};
420
-
421
-&pcie3x2 {
422
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
664
+&pcie2x1 {
665
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
423666 vpcie3v3-supply = <&vcc3v3_pcie>;
424667 status = "okay";
425668 };
....@@ -434,7 +677,8 @@
434677 // };
435678 headphone {
436679 hp_det: hp-det {
437
- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
680
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
681
+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
438682 };
439683 };
440684
....@@ -449,23 +693,60 @@
449693 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
450694 };
451695 };
696
+
697
+ lcd1 {
698
+ lcd1_rst_gpio: lcd1-rst-gpio {
699
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
700
+ };
701
+ };
702
+
452703 nk_io_init{
453704 nk_io_gpio: nk-io-gpio{
454
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
705
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
706
+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
707
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
708
+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
709
+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
710
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
711
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
712
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
713
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
714
+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
715
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
716
+ <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
717
+ <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
718
+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
719
+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
720
+ <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
721
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
722
+ <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
723
+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
724
+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B0_u_3V3 DO1
725
+ <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B3_u_3V3 DO2
726
+ <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B4_u_3V3 DO3
727
+ <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B5_u_3V3 DO4
728
+ <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B6_u_3V3 DO5
729
+
730
+ <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C0_d_3V3 DI1_1
731
+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C1_d_3V3 DI2_1
732
+ <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C2_d_3V3 DI3_1
733
+ <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C3_d_3V3 DI4_1
734
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C5_d_3V3 DI5_1
735
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
455736 };
456737 };
457738 };
458739
459740 &rkisp {
460
- status = "okay";
741
+ status = "disabled";
461742 };
462743
463744 &rkisp_mmu {
464
- status = "okay";
745
+ status = "disabled";
465746 };
466747
467748 &rkisp_vir0 {
468
- status = "okay";
749
+ status = "disabled";
469750
470751 port {
471752 #address-cells = <1>;
....@@ -478,15 +759,7 @@
478759 };
479760 };
480761
481
-&route_dsi0 {
482
- status = "okay";
483
- connect = <&vp1_out_dsi0>;
484
-};
485762
486
-&route_edp {
487
- status = "okay";
488
- connect = <&vp0_out_edp>;
489
-};
490763
491764 &sata2 {
492765 status = "okay";
....@@ -524,15 +797,6 @@
524797 pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
525798 };
526799
527
-&vcc3v3_lcd0_n {
528
- gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
529
- enable-active-high;
530
-};
531
-
532
-&vcc3v3_lcd1_n {
533
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
534
- enable-active-high;
535
-};
536800
537801 &wireless_wlan {
538802 pinctrl-names = "default";
....@@ -546,18 +810,23 @@
546810 clock-names = "ext_clock";
547811 //wifi-bt-power-toggle;
548812 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
549
- BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
550813 pinctrl-names = "default", "rts_gpio";
551814 pinctrl-0 = <&uart1m0_rtsn>;
552815 pinctrl-1 = <&uart1_gpios>;
553
- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
554
- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
555
- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
816
+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
817
+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
818
+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
556819 status = "disabled";
557820 };
558821
559822 &uart0 {
560
- status = "okay";
823
+ status = "disabled";
824
+};
825
+
826
+&uart1 {
827
+ pinctrl-names = "default";
828
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
829
+ status = "disabled";
561830 };
562831
563832 &uart3 {
....@@ -566,7 +835,7 @@
566835 };
567836
568837 &uart4 {
569
- status = "okay";
838
+ status = "disabled";
570839 pinctrl-0 = <&uart4m1_xfer>;
571840 };
572841
....@@ -575,12 +844,18 @@
575844 pinctrl-0 = <&uart5m1_xfer>;
576845 };
577846
847
+
578848 &uart7 {
579849 status = "okay";
580850 pinctrl-0 = <&uart7m1_xfer>;
581851 };
582852
853
+&uart8 {
854
+ status = "disabled";
855
+ pinctrl-0 = <&uart8m1_xfer>;
856
+};
857
+
583858 &uart9 {
584
- status = "okay";
859
+ status = "disabled";
585860 pinctrl-0 = <&uart9m1_xfer>;
586861 };