~hc/RK356X_SDK_RELEASE.git

old mode 100644new mode 100755

..	..	@@ -8,12 +8,21 @@
8	8
9	9	#include <dt-bindings/gpio/gpio.h>
10	10	#include <dt-bindings/pinctrl/rockchip.h>
	11	+#include <dt-bindings/display/media-bus-format.h>
11	12	#include "rk3568.dtsi"
12	13	#include "rk3568-evb.dtsi"
13	14
14	15	/ {
15	16	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
16	17	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
	18	+
	19	+ rk_headset: rk-headset {
	20	+ compatible = "rockchip_headset";
	21	+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
	22	+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
	23	+ pinctrl-names = "default";
	24	+ pinctrl-0 = <&hp_det>;
	25	+ };
17	26
18	27	vcc2v5_sys: vcc2v5-ddr {
19	28	compatible = "regulator-fixed";
..	..	@@ -25,15 +34,6 @@
25	34	vin-supply = <&vcc3v3_sys>;
26	35	};
27	36
28		- vcc3v3_vga: vcc3v3-vga {
29		- compatible = "regulator-fixed";
30		- regulator-name = "vcc3v3_vga";
31		- regulator-always-on;
32		- regulator-boot-on;
33		- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
34		- enable-active-high;
35		- vin-supply = <&vcc3v3_sys>;
36		- };
37	37
38	38	pcie30_avdd0v9: pcie30-avdd0v9 {
39	39	compatible = "regulator-fixed";
..	..	@@ -60,7 +60,9 @@
60	60	regulator-name = "vcc3v3_pcie";
61	61	regulator-min-microvolt = <3300000>;
62	62	regulator-max-microvolt = <3300000>;
	63	+ regulator-always-on;
63	64	enable-active-high;
	65	+ regulator-boot-on;
64	66	gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
65	67	startup-delay-us = <5000>;
66	68	vin-supply = <&dc_12v>;
..	..	@@ -85,8 +87,25 @@
85	87	enable-active-high;
86	88	regulator-always-on;
87	89	regulator-boot-on;
88		- };
	90	+ };
89	91	#endif
	92	+
	93	+ leds: leds {
	94	+ compatible = "gpio-leds";
	95	+ sig_led: sig_led {
	96	+ gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
	97	+ default-state = "on";
	98	+ };
	99	+ };
	100	+
	101	+ leds: leds {
	102	+ compatible = "gpio-leds";
	103	+ err_led: err_led {
	104	+ gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
	105	+ default-state = "on";
	106	+ };
	107	+ };
	108	+
90	109
91	110	ndj_io_init {
92	111	compatible = "nk_io_control";
..	..	@@ -102,6 +121,11 @@
102	121
103	122	vcc_12v {
104	123	gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
	124	+ gpio_function = <0>;
	125	+ };
	126	+
	127	+ vcc_3.3v {
	128	+ gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
105	129	gpio_function = <0>;
106	130	};
107	131
..	..	@@ -135,10 +159,10 @@
135	159	gpio_function = <0>;
136	160	};
137	161
138		- hp_en {
139		- gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
140		- gpio_function = <0>;
141		- };
	162	+ //gpio99 {
	163	+ // gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
	164	+ // gpio_function = <1>;
	165	+ //};
142	166
143	167	wifi_power_en {
144	168	gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
..	..	@@ -185,7 +209,69 @@
185	209	gpio_function = <1>;
186	210	};
187	211	#endif
188		-};
	212	+ };
	213	+#if 0
	214	+ nk_io_init {
	215	+ compatible = "nk_io_control";
	216	+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
	217	+ hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
	218	+ hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
	219	+ vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	220	+ vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
	221	+ en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
	222	+ reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
	223	+ air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
	224	+ wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
	225	+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
	226	+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
	227	+ wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
	228	+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
	229	+ pinctrl-names = "default";
	230	+ pinctrl-0 = <&nk_io_gpio>;
	231	+ };
	232	+#endif
	233	+ panel: panel {
	234	+ compatible = "simple-panel";
	235	+ backlight = <&backlight>;
	236	+ power-supply = <&vcc3v3_lcd0_n>;
	237	+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
	238	+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
	239	+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	240	+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	241	+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
	242	+ bpc = <8>;
	243	+ prepare-delay-ms = <200>;
	244	+ enable-delay-ms = <20>;
	245	+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
	246	+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
	247	+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
	248	+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
	249	+ nodka-lvds = <15>;
	250	+
	251	+ display-timings {
	252	+ native-mode = <&timing>;
	253	+ timing: timing {
	254	+ clock-frequency = <72500000>;
	255	+ hactive = <1280>;
	256	+ vactive = <800>;
	257	+ hfront-porch = <70>;
	258	+ hsync-len = <2>;
	259	+ hback-porch = <88>;
	260	+ vfront-porch = <7>;
	261	+ vsync-len = <4>;
	262	+ vback-porch = <17>;
	263	+ hsync-active = <21>;
	264	+ vsync-active = <0>;
	265	+ de-active = <0>;
	266	+ pixelclk-active = <0>;
	267	+ };
	268	+ };
	269	+ ports {
	270	+ panel_in_lvds: endpoint {
	271	+ remote-endpoint = <&lvds_out>;
	272	+ };
	273	+ };
	274	+ };
189	275	};
190	276
191	277	&combphy0_us {
..	..	@@ -248,6 +334,10 @@
248	334	* video_phy0 needs to be enabled
249	335	* when dsi0 is enabled
250	336	*/
	337	+&video_phy0 {
	338	+ status = "disabled";
	339	+};
	340	+
251	341	&dsi0 {
252	342	status = "disabled";
253	343	};
..	..	@@ -268,6 +358,10 @@
268	358	* video_phy1 needs to be enabled
269	359	* when dsi1 is enabled
270	360	*/
	361	+
	362	+&video_phy1 {
	363	+ status = "disabled";
	364	+};
271	365	&dsi1 {
272	366	status = "disabled";
273	367	};
..	..	@@ -281,31 +375,117 @@
281	375	};
282	376
283	377	&dsi1_panel {
284		- power-supply = <&vcc3v3_lcd1_n>;
	378	+// power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
	379	+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
	380	+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
	381	+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	382	+ pinctrl-names = "default";
	383	+ pinctrl-0 = <&lcd1_rst_gpio>;
285	384	};
286	385
	386	+&route_dsi1 {
	387	+ status = "disabled";
	388	+ connect = <&vp1_out_dsi1>;
	389	+};
	390	+
	391	+
	392	+/*
	393	+* edp_start
	394	+*/
	395	+
287	396	&edp {
288		- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
289		- status = "okay";
	397	+ force-hpd;
	398	+ status = "disabled";
290	399	};
291	400
292	401	&edp_phy {
293		- status = "okay";
	402	+ status = "disabled";
294	403	};
295	404
296	405	&edp_in_vp0 {
297		- status = "okay";
	406	+ status = "disabled";
298	407	};
299	408
300	409	&edp_in_vp1 {
	410	+ status = "disabled";
	411	+
	412	+};
	413	+
	414	+&route_edp {
	415	+ status = "disabled";
	416	+ connect = <&vp1_out_edp>;
	417	+};
	418	+
	419	+&route_edp {
301	420	status = "disabled";
302	421	};
	422	+
	423	+&lvds {
	424	+ status = "disabled";
	425	+ ports {
	426	+ port@1 {
	427	+ reg = <1>;
	428	+ lvds_out:endpoint {
	429	+ remote-endpoint = <&panel_in_lvds>;
	430	+ };
	431	+ };
	432	+ };
	433	+};
	434	+
	435	+&route_lvds{
	436	+ status = "okay";
	437	+ connect = <&vp1_out_lvds>;
	438	+};
	439	+
	440	+&lvds_in_vp1 {
	441	+ status = "disabled";
	442	+};
	443	+
	444	+/*
	445	+* edp_end
	446	+*/
	447	+
	448	+/*
	449	+* Hdmi_start
	450	+*/
	451	+
	452	+&hdmi {
	453	+ status = "okay";
	454	+ rockchip,phy-table =
	455	+ <92812500 0x8009 0x0000 0x0270>,
	456	+ <165000000 0x800b 0x0000 0x026d>,
	457	+ <185625000 0x800b 0x0000 0x01ed>,
	458	+ <297000000 0x800b 0x0000 0x01ad>,
	459	+ <594000000 0x8029 0x0000 0x0088>,
	460	+ <000000000 0x0000 0x0000 0x0000>;
	461	+};
	462	+
	463	+&route_hdmi {
	464	+ status = "okay";
	465	+ connect = <&vp0_out_hdmi>;
	466	+};
	467	+
	468	+&hdmi_in_vp0 {
	469	+ status = "okay";
	470	+};
	471	+
	472	+&hdmi_in_vp1 {
	473	+ status = "disabled";
	474	+};
	475	+
	476	+&hdmi_sound {
	477	+ status = "okay";
	478	+};
	479	+
	480	+/*
	481	+ * Hdmi_END
	482	+*/
303	483
304	484	&gmac0 {
305	485	phy-mode = "rgmii";
306	486	clock_in_out = "output";
307	487
308		- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
	488	+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
309	489	snps,reset-active-low;
310	490	/* Reset time is 20ms, 100ms for rtl8211f */
311	491	snps,reset-delays-us = <0 20000 100000>;
..	..	@@ -325,7 +505,9 @@
325	505	rx_delay = <0x2f>;
326	506
327	507	phy-handle = <&rgmii_phy0>;
	508	+
328	509	status = "disabled";
	510	+
329	511	};
330	512
331	513	&gmac1 {
..	..	@@ -359,8 +541,22 @@
359	541	* power-supply should switche to vcc3v3_lcd1_n
360	542	* when mipi panel is connected to dsi1.
361	543	*/
362		-&gt1x {
363		- power-supply = <&vcc3v3_lcd0_n>;
	544	+
	545	+
	546	+&i2c3 {
	547	+ status = "okay";
	548	+ //mac eeprom
	549	+ eeprom@51 {
	550	+ //compatible = "atmel,24c02";
	551	+ compatible = "atmel,24c256";
	552	+ reg = <0x51>;
	553	+ };
	554	+
	555	+ //nk-mcu
	556	+ nkmcu@15 {
	557	+ compatible = "nk_mcu";
	558	+ reg = <0x15>;
	559	+ };
364	560	};
365	561
366	562	&i2c4 {
..	..	@@ -376,7 +572,6 @@
376	572	reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
377	573	pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
378	574	rockchip,grf = <&grf>;
379		- power-domains = <&power RK3568_PD_VI>;
380	575	rockchip,camera-module-index = <0>;
381	576	rockchip,camera-module-facing = "back";
382	577	rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..	..	@@ -433,6 +628,19 @@
433	628	};
434	629	};
435	630
	631	+&i2c5 {
	632	+ status = "okay";
	633	+
	634	+ hym8563: hym8563@51 {
	635	+ compatible = "haoyu,hym8563";
	636	+ reg = <0x51>;
	637	+ #clock-cells = <0>;
	638	+ clock-frequency = <32768>;
	639	+ clock-output-names = "xin32k";
	640	+ /* rtc_int is not connected */
	641	+ };
	642	+};
	643	+
436	644	&mdio0 {
437	645	rgmii_phy0: phy@0 {
438	646	compatible = "ethernet-phy-ieee802.3-c22";
..	..	@@ -447,50 +655,51 @@
447	655	};
448	656	};
449	657
450		-&video_phy0 {
451		- status = "disabled";
452		-};
453	658
454		-&video_phy1 {
455		- status = "disabled";
456		-};
457	659
458	660	&pcie30phy {
459		- status = "okay";
	661	+ status = "disabled";
460	662	};
461	663
462		-&pcie3x2 {
463		- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
	664	+&pcie2x1 {
	665	+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
464	666	vpcie3v3-supply = <&vcc3v3_pcie>;
465	667	status = "okay";
466	668	};
467	669
468	670	&pinctrl {
469		- cam {
470		- camera_pwr: camera-pwr {
471		- rockchip,pins =
472		- /* camera power en */
473		- <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
474		- };
475		- };
	671	+// cam {
	672	+// camera_pwr: camera-pwr {
	673	+// rockchip,pins =
	674	+// /* camera power en */
	675	+// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
	676	+// };
	677	+// };
476	678	headphone {
477	679	hp_det: hp-det {
478		- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
	680	+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
	681	+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
479	682	};
480	683	};
481	684
482	685	wireless-wlan {
483	686	wifi_host_wake_irq: wifi-host-wake-irq {
484		- rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
	687	+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
485	688	};
486	689	};
487	690
488	691	wireless-bluetooth {
489		- uart8_gpios: uart8-gpios {
490		- rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
	692	+ uart1_gpios: uart1-gpios {
	693	+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
491	694	};
492	695	};
493	696
	697	+ lcd1 {
	698	+ lcd1_rst_gpio: lcd1-rst-gpio {
	699	+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
	700	+ };
	701	+ };
	702	+
494	703	nk_io_init{
495	704	nk_io_gpio: nk-io-gpio{
496	705	rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..	..	@@ -500,7 +709,7 @@
500	709	<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
501	710	<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
502	711	<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
503		- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
	712	+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
504	713	<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
505	714	<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
506	715	<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..	..	@@ -508,18 +717,24 @@
508	717	<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
509	718	<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
510	719	<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
	720	+ <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
	721	+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
	722	+ <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
511	723	<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
512		- <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
513		- <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
514		- <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
515		- <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
	724	+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B0_u_3V3 DO1
	725	+ <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B3_u_3V3 DO2
	726	+ <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B4_u_3V3 DO3
	727	+ <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B5_u_3V3 DO4
	728	+ <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_B6_u_3V3 DO5
	729	+
	730	+ <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C0_d_3V3 DI1_1
	731	+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C1_d_3V3 DI2_1
	732	+ <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C2_d_3V3 DI3_1
	733	+ <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C3_d_3V3 DI4_1
	734	+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,//GPIO0_C5_d_3V3 DI5_1
516	735	<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
517	736	};
518	737	};
519		-};
520		-
521		-&rk809_sound {
522		- hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
523	738	};
524	739
525	740	&rkisp {
..	..	@@ -531,7 +746,7 @@
531	746	};
532	747
533	748	&rkisp_vir0 {
534		- status = "okay";
	749	+ status = "disabled";
535	750
536	751	port {
537	752	#address-cells = <1>;
..	..	@@ -544,34 +759,30 @@
544	759	};
545	760	};
546	761
547		-&route_dsi0 {
548		- status = "disabled";
549		- connect = <&vp1_out_dsi0>;
550		-};
551	762
552		-&route_edp {
553		- status = "okay";
554		- connect = <&vp0_out_edp>;
555		-};
556	763
557	764	&sata2 {
558	765	status = "okay";
559	766	};
560	767
561	768	&sdmmc2 {
562		- max-frequency = <150000000>;
563		- supports-sdio;
564		- bus-width = <4>;
565		- disable-wp;
566		- cap-sd-highspeed;
567		- cap-sdio-irq;
568		- keep-power-in-suspend;
569		- mmc-pwrseq = <&sdio_pwrseq>;
570		- non-removable;
571		- pinctrl-names = "default";
572		- pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
573		- sd-uhs-sdr104;
574		- status = "okay";
	769	+ status = "disabled";
	770	+};
	771	+
	772	+&sdmmc1 {
	773	+ max-frequency = <150000000>;
	774	+ supports-sdio;
	775	+ bus-width = <4>;
	776	+ disable-wp;
	777	+ cap-sd-highspeed;
	778	+ cap-sdio-irq;
	779	+ keep-power-in-suspend;
	780	+ mmc-pwrseq = <&sdio_pwrseq>;
	781	+ non-removable;
	782	+ pinctrl-names = "default";
	783	+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
	784	+ sd-uhs-sdr104;
	785	+ status = "okay";
575	786	};
576	787
577	788	&spdif_8ch {
..	..	@@ -581,25 +792,16 @@
581	792	};
582	793
583	794	&uart8 {
584		- status = "okay";
	795	+ status = "disabled";
585	796	pinctrl-names = "default";
586	797	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
587	798	};
588	799
589		-&vcc3v3_lcd0_n {
590		- gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
591		- enable-active-high;
592		-};
593		-
594		-&vcc3v3_lcd1_n {
595		- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
596		- enable-active-high;
597		-};
598	800
599	801	&wireless_wlan {
600	802	pinctrl-names = "default";
601	803	pinctrl-0 = <&wifi_host_wake_irq>;
602		- WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
	804	+ WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
603	805	};
604	806
605	807	&wireless_bluetooth {
..	..	@@ -607,12 +809,53 @@
607	809	clocks = <&rk809 1>;
608	810	clock-names = "ext_clock";
609	811	//wifi-bt-power-toggle;
610		- uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
	812	+ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
611	813	pinctrl-names = "default", "rts_gpio";
612		- pinctrl-0 = <&uart8m0_rtsn>;
613		- pinctrl-1 = <&uart8_gpios>;
614		- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
615		- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
616		- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
	814	+ pinctrl-0 = <&uart1m0_rtsn>;
	815	+ pinctrl-1 = <&uart1_gpios>;
	816	+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
	817	+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
	818	+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
	819	+ status = "disabled";
	820	+};
	821	+
	822	+&uart0 {
	823	+ status = "disabled";
	824	+};
	825	+
	826	+&uart1 {
	827	+ pinctrl-names = "default";
	828	+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
	829	+ status = "disabled";
	830	+};
	831	+
	832	+&uart3 {
617	833	status = "okay";
	834	+ pinctrl-0 = <&uart3m1_xfer>;
	835	+};
	836	+
	837	+&uart4 {
	838	+ status = "disabled";
	839	+ pinctrl-0 = <&uart4m1_xfer>;
	840	+};
	841	+
	842	+&uart5 {
	843	+ status = "okay";
	844	+ pinctrl-0 = <&uart5m1_xfer>;
	845	+};
	846	+
	847	+
	848	+&uart7 {
	849	+ status = "okay";
	850	+ pinctrl-0 = <&uart7m1_xfer>;
	851	+};
	852	+
	853	+&uart8 {
	854	+ status = "disabled";
	855	+ pinctrl-0 = <&uart8m1_xfer>;
	856	+};
	857	+
	858	+&uart9 {
	859	+ status = "disabled";
	860	+ pinctrl-0 = <&uart9m1_xfer>;
618	861	};