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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * NVIDIA Tegra SoC device tree board support |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2011, 2013, NVIDIA Corporation |
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5 | 6 | * Copyright (C) 2010 Secret Lab Technologies, Ltd. |
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6 | 7 | * Copyright (C) 2010 Google, Inc. |
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7 | | - * |
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8 | | - * This software is licensed under the terms of the GNU General Public |
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9 | | - * License version 2, as published by the Free Software Foundation, and |
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10 | | - * may be copied, distributed, and modified under those terms. |
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11 | | - * |
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12 | | - * This program is distributed in the hope that it will be useful, |
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13 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 | | - * GNU General Public License for more details. |
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16 | | - * |
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17 | 8 | */ |
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18 | 9 | |
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19 | 10 | #include <linux/clk.h> |
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.. | .. |
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35 | 26 | #include <linux/sys_soc.h> |
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36 | 27 | #include <linux/usb/tegra_usb_phy.h> |
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37 | 28 | |
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| 29 | +#include <linux/firmware/trusted_foundations.h> |
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| 30 | + |
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38 | 31 | #include <soc/tegra/fuse.h> |
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39 | 32 | #include <soc/tegra/pmc.h> |
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40 | 33 | |
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| 34 | +#include <asm/firmware.h> |
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41 | 35 | #include <asm/hardware/cache-l2x0.h> |
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42 | 36 | #include <asm/mach/arch.h> |
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43 | 37 | #include <asm/mach/time.h> |
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44 | 38 | #include <asm/mach-types.h> |
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| 39 | +#include <asm/psci.h> |
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45 | 40 | #include <asm/setup.h> |
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46 | | -#include <asm/trusted_foundations.h> |
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47 | 41 | |
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48 | 42 | #include "board.h" |
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49 | 43 | #include "common.h" |
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50 | | -#include "cpuidle.h" |
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51 | 44 | #include "iomap.h" |
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52 | | -#include "irq.h" |
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53 | 45 | #include "pm.h" |
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54 | 46 | #include "reset.h" |
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55 | 47 | #include "sleep.h" |
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.. | .. |
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74 | 66 | { |
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75 | 67 | of_register_trusted_foundations(); |
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76 | 68 | tegra_cpu_reset_handler_init(); |
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| 69 | + call_firmware_op(l2x0_init); |
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77 | 70 | } |
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78 | 71 | |
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79 | 72 | static void __init tegra_dt_init_irq(void) |
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.. | .. |
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92 | 85 | static void __init tegra_dt_init_late(void) |
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93 | 86 | { |
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94 | 87 | tegra_init_suspend(); |
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95 | | - tegra_cpuidle_init(); |
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96 | 88 | |
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97 | 89 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && |
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98 | 90 | of_machine_is_compatible("compal,paz00")) |
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.. | .. |
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101 | 93 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && |
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102 | 94 | of_machine_is_compatible("nvidia,tegra20")) |
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103 | 95 | platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); |
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| 96 | + |
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| 97 | + if (IS_ENABLED(CONFIG_ARM_TEGRA_CPUIDLE) && !psci_smp_available()) |
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| 98 | + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); |
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| 99 | + |
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| 100 | + if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && |
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| 101 | + of_machine_is_compatible("nvidia,tegra30")) |
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| 102 | + platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); |
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104 | 103 | } |
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105 | 104 | |
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106 | 105 | static const char * const tegra_dt_board_compat[] = { |
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