| .. | .. |
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| 18 | 18 | - reg : offset and length of the device registers. |
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| 19 | 19 | - bus-frequency : the clock frequency for QUICC Engine. |
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| 20 | 20 | - fsl,qe-num-riscs: define how many RISC engines the QE has. |
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| 21 | | -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the |
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| 21 | +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value, |
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| 22 | + defining the array of serial number (SNUM) values for the virtual |
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| 22 | 23 | threads. |
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| 23 | 24 | |
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| 24 | 25 | Optional properties: |
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| .. | .. |
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| 34 | 35 | - brg-frequency : the internal clock source frequency for baud-rate |
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| 35 | 36 | generators in Hz. |
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| 36 | 37 | |
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| 38 | +Deprecated properties |
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| 39 | +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use |
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| 40 | + for the threads. Use fsl,qe-snums instead to not only specify the |
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| 41 | + number of snums, but also their values. |
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| 42 | + |
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| 37 | 43 | Example: |
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| 38 | 44 | qe@e0100000 { |
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| 39 | 45 | #address-cells = <1>; |
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| .. | .. |
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| 44 | 50 | reg = <e0100000 480>; |
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| 45 | 51 | brg-frequency = <0>; |
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| 46 | 52 | bus-frequency = <179A7B00>; |
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| 53 | + fsl,qe-snums = /bits/ 8 < |
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| 54 | + 0x04 0x05 0x0C 0x0D 0x14 0x15 0x1C 0x1D |
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| 55 | + 0x24 0x25 0x2C 0x2D 0x34 0x35 0x88 0x89 |
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| 56 | + 0x98 0x99 0xA8 0xA9 0xB8 0xB9 0xC8 0xC9 |
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| 57 | + 0xD8 0xD9 0xE8 0xE9>; |
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| 47 | 58 | } |
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| 48 | 59 | |
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| 49 | 60 | * Multi-User RAM (MURAM) |
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