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| 1 | | -Analog Device AXI-DMAC DMA controller |
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| 1 | +Analog Devices AXI-DMAC DMA controller |
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| 2 | 2 | |
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| 3 | 3 | Required properties: |
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| 4 | 4 | - compatible: Must be "adi,axi-dmac-1.00.a". |
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| 18 | 18 | |
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| 19 | 19 | Required channel sub-node properties: |
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| 20 | 20 | - reg: Which channel this node refers to. |
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| 21 | | - - adi,length-width: Width of the DMA transfer length register. |
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| 22 | 21 | - adi,source-bus-width, |
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| 23 | 22 | adi,destination-bus-width: Width of the source or destination bus in bits. |
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| 24 | 23 | - adi,source-bus-type, |
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| .. | .. |
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| 28 | 27 | 1 (AXI_DMAC_TYPE_AXI_STREAM): Streaming AXI interface |
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| 29 | 28 | 2 (AXI_DMAC_TYPE_AXI_FIFO): FIFO interface |
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| 30 | 29 | |
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| 31 | | -Optional channel properties: |
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| 30 | +Deprecated optional channel properties: |
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| 31 | + - adi,length-width: Width of the DMA transfer length register. |
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| 32 | 32 | - adi,cyclic: Must be set if the channel supports hardware cyclic DMA |
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| 33 | 33 | transfers. |
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| 34 | 34 | - adi,2d: Must be set if the channel supports hardware 2D DMA transfers. |
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