修改GPIO导出默认初始值

hc

2024-10-16 50a212ec906f7524620675f0c57357691c26c81f

 kernel/drivers/scsi/qla2xxx/qla_nx.h
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@@ -1,13 +1,12 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * QLogic Fibre Channel HBA Driver
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  * Copyright (c)  2003-2014 QLogic Corporation
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- *
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- * See LICENSE.qla2xxx for copyright and licensing details.
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  */
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 #ifndef __QLA_NX_H
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 #define __QLA_NX_H
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-#include <linux/io-64-nonatomic-lo-hi.h>
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+#include <scsi/scsi.h>
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 /*
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  * Following are the states of the Phantom. Phantom will set them and
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@@ -486,13 +485,13 @@
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 #define QLA82XX_ADDR_QDR_NET		(0x0000000300000000ULL)
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 #define QLA82XX_P3_ADDR_QDR_NET_MAX	(0x0000000303ffffffULL)
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-#define QLA82XX_PCI_CRBSPACE		(unsigned long)0x06000000
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-#define QLA82XX_PCI_DIRECT_CRB		(unsigned long)0x04400000
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-#define QLA82XX_PCI_CAMQM		(unsigned long)0x04800000
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-#define QLA82XX_PCI_CAMQM_MAX		(unsigned long)0x04ffffff
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-#define QLA82XX_PCI_DDR_NET		(unsigned long)0x00000000
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-#define QLA82XX_PCI_QDR_NET		(unsigned long)0x04000000
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-#define QLA82XX_PCI_QDR_NET_MAX		(unsigned long)0x043fffff
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+#define QLA82XX_PCI_CRBSPACE		0x06000000UL
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+#define QLA82XX_PCI_DIRECT_CRB		0x04400000UL
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+#define QLA82XX_PCI_CAMQM		0x04800000UL
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+#define QLA82XX_PCI_CAMQM_MAX		0x04ffffffUL
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+#define QLA82XX_PCI_DDR_NET		0x00000000UL
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+#define QLA82XX_PCI_QDR_NET		0x04000000UL
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+#define QLA82XX_PCI_QDR_NET_MAX		0x043fffffUL
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 /*
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  *   Register offsets for MN
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@@ -800,16 +799,16 @@
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 #define QLA82XX_URI_FIRMWARE_IDX_OFF	29
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 struct qla82xx_uri_table_desc{
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-	uint32_t	findex;
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-	uint32_t	num_entries;
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-	uint32_t	entry_size;
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-	uint32_t	reserved[5];
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+	__le32	findex;
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+	__le32	num_entries;
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+	__le32	entry_size;
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+	__le32	reserved[5];
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 };
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 struct qla82xx_uri_data_desc{
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-	uint32_t	findex;
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-	uint32_t	size;
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-	uint32_t	reserved[5];
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+	__le32	findex;
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+	__le32	size;
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+	__le32	reserved[5];
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 };
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 /* UNIFIED ROMIMAGE END */
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@@ -829,22 +828,22 @@
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  * ISP 8021 I/O Register Set structure definitions.
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  */
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 struct device_reg_82xx {
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-	uint32_t req_q_out[64];		/* Request Queue out-Pointer (64 * 4) */
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-	uint32_t rsp_q_in[64];		/* Response Queue In-Pointer. */
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-	uint32_t rsp_q_out[64];		/* Response Queue Out-Pointer. */
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+	__le32	req_q_out[64];		/* Request Queue out-Pointer (64 * 4) */
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+	__le32	rsp_q_in[64];		/* Response Queue In-Pointer. */
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+	__le32	rsp_q_out[64];		/* Response Queue Out-Pointer. */
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-	uint16_t mailbox_in[32];	/* Mail box In registers */
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-	uint16_t unused_1[32];
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-	uint32_t hint;			/* Host interrupt register */
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+	__le16	mailbox_in[32];		/* Mailbox In registers */
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+	__le16	unused_1[32];
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+	__le32	hint;			/* Host interrupt register */
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 #define	HINT_MBX_INT_PENDING	BIT_0
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-	uint16_t unused_2[62];
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-	uint16_t mailbox_out[32];	/* Mail box Out registers */
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-	uint32_t unused_3[48];
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+	__le16	unused_2[62];
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+	__le16	mailbox_out[32];	/* Mailbox Out registers */
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+	__le32	unused_3[48];
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-	uint32_t host_status;		/* host status */
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+	__le32	host_status;		/* host status */
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 #define HSRX_RISC_INT		BIT_15	/* RISC to Host interrupt. */
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 #define HSRX_RISC_PAUSED	BIT_8	/* RISC Paused. */
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-	uint32_t host_int;		/* Interrupt status. */
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+	__le32	host_int;		/* Interrupt status. */
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 #define ISRX_NX_RISC_INT	BIT_0	/* RISC interrupt. */
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 };
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