修改GPIO导出默认初始值

hc

2024-10-16 50a212ec906f7524620675f0c57357691c26c81f

 kernel/arch/xtensa/kernel/hw_breakpoint.c
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@@ -12,7 +12,7 @@
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 #include <linux/log2.h>
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 #include <linux/percpu.h>
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 #include <linux/perf_event.h>
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-#include <variant/core.h>
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+#include <asm/core.h>
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 /* Breakpoint currently in use for each IBREAKA. */
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 static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[XCHAL_NUM_IBREAK]);
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@@ -101,30 +101,30 @@
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 	switch (sr) {
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 #if XCHAL_NUM_IBREAK > 0
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 	case SREG_IBREAKA + 0:
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-		WSR(v, SREG_IBREAKA + 0);
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+		xtensa_set_sr(v, SREG_IBREAKA + 0);
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 		break;
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 #endif
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 #if XCHAL_NUM_IBREAK > 1
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 	case SREG_IBREAKA + 1:
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-		WSR(v, SREG_IBREAKA + 1);
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+		xtensa_set_sr(v, SREG_IBREAKA + 1);
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 		break;
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 #endif
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 #if XCHAL_NUM_DBREAK > 0
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 	case SREG_DBREAKA + 0:
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-		WSR(v, SREG_DBREAKA + 0);
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+		xtensa_set_sr(v, SREG_DBREAKA + 0);
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 		break;
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 	case SREG_DBREAKC + 0:
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-		WSR(v, SREG_DBREAKC + 0);
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+		xtensa_set_sr(v, SREG_DBREAKC + 0);
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 		break;
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 #endif
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 #if XCHAL_NUM_DBREAK > 1
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 	case SREG_DBREAKA + 1:
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-		WSR(v, SREG_DBREAKA + 1);
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+		xtensa_set_sr(v, SREG_DBREAKA + 1);
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 		break;
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 	case SREG_DBREAKC + 1:
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-		WSR(v, SREG_DBREAKC + 1);
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+		xtensa_set_sr(v, SREG_DBREAKC + 1);
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 		break;
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 #endif
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 	}
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@@ -150,8 +150,8 @@
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 	unsigned long ibreakenable;
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 	xtensa_wsr(info->address, SREG_IBREAKA + reg);
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-	RSR(ibreakenable, SREG_IBREAKENABLE);
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-	WSR(ibreakenable | (1 << reg), SREG_IBREAKENABLE);
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+	ibreakenable = xtensa_get_sr(SREG_IBREAKENABLE);
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+	xtensa_set_sr(ibreakenable | (1 << reg), SREG_IBREAKENABLE);
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 }
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 static void set_dbreak_regs(int reg, struct perf_event *bp)
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@@ -214,8 +214,9 @@
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 		/* Breakpoint */
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 		i = free_slot(this_cpu_ptr(bp_on_reg), XCHAL_NUM_IBREAK, bp);
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 		if (i >= 0) {
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-			RSR(ibreakenable, SREG_IBREAKENABLE);
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-			WSR(ibreakenable & ~(1 << i), SREG_IBREAKENABLE);
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+			ibreakenable = xtensa_get_sr(SREG_IBREAKENABLE);
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+			xtensa_set_sr(ibreakenable & ~(1 << i),
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+				      SREG_IBREAKENABLE);
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 		}
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 	} else {
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 		/* Watchpoint */