.. | .. |
---|
90 | 90 | static void __init mips_nmi_setup(void) |
---|
91 | 91 | { |
---|
92 | 92 | void *base; |
---|
93 | | - extern char except_vec_nmi; |
---|
| 93 | + extern char except_vec_nmi[]; |
---|
94 | 94 | |
---|
95 | 95 | base = cpu_has_veic ? |
---|
96 | 96 | (void *)(CAC_BASE + 0xa80) : |
---|
97 | 97 | (void *)(CAC_BASE + 0x380); |
---|
98 | | - memcpy(base, &except_vec_nmi, 0x80); |
---|
| 98 | + memcpy(base, except_vec_nmi, 0x80); |
---|
99 | 99 | flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
---|
100 | 100 | } |
---|
101 | 101 | |
---|
102 | 102 | static void __init mips_ejtag_setup(void) |
---|
103 | 103 | { |
---|
104 | 104 | void *base; |
---|
105 | | - extern char except_vec_ejtag_debug; |
---|
| 105 | + extern char except_vec_ejtag_debug[]; |
---|
106 | 106 | |
---|
107 | 107 | base = cpu_has_veic ? |
---|
108 | 108 | (void *)(CAC_BASE + 0xa00) : |
---|
109 | 109 | (void *)(CAC_BASE + 0x300); |
---|
110 | | - memcpy(base, &except_vec_ejtag_debug, 0x80); |
---|
| 110 | + memcpy(base, except_vec_ejtag_debug, 0x80); |
---|
111 | 111 | flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
---|
112 | 112 | } |
---|
113 | 113 | |
---|
.. | .. |
---|
118 | 118 | |
---|
119 | 119 | void __init prom_init(void) |
---|
120 | 120 | { |
---|
121 | | - mips_display_message("LINUX"); |
---|
122 | | - |
---|
123 | 121 | /* |
---|
124 | 122 | * early setup of _pcictrl_bonito so that we can determine |
---|
125 | 123 | * the system controller on a CORE_EMUL board |
---|
.. | .. |
---|
277 | 275 | |
---|
278 | 276 | default: |
---|
279 | 277 | /* Unknown system controller */ |
---|
280 | | - mips_display_message("SC Error"); |
---|
281 | 278 | while (1); /* We die here... */ |
---|
282 | 279 | } |
---|
283 | 280 | board_nmi_handler_setup = mips_nmi_setup; |
---|