修改GPIO导出默认初始值

hc

2024-10-16 50a212ec906f7524620675f0c57357691c26c81f

 kernel/arch/mips/cavium-octeon/setup.c
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@@ -16,6 +16,7 @@
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 #include <linux/export.h>
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 #include <linux/interrupt.h>
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 #include <linux/io.h>
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+#include <linux/memblock.h>
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 #include <linux/serial.h>
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 #include <linux/smp.h>
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 #include <linux/types.h>
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@@ -36,7 +37,9 @@
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 #include <asm/mipsregs.h>
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 #include <asm/bootinfo.h>
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 #include <asm/sections.h>
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+#include <asm/fw/fw.h>
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 #include <asm/setup.h>
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+#include <asm/prom.h>
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 #include <asm/time.h>
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 #include <asm/octeon/octeon.h>
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@@ -72,7 +75,7 @@
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 DEFINE_SEMAPHORE(octeon_bootbus_sem);
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 EXPORT_SYMBOL(octeon_bootbus_sem);
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-struct octeon_boot_descriptor *octeon_boot_desc_ptr;
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+static struct octeon_boot_descriptor *octeon_boot_desc_ptr;
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 struct cvmx_bootinfo *octeon_bootinfo;
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 EXPORT_SYMBOL(octeon_bootinfo);
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@@ -96,7 +99,7 @@
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 	"	sync						\n"
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 	"	synci	($0)					\n");
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-	relocated_kexec_smp_wait(NULL);
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+	kexec_reboot();
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 }
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 #endif
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@@ -351,11 +354,11 @@
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  *
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  * @s:	    String to write
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  */
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-void octeon_write_lcd(const char *s)
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+static void octeon_write_lcd(const char *s)
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 {
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 	if (octeon_bootinfo->led_display_base_addr) {
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 		void __iomem *lcd_address =
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-			ioremap_nocache(octeon_bootinfo->led_display_base_addr,
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+			ioremap(octeon_bootinfo->led_display_base_addr,
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 					8);
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 		int i;
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 		for (i = 0; i < 8; i++, s++) {
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@@ -373,7 +376,7 @@
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  *
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  * Returns uart	  (0 or 1)
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  */
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-int octeon_get_boot_uart(void)
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+static int octeon_get_boot_uart(void)
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 {
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 	return (octeon_boot_desc_ptr->flags & OCTEON_BL_FLAG_CONSOLE_UART1) ?
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 		1 : 0;
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@@ -842,7 +845,7 @@
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 	 * BIST should always be enabled when doing a soft reset. L2
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 	 * Cache locking for instance is not cleared unless BIST is
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 	 * enabled.  Unfortunately due to a chip errata G-200 for
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-	 * Cn38XX and CN31XX, BIST msut be disabled on these parts.
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+	 * Cn38XX and CN31XX, BIST must be disabled on these parts.
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 	 */
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 	if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2) ||
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 	    OCTEON_IS_MODEL(OCTEON_CN31XX))
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@@ -928,7 +931,7 @@
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 {
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 	if (addr > *mem && addr < *mem + *size) {
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 		u64 inc = addr - *mem;
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-		add_memory_region(*mem, inc, BOOT_MEM_RAM);
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+		memblock_add(*mem, inc);
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 		*mem += inc;
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 		*size -= inc;
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 	}
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@@ -990,23 +993,21 @@
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 /* Crashkernel ignores bootmem list. It relies on mem=X@Y option */
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 #ifdef CONFIG_CRASH_DUMP
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-	add_memory_region(reserve_low_mem, max_memory, BOOT_MEM_RAM);
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+	memblock_add(reserve_low_mem, max_memory);
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 	total += max_memory;
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 #else
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 #ifdef CONFIG_KEXEC
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 	if (crashk_size > 0) {
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-		add_memory_region(crashk_base, crashk_size, BOOT_MEM_RAM);
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+		memblock_add(crashk_base, crashk_size);
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 		crashk_end = crashk_base + crashk_size;
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 	}
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 #endif
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 	/*
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-	 * When allocating memory, we want incrementing addresses from
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-	 * bootmem_alloc so the code in add_memory_region can merge
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-	 * regions next to each other.
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+	 * When allocating memory, we want incrementing addresses,
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+	 * which is handled by memblock
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 	 */
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 	cvmx_bootmem_lock();
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-	while ((boot_mem_map.nr_map < BOOT_MEM_MAP_MAX)
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-		&& (total < max_memory)) {
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+	while (total < max_memory) {
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 		memory = cvmx_bootmem_phy_alloc(mem_alloc_size,
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 						__pa_symbol(&_end), -1,
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 						0x100000,
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@@ -1038,13 +1039,9 @@
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 			 */
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 			if (memory < crashk_base && end >  crashk_end) {
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 				/* region is fully in */
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-				add_memory_region(memory,
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-						  crashk_base - memory,
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-						  BOOT_MEM_RAM);
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+				memblock_add(memory, crashk_base - memory);
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 				total += crashk_base - memory;
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-				add_memory_region(crashk_end,
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-						  end - crashk_end,
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-						  BOOT_MEM_RAM);
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+				memblock_add(crashk_end, end - crashk_end);
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 				total += end - crashk_end;
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 				continue;
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 			}
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@@ -1072,7 +1069,7 @@
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 				 */
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 				mem_alloc_size -= end - crashk_base;
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 #endif
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-			add_memory_region(memory, mem_alloc_size, BOOT_MEM_RAM);
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+			memblock_add(memory, mem_alloc_size);
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 			total += mem_alloc_size;
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 			/* Recovering mem_alloc_size */
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 			mem_alloc_size = 4 << 20;
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@@ -1087,7 +1084,7 @@
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 	/* Adjust for physical offset. */
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 	kernel_start &= ~0xffffffff80000000ULL;
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-	add_memory_region(kernel_start, kernel_size, BOOT_MEM_RAM);
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+	memblock_add(kernel_start, kernel_size);
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 #endif /* CONFIG_CRASH_DUMP */
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 #ifdef CONFIG_CAVIUM_RESERVE32
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@@ -1125,7 +1122,7 @@
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 void __init prom_free_prom_memory(void)
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 {
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-	if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR) {
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+	if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
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 		/* Check for presence of Core-14449 fix.  */
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 		u32 insn;
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 		u32 *foo;