| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 1 | 2 | /* |
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| 2 | 3 | * ARM Ltd. Versatile Express |
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| 3 | 4 | * |
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| .. | .. |
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| 18 | 19 | */ |
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| 19 | 20 | |
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| 20 | 21 | / { |
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| 21 | | - smb@8000000 { |
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| 22 | | - motherboard { |
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| 22 | + v2m_fixed_3v3: fixed-regulator-0 { |
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| 23 | + compatible = "regulator-fixed"; |
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| 24 | + regulator-name = "3V3"; |
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| 25 | + regulator-min-microvolt = <3300000>; |
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| 26 | + regulator-max-microvolt = <3300000>; |
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| 27 | + regulator-always-on; |
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| 28 | + }; |
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| 29 | + |
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| 30 | + v2m_clk24mhz: clk24mhz { |
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| 31 | + compatible = "fixed-clock"; |
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| 32 | + #clock-cells = <0>; |
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| 33 | + clock-frequency = <24000000>; |
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| 34 | + clock-output-names = "v2m:clk24mhz"; |
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| 35 | + }; |
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| 36 | + |
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| 37 | + v2m_refclk1mhz: refclk1mhz { |
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| 38 | + compatible = "fixed-clock"; |
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| 39 | + #clock-cells = <0>; |
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| 40 | + clock-frequency = <1000000>; |
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| 41 | + clock-output-names = "v2m:refclk1mhz"; |
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| 42 | + }; |
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| 43 | + |
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| 44 | + v2m_refclk32khz: refclk32khz { |
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| 45 | + compatible = "fixed-clock"; |
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| 46 | + #clock-cells = <0>; |
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| 47 | + clock-frequency = <32768>; |
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| 48 | + clock-output-names = "v2m:refclk32khz"; |
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| 49 | + }; |
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| 50 | + |
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| 51 | + leds { |
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| 52 | + compatible = "gpio-leds"; |
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| 53 | + |
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| 54 | + led-1 { |
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| 55 | + label = "v2m:green:user1"; |
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| 56 | + gpios = <&v2m_led_gpios 0 0>; |
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| 57 | + linux,default-trigger = "heartbeat"; |
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| 58 | + }; |
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| 59 | + |
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| 60 | + led-2 { |
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| 61 | + label = "v2m:green:user2"; |
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| 62 | + gpios = <&v2m_led_gpios 1 0>; |
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| 63 | + linux,default-trigger = "disk-activity"; |
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| 64 | + }; |
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| 65 | + |
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| 66 | + led-3 { |
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| 67 | + label = "v2m:green:user3"; |
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| 68 | + gpios = <&v2m_led_gpios 2 0>; |
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| 69 | + linux,default-trigger = "cpu0"; |
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| 70 | + }; |
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| 71 | + |
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| 72 | + led-4 { |
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| 73 | + label = "v2m:green:user4"; |
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| 74 | + gpios = <&v2m_led_gpios 3 0>; |
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| 75 | + linux,default-trigger = "cpu1"; |
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| 76 | + }; |
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| 77 | + |
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| 78 | + led-5 { |
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| 79 | + label = "v2m:green:user5"; |
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| 80 | + gpios = <&v2m_led_gpios 4 0>; |
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| 81 | + linux,default-trigger = "cpu2"; |
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| 82 | + }; |
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| 83 | + |
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| 84 | + led-6 { |
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| 85 | + label = "v2m:green:user6"; |
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| 86 | + gpios = <&v2m_led_gpios 5 0>; |
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| 87 | + linux,default-trigger = "cpu3"; |
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| 88 | + }; |
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| 89 | + |
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| 90 | + led-7 { |
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| 91 | + label = "v2m:green:user7"; |
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| 92 | + gpios = <&v2m_led_gpios 6 0>; |
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| 93 | + linux,default-trigger = "cpu4"; |
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| 94 | + }; |
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| 95 | + |
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| 96 | + led-8 { |
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| 97 | + label = "v2m:green:user8"; |
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| 98 | + gpios = <&v2m_led_gpios 7 0>; |
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| 99 | + linux,default-trigger = "cpu5"; |
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| 100 | + }; |
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| 101 | + }; |
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| 102 | + |
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| 103 | + bus@8000000 { |
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| 104 | + motherboard-bus { |
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| 23 | 105 | model = "V2M-P1"; |
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| 24 | 106 | arm,hbi = <0x190>; |
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| 25 | 107 | arm,vexpress,site = <0>; |
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| .. | .. |
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| 30 | 112 | #interrupt-cells = <1>; |
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| 31 | 113 | ranges; |
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| 32 | 114 | |
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| 33 | | - flash@0,00000000 { |
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| 115 | + nor_flash: flash@0 { |
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| 34 | 116 | compatible = "arm,vexpress-flash", "cfi-flash"; |
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| 35 | 117 | reg = <0 0x00000000 0x04000000>, |
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| 36 | 118 | <4 0x00000000 0x04000000>; |
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| 37 | 119 | bank-width = <4>; |
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| 120 | + partitions { |
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| 121 | + compatible = "arm,arm-firmware-suite"; |
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| 122 | + }; |
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| 38 | 123 | }; |
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| 39 | 124 | |
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| 40 | | - psram@1,00000000 { |
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| 125 | + psram@100000000 { |
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| 41 | 126 | compatible = "arm,vexpress-psram", "mtd-ram"; |
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| 42 | 127 | reg = <1 0x00000000 0x02000000>; |
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| 43 | 128 | bank-width = <4>; |
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| 44 | 129 | }; |
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| 45 | 130 | |
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| 46 | | - v2m_video_ram: vram@2,00000000 { |
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| 47 | | - compatible = "arm,vexpress-vram"; |
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| 48 | | - reg = <2 0x00000000 0x00800000>; |
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| 49 | | - }; |
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| 50 | | - |
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| 51 | | - ethernet@2,02000000 { |
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| 131 | + ethernet@202000000 { |
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| 52 | 132 | compatible = "smsc,lan9118", "smsc,lan9115"; |
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| 53 | 133 | reg = <2 0x02000000 0x10000>; |
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| 54 | 134 | interrupts = <15>; |
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| .. | .. |
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| 60 | 140 | vddvario-supply = <&v2m_fixed_3v3>; |
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| 61 | 141 | }; |
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| 62 | 142 | |
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| 63 | | - usb@2,03000000 { |
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| 143 | + usb@203000000 { |
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| 64 | 144 | compatible = "nxp,usb-isp1761"; |
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| 65 | 145 | reg = <2 0x03000000 0x20000>; |
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| 66 | 146 | interrupts = <16>; |
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| 67 | 147 | port1-otg; |
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| 68 | 148 | }; |
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| 69 | 149 | |
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| 70 | | - iofpga@3,00000000 { |
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| 150 | + iofpga-bus@300000000 { |
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| 71 | 151 | compatible = "simple-bus"; |
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| 72 | 152 | #address-cells = <1>; |
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| 73 | 153 | #size-cells = <1>; |
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| .. | .. |
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| 138 | 218 | mmci@50000 { |
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| 139 | 219 | compatible = "arm,pl180", "arm,primecell"; |
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| 140 | 220 | reg = <0x050000 0x1000>; |
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| 141 | | - interrupts = <9 10>; |
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| 221 | + interrupts = <9>, <10>; |
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| 142 | 222 | cd-gpios = <&v2m_mmc_gpios 0 0>; |
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| 143 | 223 | wp-gpios = <&v2m_mmc_gpios 1 0>; |
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| 144 | 224 | max-frequency = <12000000>; |
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| .. | .. |
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| 163 | 243 | clock-names = "KMIREFCLK", "apb_pclk"; |
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| 164 | 244 | }; |
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| 165 | 245 | |
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| 166 | | - v2m_serial0: uart@90000 { |
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| 246 | + v2m_serial0: serial@90000 { |
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| 167 | 247 | compatible = "arm,pl011", "arm,primecell"; |
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| 168 | 248 | reg = <0x090000 0x1000>; |
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| 169 | 249 | interrupts = <5>; |
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| .. | .. |
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| 171 | 251 | clock-names = "uartclk", "apb_pclk"; |
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| 172 | 252 | }; |
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| 173 | 253 | |
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| 174 | | - v2m_serial1: uart@a0000 { |
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| 254 | + v2m_serial1: serial@a0000 { |
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| 175 | 255 | compatible = "arm,pl011", "arm,primecell"; |
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| 176 | 256 | reg = <0x0a0000 0x1000>; |
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| 177 | 257 | interrupts = <6>; |
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| .. | .. |
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| 179 | 259 | clock-names = "uartclk", "apb_pclk"; |
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| 180 | 260 | }; |
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| 181 | 261 | |
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| 182 | | - v2m_serial2: uart@b0000 { |
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| 262 | + v2m_serial2: serial@b0000 { |
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| 183 | 263 | compatible = "arm,pl011", "arm,primecell"; |
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| 184 | 264 | reg = <0x0b0000 0x1000>; |
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| 185 | 265 | interrupts = <7>; |
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| .. | .. |
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| 187 | 267 | clock-names = "uartclk", "apb_pclk"; |
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| 188 | 268 | }; |
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| 189 | 269 | |
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| 190 | | - v2m_serial3: uart@c0000 { |
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| 270 | + v2m_serial3: serial@c0000 { |
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| 191 | 271 | compatible = "arm,pl011", "arm,primecell"; |
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| 192 | 272 | reg = <0x0c0000 0x1000>; |
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| 193 | 273 | interrupts = <8>; |
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| .. | .. |
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| 200 | 280 | reg = <0x0f0000 0x1000>; |
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| 201 | 281 | interrupts = <0>; |
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| 202 | 282 | clocks = <&v2m_refclk32khz>, <&smbclk>; |
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| 203 | | - clock-names = "wdogclk", "apb_pclk"; |
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| 283 | + clock-names = "wdog_clk", "apb_pclk"; |
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| 204 | 284 | }; |
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| 205 | 285 | |
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| 206 | 286 | v2m_timer01: timer@110000 { |
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| .. | .. |
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| 223 | 303 | v2m_i2c_dvi: i2c@160000 { |
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| 224 | 304 | compatible = "arm,versatile-i2c"; |
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| 225 | 305 | reg = <0x160000 0x1000>; |
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| 226 | | - |
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| 227 | 306 | #address-cells = <1>; |
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| 228 | 307 | #size-cells = <0>; |
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| 229 | 308 | |
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| 230 | 309 | dvi-transmitter@39 { |
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| 231 | 310 | compatible = "sil,sii9022-tpi", "sil,sii9022"; |
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| 232 | 311 | reg = <0x39>; |
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| 312 | + |
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| 313 | + ports { |
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| 314 | + #address-cells = <1>; |
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| 315 | + #size-cells = <0>; |
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| 316 | + |
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| 317 | + port@0 { |
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| 318 | + reg = <0>; |
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| 319 | + dvi_bridge_in: endpoint { |
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| 320 | + remote-endpoint = <&clcd_pads>; |
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| 321 | + }; |
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| 322 | + }; |
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| 323 | + }; |
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| 233 | 324 | }; |
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| 234 | 325 | |
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| 235 | 326 | dvi-transmitter@60 { |
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| .. | .. |
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| 260 | 351 | interrupts = <14>; |
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| 261 | 352 | clocks = <&v2m_oscclk1>, <&smbclk>; |
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| 262 | 353 | clock-names = "clcdclk", "apb_pclk"; |
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| 263 | | - memory-region = <&v2m_video_ram>; |
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| 264 | | - max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */ |
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| 354 | + /* 800x600 16bpp @36MHz works fine */ |
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| 355 | + max-memory-bandwidth = <54000000>; |
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| 356 | + memory-region = <&vram>; |
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| 265 | 357 | |
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| 266 | 358 | port { |
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| 267 | | - v2m_clcd_pads: endpoint { |
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| 268 | | - remote-endpoint = <&v2m_clcd_panel>; |
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| 359 | + clcd_pads: endpoint { |
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| 360 | + remote-endpoint = <&dvi_bridge_in>; |
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| 269 | 361 | arm,pl11x,tft-r0g0b0-pads = <0 8 16>; |
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| 270 | 362 | }; |
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| 271 | 363 | }; |
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| 364 | + }; |
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| 272 | 365 | |
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| 273 | | - panel { |
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| 274 | | - compatible = "panel-dpi"; |
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| 366 | + mcc { |
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| 367 | + compatible = "arm,vexpress,config-bus"; |
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| 368 | + arm,vexpress,config-bridge = <&v2m_sysreg>; |
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| 275 | 369 | |
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| 276 | | - port { |
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| 277 | | - v2m_clcd_panel: endpoint { |
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| 278 | | - remote-endpoint = <&v2m_clcd_pads>; |
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| 279 | | - }; |
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| 280 | | - }; |
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| 281 | | - |
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| 282 | | - panel-timing { |
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| 283 | | - clock-frequency = <25175000>; |
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| 284 | | - hactive = <640>; |
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| 285 | | - hback-porch = <40>; |
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| 286 | | - hfront-porch = <24>; |
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| 287 | | - hsync-len = <96>; |
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| 288 | | - vactive = <480>; |
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| 289 | | - vback-porch = <32>; |
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| 290 | | - vfront-porch = <11>; |
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| 291 | | - vsync-len = <2>; |
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| 292 | | - }; |
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| 370 | + oscclk0 { |
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| 371 | + /* MCC static memory clock */ |
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| 372 | + compatible = "arm,vexpress-osc"; |
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| 373 | + arm,vexpress-sysreg,func = <1 0>; |
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| 374 | + freq-range = <25000000 60000000>; |
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| 375 | + #clock-cells = <0>; |
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| 376 | + clock-output-names = "v2m:oscclk0"; |
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| 293 | 377 | }; |
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| 294 | | - }; |
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| 295 | | - }; |
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| 296 | 378 | |
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| 297 | | - v2m_fixed_3v3: fixed-regulator-0 { |
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| 298 | | - compatible = "regulator-fixed"; |
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| 299 | | - regulator-name = "3V3"; |
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| 300 | | - regulator-min-microvolt = <3300000>; |
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| 301 | | - regulator-max-microvolt = <3300000>; |
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| 302 | | - regulator-always-on; |
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| 303 | | - }; |
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| 379 | + v2m_oscclk1: oscclk1 { |
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| 380 | + /* CLCD clock */ |
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| 381 | + compatible = "arm,vexpress-osc"; |
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| 382 | + arm,vexpress-sysreg,func = <1 1>; |
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| 383 | + freq-range = <23750000 65000000>; |
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| 384 | + #clock-cells = <0>; |
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| 385 | + clock-output-names = "v2m:oscclk1"; |
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| 386 | + }; |
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| 304 | 387 | |
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| 305 | | - v2m_clk24mhz: clk24mhz { |
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| 306 | | - compatible = "fixed-clock"; |
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| 307 | | - #clock-cells = <0>; |
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| 308 | | - clock-frequency = <24000000>; |
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| 309 | | - clock-output-names = "v2m:clk24mhz"; |
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| 310 | | - }; |
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| 388 | + v2m_oscclk2: oscclk2 { |
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| 389 | + /* IO FPGA peripheral clock */ |
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| 390 | + compatible = "arm,vexpress-osc"; |
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| 391 | + arm,vexpress-sysreg,func = <1 2>; |
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| 392 | + freq-range = <24000000 24000000>; |
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| 393 | + #clock-cells = <0>; |
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| 394 | + clock-output-names = "v2m:oscclk2"; |
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| 395 | + }; |
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| 311 | 396 | |
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| 312 | | - v2m_refclk1mhz: refclk1mhz { |
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| 313 | | - compatible = "fixed-clock"; |
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| 314 | | - #clock-cells = <0>; |
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| 315 | | - clock-frequency = <1000000>; |
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| 316 | | - clock-output-names = "v2m:refclk1mhz"; |
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| 317 | | - }; |
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| 397 | + volt-vio { |
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| 398 | + /* Logic level voltage */ |
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| 399 | + compatible = "arm,vexpress-volt"; |
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| 400 | + arm,vexpress-sysreg,func = <2 0>; |
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| 401 | + regulator-name = "VIO"; |
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| 402 | + regulator-always-on; |
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| 403 | + label = "VIO"; |
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| 404 | + }; |
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| 318 | 405 | |
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| 319 | | - v2m_refclk32khz: refclk32khz { |
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| 320 | | - compatible = "fixed-clock"; |
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| 321 | | - #clock-cells = <0>; |
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| 322 | | - clock-frequency = <32768>; |
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| 323 | | - clock-output-names = "v2m:refclk32khz"; |
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| 324 | | - }; |
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| 406 | + temp-mcc { |
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| 407 | + /* MCC internal operating temperature */ |
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| 408 | + compatible = "arm,vexpress-temp"; |
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| 409 | + arm,vexpress-sysreg,func = <4 0>; |
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| 410 | + label = "MCC"; |
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| 411 | + }; |
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| 325 | 412 | |
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| 326 | | - leds { |
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| 327 | | - compatible = "gpio-leds"; |
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| 413 | + reset { |
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| 414 | + compatible = "arm,vexpress-reset"; |
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| 415 | + arm,vexpress-sysreg,func = <5 0>; |
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| 416 | + }; |
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| 328 | 417 | |
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| 329 | | - user1 { |
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| 330 | | - label = "v2m:green:user1"; |
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| 331 | | - gpios = <&v2m_led_gpios 0 0>; |
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| 332 | | - linux,default-trigger = "heartbeat"; |
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| 333 | | - }; |
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| 418 | + muxfpga { |
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| 419 | + compatible = "arm,vexpress-muxfpga"; |
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| 420 | + arm,vexpress-sysreg,func = <7 0>; |
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| 421 | + }; |
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| 334 | 422 | |
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| 335 | | - user2 { |
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| 336 | | - label = "v2m:green:user2"; |
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| 337 | | - gpios = <&v2m_led_gpios 1 0>; |
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| 338 | | - linux,default-trigger = "mmc0"; |
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| 339 | | - }; |
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| 423 | + shutdown { |
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| 424 | + compatible = "arm,vexpress-shutdown"; |
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| 425 | + arm,vexpress-sysreg,func = <8 0>; |
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| 426 | + }; |
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| 340 | 427 | |
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| 341 | | - user3 { |
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| 342 | | - label = "v2m:green:user3"; |
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| 343 | | - gpios = <&v2m_led_gpios 2 0>; |
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| 344 | | - linux,default-trigger = "cpu0"; |
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| 345 | | - }; |
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| 428 | + reboot { |
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| 429 | + compatible = "arm,vexpress-reboot"; |
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| 430 | + arm,vexpress-sysreg,func = <9 0>; |
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| 431 | + }; |
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| 346 | 432 | |
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| 347 | | - user4 { |
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| 348 | | - label = "v2m:green:user4"; |
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| 349 | | - gpios = <&v2m_led_gpios 3 0>; |
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| 350 | | - linux,default-trigger = "cpu1"; |
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| 351 | | - }; |
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| 352 | | - |
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| 353 | | - user5 { |
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| 354 | | - label = "v2m:green:user5"; |
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| 355 | | - gpios = <&v2m_led_gpios 4 0>; |
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| 356 | | - linux,default-trigger = "cpu2"; |
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| 357 | | - }; |
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| 358 | | - |
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| 359 | | - user6 { |
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| 360 | | - label = "v2m:green:user6"; |
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| 361 | | - gpios = <&v2m_led_gpios 5 0>; |
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| 362 | | - linux,default-trigger = "cpu3"; |
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| 363 | | - }; |
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| 364 | | - |
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| 365 | | - user7 { |
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| 366 | | - label = "v2m:green:user7"; |
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| 367 | | - gpios = <&v2m_led_gpios 6 0>; |
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| 368 | | - linux,default-trigger = "cpu4"; |
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| 369 | | - }; |
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| 370 | | - |
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| 371 | | - user8 { |
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| 372 | | - label = "v2m:green:user8"; |
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| 373 | | - gpios = <&v2m_led_gpios 7 0>; |
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| 374 | | - linux,default-trigger = "cpu5"; |
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| 375 | | - }; |
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| 376 | | - }; |
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| 377 | | - |
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| 378 | | - mcc { |
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| 379 | | - compatible = "arm,vexpress,config-bus"; |
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| 380 | | - arm,vexpress,config-bridge = <&v2m_sysreg>; |
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| 381 | | - |
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| 382 | | - oscclk0 { |
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| 383 | | - /* MCC static memory clock */ |
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| 384 | | - compatible = "arm,vexpress-osc"; |
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| 385 | | - arm,vexpress-sysreg,func = <1 0>; |
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| 386 | | - freq-range = <25000000 60000000>; |
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| 387 | | - #clock-cells = <0>; |
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| 388 | | - clock-output-names = "v2m:oscclk0"; |
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| 389 | | - }; |
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| 390 | | - |
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| 391 | | - v2m_oscclk1: oscclk1 { |
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| 392 | | - /* CLCD clock */ |
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| 393 | | - compatible = "arm,vexpress-osc"; |
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| 394 | | - arm,vexpress-sysreg,func = <1 1>; |
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| 395 | | - freq-range = <23750000 65000000>; |
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| 396 | | - #clock-cells = <0>; |
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| 397 | | - clock-output-names = "v2m:oscclk1"; |
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| 398 | | - }; |
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| 399 | | - |
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| 400 | | - v2m_oscclk2: oscclk2 { |
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| 401 | | - /* IO FPGA peripheral clock */ |
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| 402 | | - compatible = "arm,vexpress-osc"; |
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| 403 | | - arm,vexpress-sysreg,func = <1 2>; |
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| 404 | | - freq-range = <24000000 24000000>; |
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| 405 | | - #clock-cells = <0>; |
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| 406 | | - clock-output-names = "v2m:oscclk2"; |
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| 407 | | - }; |
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| 408 | | - |
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| 409 | | - volt-vio { |
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| 410 | | - /* Logic level voltage */ |
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| 411 | | - compatible = "arm,vexpress-volt"; |
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| 412 | | - arm,vexpress-sysreg,func = <2 0>; |
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| 413 | | - regulator-name = "VIO"; |
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| 414 | | - regulator-always-on; |
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| 415 | | - label = "VIO"; |
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| 416 | | - }; |
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| 417 | | - |
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| 418 | | - temp-mcc { |
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| 419 | | - /* MCC internal operating temperature */ |
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| 420 | | - compatible = "arm,vexpress-temp"; |
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| 421 | | - arm,vexpress-sysreg,func = <4 0>; |
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| 422 | | - label = "MCC"; |
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| 423 | | - }; |
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| 424 | | - |
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| 425 | | - reset { |
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| 426 | | - compatible = "arm,vexpress-reset"; |
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| 427 | | - arm,vexpress-sysreg,func = <5 0>; |
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| 428 | | - }; |
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| 429 | | - |
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| 430 | | - muxfpga { |
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| 431 | | - compatible = "arm,vexpress-muxfpga"; |
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| 432 | | - arm,vexpress-sysreg,func = <7 0>; |
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| 433 | | - }; |
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| 434 | | - |
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| 435 | | - shutdown { |
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| 436 | | - compatible = "arm,vexpress-shutdown"; |
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| 437 | | - arm,vexpress-sysreg,func = <8 0>; |
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| 438 | | - }; |
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| 439 | | - |
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| 440 | | - reboot { |
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| 441 | | - compatible = "arm,vexpress-reboot"; |
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| 442 | | - arm,vexpress-sysreg,func = <9 0>; |
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| 443 | | - }; |
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| 444 | | - |
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| 445 | | - dvimode { |
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| 446 | | - compatible = "arm,vexpress-dvimode"; |
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| 447 | | - arm,vexpress-sysreg,func = <11 0>; |
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| 433 | + dvimode { |
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| 434 | + compatible = "arm,vexpress-dvimode"; |
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| 435 | + arm,vexpress-sysreg,func = <11 0>; |
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| 436 | + }; |
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| 448 | 437 | }; |
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| 449 | 438 | }; |
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| 450 | 439 | }; |
|---|