forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-10-16 50a212ec906f7524620675f0c57357691c26c81f
kernel/arch/arm/boot/dts/stm32f7-pinctrl.dtsi
....@@ -127,7 +127,7 @@
127127 st,bank-name = "GPIOK";
128128 };
129129
130
- cec_pins_a: cec@0 {
130
+ cec_pins_a: cec-0 {
131131 pins {
132132 pinmux = <STM32_PINMUX('A', 15, AF4)>; /* HDMI CEC */
133133 slew-rate = <0>;
....@@ -136,7 +136,7 @@
136136 };
137137 };
138138
139
- usart1_pins_a: usart1@0 {
139
+ usart1_pins_a: usart1-0 {
140140 pins1 {
141141 pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
142142 bias-disable;
....@@ -149,7 +149,7 @@
149149 };
150150 };
151151
152
- usart1_pins_b: usart1@1 {
152
+ usart1_pins_b: usart1-1 {
153153 pins1 {
154154 pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
155155 bias-disable;
....@@ -162,7 +162,7 @@
162162 };
163163 };
164164
165
- i2c1_pins_b: i2c1@0 {
165
+ i2c1_pins_b: i2c1-0 {
166166 pins {
167167 pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
168168 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
....@@ -172,7 +172,7 @@
172172 };
173173 };
174174
175
- usbotg_hs_pins_a: usbotg-hs@0 {
175
+ usbotg_hs_pins_a: usbotg-hs-0 {
176176 pins {
177177 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
178178 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
....@@ -192,7 +192,7 @@
192192 };
193193 };
194194
195
- usbotg_hs_pins_b: usbotg-hs@1 {
195
+ usbotg_hs_pins_b: usbotg-hs-1 {
196196 pins {
197197 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
198198 <STM32_PINMUX('C', 2, AF10)>, /* OTG_HS_ULPI_DIR */
....@@ -212,7 +212,7 @@
212212 };
213213 };
214214
215
- usbotg_fs_pins_a: usbotg-fs@0 {
215
+ usbotg_fs_pins_a: usbotg-fs-0 {
216216 pins {
217217 pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
218218 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
....@@ -223,7 +223,7 @@
223223 };
224224 };
225225
226
- sdio_pins_a: sdio_pins_a@0 {
226
+ sdio_pins_a: sdio-pins-a-0 {
227227 pins {
228228 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
229229 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
....@@ -236,7 +236,7 @@
236236 };
237237 };
238238
239
- sdio_pins_od_a: sdio_pins_od_a@0 {
239
+ sdio_pins_od_a: sdio-pins-od-a-0 {
240240 pins1 {
241241 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
242242 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
....@@ -254,7 +254,7 @@
254254 };
255255 };
256256
257
- sdio_pins_b: sdio_pins_b@0 {
257
+ sdio_pins_b: sdio-pins-b-0 {
258258 pins {
259259 pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
260260 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
....@@ -267,7 +267,7 @@
267267 };
268268 };
269269
270
- sdio_pins_od_b: sdio_pins_od_b@0 {
270
+ sdio_pins_od_b: sdio-pins-od-b-0 {
271271 pins1 {
272272 pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
273273 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
....@@ -284,6 +284,88 @@
284284 slew-rate = <2>;
285285 };
286286 };
287
+
288
+ can1_pins_a: can1-0 {
289
+ pins1 {
290
+ pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
291
+ };
292
+ pins2 {
293
+ pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
294
+ bias-pull-up;
295
+ };
296
+ };
297
+
298
+ can1_pins_b: can1-1 {
299
+ pins1 {
300
+ pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */
301
+ };
302
+ pins2 {
303
+ pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */
304
+ bias-pull-up;
305
+ };
306
+ };
307
+
308
+ can1_pins_c: can1-2 {
309
+ pins1 {
310
+ pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */
311
+ };
312
+ pins2 {
313
+ pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
314
+ bias-pull-up;
315
+
316
+ };
317
+ };
318
+
319
+ can1_pins_d: can1-3 {
320
+ pins1 {
321
+ pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
322
+ };
323
+ pins2 {
324
+ pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
325
+ bias-pull-up;
326
+
327
+ };
328
+ };
329
+
330
+ can2_pins_a: can2-0 {
331
+ pins1 {
332
+ pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */
333
+ };
334
+ pins2 {
335
+ pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
336
+ bias-pull-up;
337
+ };
338
+ };
339
+
340
+ can2_pins_b: can2-1 {
341
+ pins1 {
342
+ pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
343
+ };
344
+ pins2 {
345
+ pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */
346
+ bias-pull-up;
347
+ };
348
+ };
349
+
350
+ can3_pins_a: can3-0 {
351
+ pins1 {
352
+ pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */
353
+ };
354
+ pins2 {
355
+ pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */
356
+ bias-pull-up;
357
+ };
358
+ };
359
+
360
+ can3_pins_b: can3-1 {
361
+ pins1 {
362
+ pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */
363
+ };
364
+ pins2 {
365
+ pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */
366
+ bias-pull-up;
367
+ };
368
+ };
287369 };
288370 };
289371 };