forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-10-16 50a212ec906f7524620675f0c57357691c26c81f 
 kernel/arch/arm/boot/dts/sama5d3.dtsi
....@@ -1,14 +1,12 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
34  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
45  *
56  *  Copyright (C) 2013 Atmel,
67  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
7
- *
8
- * Licensed under GPLv2 or later.
98  */
109 
11
-#include "skeleton.dtsi"
1210 #include <dt-bindings/dma/at91.h>
1311 #include <dt-bindings/pinctrl/at91.h>
1412 #include <dt-bindings/interrupt-controller/irq.h>
....@@ -16,6 +14,8 @@
1614 #include <dt-bindings/clock/at91.h>
1715 
1816 / {
17
+	#address-cells = <1>;
18
+	#size-cells = <1>;
1919 	model = "Atmel SAMA5D3 family SoC";
2020 	compatible = "atmel,sama5d3", "atmel,sama5";
2121 	interrupt-parent = <&aic>;
....@@ -55,7 +55,8 @@
5555 		interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
5656 	};
5757 
58
-	memory {
58
+	memory@20000000 {
59
+		device_type = "memory";
5960 		reg = <0x20000000 0x8000000>;
6061 	};
6162 
....@@ -82,6 +83,9 @@
8283 	sram: sram@300000 {
8384 		compatible = "mmio-sram";
8485 		reg = <0x00300000 0x20000>;
86
+		#address-cells = <1>;
87
+		#size-cells = <1>;
88
+		ranges = <0 0x00300000 0x20000>;
8589 	};
8690 
8791 	ahb {
....@@ -107,7 +111,7 @@
107111 				status = "disabled";
108112 				#address-cells = <1>;
109113 				#size-cells = <0>;
110
-				clocks = <&mci0_clk>;
114
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
111115 				clock-names = "mci_clk";
112116 			};
113117 
....@@ -122,7 +126,7 @@
122126 				dma-names = "tx", "rx";
123127 				pinctrl-names = "default";
124128 				pinctrl-0 = <&pinctrl_spi0>;
125
-				clocks = <&spi0_clk>;
129
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
126130 				clock-names = "spi_clk";
127131 				status = "disabled";
128132 			};
....@@ -136,7 +140,7 @@
136140 				dma-names = "tx", "rx";
137141 				pinctrl-names = "default";
138142 				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
139
-				clocks = <&ssc0_clk>;
143
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
140144 				clock-names = "pclk";
141145 				status = "disabled";
142146 			};
....@@ -147,7 +151,7 @@
147151 				#size-cells = <0>;
148152 				reg = <0xf0010000 0x100>;
149153 				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
150
-				clocks = <&tcb0_clk>, <&clk32k>;
154
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>;
151155 				clock-names = "t0_clk", "slow_clk";
152156 			};
153157 
....@@ -158,11 +162,14 @@
158162 				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
159163 				       <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
160164 				dma-names = "tx", "rx";
161
-				pinctrl-names = "default";
165
+				pinctrl-names = "default", "gpio";
162166 				pinctrl-0 = <&pinctrl_i2c0>;
167
+				pinctrl-1 = <&pinctrl_i2c0_gpio>;
168
+				sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
169
+				scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
163170 				#address-cells = <1>;
164171 				#size-cells = <0>;
165
-				clocks = <&twi0_clk>;
172
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
166173 				status = "disabled";
167174 			};
168175 
....@@ -173,11 +180,14 @@
173180 				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
174181 				       <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
175182 				dma-names = "tx", "rx";
176
-				pinctrl-names = "default";
183
+				pinctrl-names = "default", "gpio";
177184 				pinctrl-0 = <&pinctrl_i2c1>;
185
+				pinctrl-1 = <&pinctrl_i2c1_gpio>;
186
+				sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>;
187
+				scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
178188 				#address-cells = <1>;
179189 				#size-cells = <0>;
180
-				clocks = <&twi1_clk>;
190
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
181191 				status = "disabled";
182192 			};
183193 
....@@ -190,7 +200,7 @@
190200 				dma-names = "tx", "rx";
191201 				pinctrl-names = "default";
192202 				pinctrl-0 = <&pinctrl_usart0>;
193
-				clocks = <&usart0_clk>;
203
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
194204 				clock-names = "usart";
195205 				status = "disabled";
196206 			};
....@@ -204,7 +214,7 @@
204214 				dma-names = "tx", "rx";
205215 				pinctrl-names = "default";
206216 				pinctrl-0 = <&pinctrl_usart1>;
207
-				clocks = <&usart1_clk>;
217
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
208218 				clock-names = "usart";
209219 				status = "disabled";
210220 			};
....@@ -215,7 +225,7 @@
215225 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
216226 				pinctrl-names = "default";
217227 				pinctrl-0 = <&pinctrl_uart0>;
218
-				clocks = <&uart0_clk>;
228
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
219229 				clock-names = "usart";
220230 				status = "disabled";
221231 			};
....@@ -225,7 +235,7 @@
225235 				reg = <0xf002c000 0x300>;
226236 				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
227237 				#pwm-cells = <3>;
228
-				clocks = <&pwm_clk>;
238
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
229239 				status = "disabled";
230240 			};
231241 
....@@ -235,7 +245,7 @@
235245 				interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
236246 				pinctrl-names = "default";
237247 				pinctrl-0 = <&pinctrl_isi_data_0_7>;
238
-				clocks = <&isi_clk>;
248
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
239249 				clock-names = "isi_clk";
240250 				status = "disabled";
241251 				port {
....@@ -260,7 +270,7 @@
260270 				status = "disabled";
261271 				#address-cells = <1>;
262272 				#size-cells = <0>;
263
-				clocks = <&mci1_clk>;
273
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
264274 				clock-names = "mci_clk";
265275 			};
266276 
....@@ -275,7 +285,7 @@
275285 				dma-names = "tx", "rx";
276286 				pinctrl-names = "default";
277287 				pinctrl-0 = <&pinctrl_spi1>;
278
-				clocks = <&spi1_clk>;
288
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
279289 				clock-names = "spi_clk";
280290 				status = "disabled";
281291 			};
....@@ -289,7 +299,7 @@
289299 				dma-names = "tx", "rx";
290300 				pinctrl-names = "default";
291301 				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
292
-				clocks = <&ssc1_clk>;
302
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
293303 				clock-names = "pclk";
294304 				status = "disabled";
295305 			};
....@@ -316,7 +326,7 @@
316326 					&pinctrl_adc0_ad10
317327 					&pinctrl_adc0_ad11
318328 					>;
319
-				clocks = <&adc_clk>,
329
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 29>,
320330 					 <&adc_op_clk>;
321331 				clock-names = "adc_clk", "adc_op_clk";
322332 				atmel,adc-channels-used = <0xfff>;
....@@ -356,11 +366,14 @@
356366 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
357367 				       <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
358368 				dma-names = "tx", "rx";
359
-				pinctrl-names = "default";
369
+				pinctrl-names = "default", "gpio";
360370 				pinctrl-0 = <&pinctrl_i2c2>;
371
+				pinctrl-1 = <&pinctrl_i2c2_gpio>;
372
+				sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>;
373
+				scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
361374 				#address-cells = <1>;
362375 				#size-cells = <0>;
363
-				clocks = <&twi2_clk>;
376
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
364377 				status = "disabled";
365378 			};
366379 
....@@ -373,7 +386,7 @@
373386 				dma-names = "tx", "rx";
374387 				pinctrl-names = "default";
375388 				pinctrl-0 = <&pinctrl_usart2>;
376
-				clocks = <&usart2_clk>;
389
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
377390 				clock-names = "usart";
378391 				status = "disabled";
379392 			};
....@@ -387,7 +400,7 @@
387400 				dma-names = "tx", "rx";
388401 				pinctrl-names = "default";
389402 				pinctrl-0 = <&pinctrl_usart3>;
390
-				clocks = <&usart3_clk>;
403
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
391404 				clock-names = "usart";
392405 				status = "disabled";
393406 			};
....@@ -398,7 +411,7 @@
398411 				interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
399412 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
400413 				dma-names = "tx";
401
-				clocks = <&sha_clk>;
414
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
402415 				clock-names = "sha_clk";
403416 			};
404417 
....@@ -409,7 +422,7 @@
409422 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
410423 				       <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
411424 				dma-names = "tx", "rx";
412
-				clocks = <&aes_clk>;
425
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
413426 				clock-names = "aes_clk";
414427 			};
415428 
....@@ -420,7 +433,7 @@
420433 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
421434 				       <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
422435 				dma-names = "tx", "rx";
423
-				clocks = <&tdes_clk>;
436
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
424437 				clock-names = "tdes_clk";
425438 			};
426439 
....@@ -428,14 +441,14 @@
428441 				compatible = "atmel,at91sam9g45-trng";
429442 				reg = <0xf8040000 0x100>;
430443 				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
431
-				clocks = <&trng_clk>;
444
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
432445 			};
433446 
434447 			hsmc: hsmc@ffffc000 {
435448 				compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
436449 				reg = <0xffffc000 0x1000>;
437450 				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
438
-				clocks = <&hsmc_clk>;
451
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
439452 				#address-cells = <1>;
440453 				#size-cells = <1>;
441454 				ranges;
....@@ -452,7 +465,7 @@
452465 				reg = <0xffffe600 0x200>;
453466 				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
454467 				#dma-cells = <2>;
455
-				clocks = <&dma0_clk>;
468
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
456469 				clock-names = "dma_clk";
457470 			};
458471 
....@@ -461,14 +474,14 @@
461474 				reg = <0xffffe800 0x200>;
462475 				interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
463476 				#dma-cells = <2>;
464
-				clocks = <&dma1_clk>;
477
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
465478 				clock-names = "dma_clk";
466479 			};
467480 
468481 			ramc0: ramc@ffffea00 {
469482 				compatible = "atmel,sama5d3-ddramc";
470483 				reg = <0xffffea00 0x200>;
471
-				clocks = <&ddrck>, <&mpddr_clk>;
484
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
472485 				clock-names = "ddrck", "mpddr";
473486 			};
474487 
....@@ -481,7 +494,7 @@
481494 				dma-names = "tx", "rx";
482495 				pinctrl-names = "default";
483496 				pinctrl-0 = <&pinctrl_dbgu>;
484
-				clocks = <&dbgu_clk>;
497
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
485498 				clock-names = "usart";
486499 				status = "disabled";
487500 			};
....@@ -638,6 +651,12 @@
638651 							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
639652 							 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
640653 					};
654
+
655
+					pinctrl_i2c0_gpio: i2c0-gpio {
656
+						atmel,pins =
657
+							<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
658
+							 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
659
+					};
641660 				};
642661 
643662 				i2c1 {
....@@ -646,6 +665,12 @@
646665 							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
647666 							 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
648667 					};
668
+
669
+					pinctrl_i2c1_gpio: i2c1-gpio {
670
+						atmel,pins =
671
+							<AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
672
+							 AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
673
+					};
649674 				};
650675 
651676 				i2c2 {
....@@ -653,6 +678,12 @@
653678 						atmel,pins =
654679 							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE	/* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
655680 							 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
681
+					};
682
+
683
+					pinctrl_i2c2_gpio: i2c2-gpio {
684
+						atmel,pins =
685
+							<AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
686
+							 AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
656687 					};
657688 				};
658689 
....@@ -939,7 +970,7 @@
939970 					gpio-controller;
940971 					interrupt-controller;
941972 					#interrupt-cells = <2>;
942
-					clocks = <&pioA_clk>;
973
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
943974 				};
944975 
945976 				pioB: gpio@fffff400 {
....@@ -950,7 +981,7 @@
950981 					gpio-controller;
951982 					interrupt-controller;
952983 					#interrupt-cells = <2>;
953
-					clocks = <&pioB_clk>;
984
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
954985 				};
955986 
956987 				pioC: gpio@fffff600 {
....@@ -961,7 +992,7 @@
961992 					gpio-controller;
962993 					interrupt-controller;
963994 					#interrupt-cells = <2>;
964
-					clocks = <&pioC_clk>;
995
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
965996 				};
966997 
967998 				pioD: gpio@fffff800 {
....@@ -972,7 +1003,7 @@
9721003 					gpio-controller;
9731004 					interrupt-controller;
9741005 					#interrupt-cells = <2>;
975
-					clocks = <&pioD_clk>;
1006
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
9761007 				};
9771008 
9781009 				pioE: gpio@fffffa00 {
....@@ -983,7 +1014,7 @@
9831014 					gpio-controller;
9841015 					interrupt-controller;
9851016 					#interrupt-cells = <2>;
986
-					clocks = <&pioE_clk>;
1017
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
9871018 				};
9881019 			};
9891020 
....@@ -991,353 +1022,9 @@
9911022 				compatible = "atmel,sama5d3-pmc", "syscon";
9921023 				reg = <0xfffffc00 0x120>;
9931024 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
994
-				interrupt-controller;
995
-				#address-cells = <1>;
996
-				#size-cells = <0>;
997
-				#interrupt-cells = <1>;
998
-
999
-				main_rc_osc: main_rc_osc {
1000
-					compatible = "atmel,at91sam9x5-clk-main-rc-osc";
1001
-					#clock-cells = <0>;
1002
-					interrupt-parent = <&pmc>;
1003
-					interrupts = <AT91_PMC_MOSCRCS>;
1004
-					clock-frequency = <12000000>;
1005
-					clock-accuracy = <50000000>;
1006
-				};
1007
-
1008
-				main_osc: main_osc {
1009
-					compatible = "atmel,at91rm9200-clk-main-osc";
1010
-					#clock-cells = <0>;
1011
-					interrupt-parent = <&pmc>;
1012
-					interrupts = <AT91_PMC_MOSCS>;
1013
-					clocks = <&main_xtal>;
1014
-				};
1015
-
1016
-				main: mainck {
1017
-					compatible = "atmel,at91sam9x5-clk-main";
1018
-					#clock-cells = <0>;
1019
-					interrupt-parent = <&pmc>;
1020
-					interrupts = <AT91_PMC_MOSCSELS>;
1021
-					clocks = <&main_rc_osc &main_osc>;
1022
-				};
1023
-
1024
-				plla: pllack {
1025
-					compatible = "atmel,sama5d3-clk-pll";
1026
-					#clock-cells = <0>;
1027
-					interrupt-parent = <&pmc>;
1028
-					interrupts = <AT91_PMC_LOCKA>;
1029
-					clocks = <&main>;
1030
-					reg = <0>;
1031
-					atmel,clk-input-range = <8000000 50000000>;
1032
-					#atmel,pll-clk-output-range-cells = <4>;
1033
-					atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
1034
-				};
1035
-
1036
-				plladiv: plladivck {
1037
-					compatible = "atmel,at91sam9x5-clk-plldiv";
1038
-					#clock-cells = <0>;
1039
-					clocks = <&plla>;
1040
-				};
1041
-
1042
-				utmi: utmick {
1043
-					compatible = "atmel,at91sam9x5-clk-utmi";
1044
-					#clock-cells = <0>;
1045
-					interrupt-parent = <&pmc>;
1046
-					interrupts = <AT91_PMC_LOCKU>;
1047
-					clocks = <&main>;
1048
-				};
1049
-
1050
-				mck: masterck {
1051
-					compatible = "atmel,at91sam9x5-clk-master";
1052
-					#clock-cells = <0>;
1053
-					interrupt-parent = <&pmc>;
1054
-					interrupts = <AT91_PMC_MCKRDY>;
1055
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
1056
-					atmel,clk-output-range = <0 166000000>;
1057
-					atmel,clk-divisors = <1 2 4 3>;
1058
-				};
1059
-
1060
-				usb: usbck {
1061
-					compatible = "atmel,at91sam9x5-clk-usb";
1062
-					#clock-cells = <0>;
1063
-					clocks = <&plladiv>, <&utmi>;
1064
-				};
1065
-
1066
-				prog: progck {
1067
-					compatible = "atmel,at91sam9x5-clk-programmable";
1068
-					#address-cells = <1>;
1069
-					#size-cells = <0>;
1070
-					interrupt-parent = <&pmc>;
1071
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1072
-
1073
-					prog0: prog0 {
1074
-						#clock-cells = <0>;
1075
-						reg = <0>;
1076
-						interrupts = <AT91_PMC_PCKRDY(0)>;
1077
-					};
1078
-
1079
-					prog1: prog1 {
1080
-						#clock-cells = <0>;
1081
-						reg = <1>;
1082
-						interrupts = <AT91_PMC_PCKRDY(1)>;
1083
-					};
1084
-
1085
-					prog2: prog2 {
1086
-						#clock-cells = <0>;
1087
-						reg = <2>;
1088
-						interrupts = <AT91_PMC_PCKRDY(2)>;
1089
-					};
1090
-				};
1091
-
1092
-				smd: smdclk {
1093
-					compatible = "atmel,at91sam9x5-clk-smd";
1094
-					#clock-cells = <0>;
1095
-					clocks = <&plladiv>, <&utmi>;
1096
-				};
1097
-
1098
-				systemck {
1099
-					compatible = "atmel,at91rm9200-clk-system";
1100
-					#address-cells = <1>;
1101
-					#size-cells = <0>;
1102
-
1103
-					ddrck: ddrck {
1104
-						#clock-cells = <0>;
1105
-						reg = <2>;
1106
-						clocks = <&mck>;
1107
-					};
1108
-
1109
-					smdck: smdck {
1110
-						#clock-cells = <0>;
1111
-						reg = <4>;
1112
-						clocks = <&smd>;
1113
-					};
1114
-
1115
-					uhpck: uhpck {
1116
-						#clock-cells = <0>;
1117
-						reg = <6>;
1118
-						clocks = <&usb>;
1119
-					};
1120
-
1121
-					udpck: udpck {
1122
-						#clock-cells = <0>;
1123
-						reg = <7>;
1124
-						clocks = <&usb>;
1125
-					};
1126
-
1127
-					pck0: pck0 {
1128
-						#clock-cells = <0>;
1129
-						reg = <8>;
1130
-						clocks = <&prog0>;
1131
-					};
1132
-
1133
-					pck1: pck1 {
1134
-						#clock-cells = <0>;
1135
-						reg = <9>;
1136
-						clocks = <&prog1>;
1137
-					};
1138
-
1139
-					pck2: pck2 {
1140
-						#clock-cells = <0>;
1141
-						reg = <10>;
1142
-						clocks = <&prog2>;
1143
-					};
1144
-				};
1145
-
1146
-				periphck {
1147
-					compatible = "atmel,at91sam9x5-clk-peripheral";
1148
-					#address-cells = <1>;
1149
-					#size-cells = <0>;
1150
-					clocks = <&mck>;
1151
-
1152
-					dbgu_clk: dbgu_clk {
1153
-						#clock-cells = <0>;
1154
-						reg = <2>;
1155
-					};
1156
-
1157
-					hsmc_clk: hsmc_clk {
1158
-						#clock-cells = <0>;
1159
-						reg = <5>;
1160
-					};
1161
-
1162
-					pioA_clk: pioA_clk {
1163
-						#clock-cells = <0>;
1164
-						reg = <6>;
1165
-					};
1166
-
1167
-					pioB_clk: pioB_clk {
1168
-						#clock-cells = <0>;
1169
-						reg = <7>;
1170
-					};
1171
-
1172
-					pioC_clk: pioC_clk {
1173
-						#clock-cells = <0>;
1174
-						reg = <8>;
1175
-					};
1176
-
1177
-					pioD_clk: pioD_clk {
1178
-						#clock-cells = <0>;
1179
-						reg = <9>;
1180
-					};
1181
-
1182
-					pioE_clk: pioE_clk {
1183
-						#clock-cells = <0>;
1184
-						reg = <10>;
1185
-					};
1186
-
1187
-					usart0_clk: usart0_clk {
1188
-						#clock-cells = <0>;
1189
-						reg = <12>;
1190
-						atmel,clk-output-range = <0 83000000>;
1191
-					};
1192
-
1193
-					usart1_clk: usart1_clk {
1194
-						#clock-cells = <0>;
1195
-						reg = <13>;
1196
-						atmel,clk-output-range = <0 83000000>;
1197
-					};
1198
-
1199
-					usart2_clk: usart2_clk {
1200
-						#clock-cells = <0>;
1201
-						reg = <14>;
1202
-						atmel,clk-output-range = <0 83000000>;
1203
-					};
1204
-
1205
-					usart3_clk: usart3_clk {
1206
-						#clock-cells = <0>;
1207
-						reg = <15>;
1208
-						atmel,clk-output-range = <0 83000000>;
1209
-					};
1210
-
1211
-					uart0_clk: uart0_clk {
1212
-						#clock-cells = <0>;
1213
-						reg = <16>;
1214
-						atmel,clk-output-range = <0 83000000>;
1215
-					};
1216
-
1217
-					twi0_clk: twi0_clk {
1218
-						reg = <18>;
1219
-						#clock-cells = <0>;
1220
-						atmel,clk-output-range = <0 41500000>;
1221
-					};
1222
-
1223
-					twi1_clk: twi1_clk {
1224
-						#clock-cells = <0>;
1225
-						reg = <19>;
1226
-						atmel,clk-output-range = <0 41500000>;
1227
-					};
1228
-
1229
-					twi2_clk: twi2_clk {
1230
-						#clock-cells = <0>;
1231
-						reg = <20>;
1232
-						atmel,clk-output-range = <0 41500000>;
1233
-					};
1234
-
1235
-					mci0_clk: mci0_clk {
1236
-						#clock-cells = <0>;
1237
-						reg = <21>;
1238
-					};
1239
-
1240
-					mci1_clk: mci1_clk {
1241
-						#clock-cells = <0>;
1242
-						reg = <22>;
1243
-					};
1244
-
1245
-					spi0_clk: spi0_clk {
1246
-						#clock-cells = <0>;
1247
-						reg = <24>;
1248
-						atmel,clk-output-range = <0 166000000>;
1249
-					};
1250
-
1251
-					spi1_clk: spi1_clk {
1252
-						#clock-cells = <0>;
1253
-						reg = <25>;
1254
-						atmel,clk-output-range = <0 166000000>;
1255
-					};
1256
-
1257
-					tcb0_clk: tcb0_clk {
1258
-						#clock-cells = <0>;
1259
-						reg = <26>;
1260
-						atmel,clk-output-range = <0 166000000>;
1261
-					};
1262
-
1263
-					pwm_clk: pwm_clk {
1264
-						#clock-cells = <0>;
1265
-						reg = <28>;
1266
-					};
1267
-
1268
-					adc_clk: adc_clk {
1269
-						#clock-cells = <0>;
1270
-						reg = <29>;
1271
-						atmel,clk-output-range = <0 83000000>;
1272
-					};
1273
-
1274
-					dma0_clk: dma0_clk {
1275
-						#clock-cells = <0>;
1276
-						reg = <30>;
1277
-					};
1278
-
1279
-					dma1_clk: dma1_clk {
1280
-						#clock-cells = <0>;
1281
-						reg = <31>;
1282
-					};
1283
-
1284
-					uhphs_clk: uhphs_clk {
1285
-						#clock-cells = <0>;
1286
-						reg = <32>;
1287
-					};
1288
-
1289
-					udphs_clk: udphs_clk {
1290
-						#clock-cells = <0>;
1291
-						reg = <33>;
1292
-					};
1293
-
1294
-					isi_clk: isi_clk {
1295
-						#clock-cells = <0>;
1296
-						reg = <37>;
1297
-					};
1298
-
1299
-					ssc0_clk: ssc0_clk {
1300
-						#clock-cells = <0>;
1301
-						reg = <38>;
1302
-						atmel,clk-output-range = <0 83000000>;
1303
-					};
1304
-
1305
-					ssc1_clk: ssc1_clk {
1306
-						#clock-cells = <0>;
1307
-						reg = <39>;
1308
-						atmel,clk-output-range = <0 83000000>;
1309
-					};
1310
-
1311
-					sha_clk: sha_clk {
1312
-						#clock-cells = <0>;
1313
-						reg = <42>;
1314
-					};
1315
-
1316
-					aes_clk: aes_clk {
1317
-						#clock-cells = <0>;
1318
-						reg = <43>;
1319
-					};
1320
-
1321
-					tdes_clk: tdes_clk {
1322
-						#clock-cells = <0>;
1323
-						reg = <44>;
1324
-					};
1325
-
1326
-					trng_clk: trng_clk {
1327
-						#clock-cells = <0>;
1328
-						reg = <45>;
1329
-					};
1330
-
1331
-					fuse_clk: fuse_clk {
1332
-						#clock-cells = <0>;
1333
-						reg = <48>;
1334
-					};
1335
-
1336
-					mpddr_clk: mpddr_clk {
1337
-						#clock-cells = <0>;
1338
-						reg = <49>;
1339
-					};
1340
-				};
1025
+				#clock-cells = <2>;
1026
+				clocks = <&clk32k>, <&main_xtal>;
1027
+				clock-names = "slow_clk", "main_xtal";
13411028 			};
13421029 
13431030 			reset_controller: rstc@fffffe00 {
....@@ -1356,7 +1043,7 @@
13561043 				compatible = "atmel,at91sam9260-pit";
13571044 				reg = <0xfffffe30 0xf>;
13581045 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1359
-				clocks = <&mck>;
1046
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
13601047 			};
13611048 
13621049 			watchdog: watchdog@fffffe40 {
....@@ -1370,30 +1057,11 @@
13701057 				status = "disabled";
13711058 			};
13721059 
1373
-			sckc@fffffe50 {
1374
-				compatible = "atmel,at91sam9x5-sckc";
1060
+			clk32k: sckc@fffffe50 {
1061
+				compatible = "atmel,sama5d3-sckc";
13751062 				reg = <0xfffffe50 0x4>;
1376
-
1377
-				slow_rc_osc: slow_rc_osc {
1378
-					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1379
-					#clock-cells = <0>;
1380
-					clock-frequency = <32768>;
1381
-					clock-accuracy = <50000000>;
1382
-					atmel,startup-time-usec = <75>;
1383
-				};
1384
-
1385
-				slow_osc: slow_osc {
1386
-					compatible = "atmel,at91sam9x5-clk-slow-osc";
1387
-					#clock-cells = <0>;
1388
-					clocks = <&slow_xtal>;
1389
-					atmel,startup-time-usec = <1200000>;
1390
-				};
1391
-
1392
-				clk32k: slowck {
1393
-					compatible = "atmel,at91sam9x5-clk-slow";
1394
-					#clock-cells = <0>;
1395
-					clocks = <&slow_rc_osc &slow_osc>;
1396
-				};
1063
+				clocks = <&slow_xtal>;
1064
+				#clock-cells = <0>;
13971065 			};
13981066 
13991067 			rtc@fffffeb0 {
....@@ -1408,130 +1076,26 @@
14081076 			compatible = "mmio-sram";
14091077 			no-memory-wc;
14101078 			reg = <0x200000 0x2400>;
1079
+			#address-cells = <1>;
1080
+			#size-cells = <1>;
1081
+			ranges = <0 0x200000 0x2400>;
14111082 		};
14121083 
14131084 		usb0: gadget@500000 {
1414
-			#address-cells = <1>;
1415
-			#size-cells = <0>;
14161085 			compatible = "atmel,sama5d3-udc";
14171086 			reg = <0x00500000 0x100000
14181087 			       0xf8030000 0x4000>;
14191088 			interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1420
-			clocks = <&udphs_clk>, <&utmi>;
1089
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
14211090 			clock-names = "pclk", "hclk";
14221091 			status = "disabled";
1423
-
1424
-			ep@0 {
1425
-				reg = <0>;
1426
-				atmel,fifo-size = <64>;
1427
-				atmel,nb-banks = <1>;
1428
-			};
1429
-
1430
-			ep@1 {
1431
-				reg = <1>;
1432
-				atmel,fifo-size = <1024>;
1433
-				atmel,nb-banks = <3>;
1434
-				atmel,can-dma;
1435
-				atmel,can-isoc;
1436
-			};
1437
-
1438
-			ep@2 {
1439
-				reg = <2>;
1440
-				atmel,fifo-size = <1024>;
1441
-				atmel,nb-banks = <3>;
1442
-				atmel,can-dma;
1443
-				atmel,can-isoc;
1444
-			};
1445
-
1446
-			ep@3 {
1447
-				reg = <3>;
1448
-				atmel,fifo-size = <1024>;
1449
-				atmel,nb-banks = <2>;
1450
-				atmel,can-dma;
1451
-			};
1452
-
1453
-			ep@4 {
1454
-				reg = <4>;
1455
-				atmel,fifo-size = <1024>;
1456
-				atmel,nb-banks = <2>;
1457
-				atmel,can-dma;
1458
-			};
1459
-
1460
-			ep@5 {
1461
-				reg = <5>;
1462
-				atmel,fifo-size = <1024>;
1463
-				atmel,nb-banks = <2>;
1464
-				atmel,can-dma;
1465
-			};
1466
-
1467
-			ep@6 {
1468
-				reg = <6>;
1469
-				atmel,fifo-size = <1024>;
1470
-				atmel,nb-banks = <2>;
1471
-				atmel,can-dma;
1472
-			};
1473
-
1474
-			ep@7 {
1475
-				reg = <7>;
1476
-				atmel,fifo-size = <1024>;
1477
-				atmel,nb-banks = <2>;
1478
-				atmel,can-dma;
1479
-			};
1480
-
1481
-			ep@8 {
1482
-				reg = <8>;
1483
-				atmel,fifo-size = <1024>;
1484
-				atmel,nb-banks = <2>;
1485
-			};
1486
-
1487
-			ep@9 {
1488
-				reg = <9>;
1489
-				atmel,fifo-size = <1024>;
1490
-				atmel,nb-banks = <2>;
1491
-			};
1492
-
1493
-			ep@10 {
1494
-				reg = <10>;
1495
-				atmel,fifo-size = <1024>;
1496
-				atmel,nb-banks = <2>;
1497
-			};
1498
-
1499
-			ep@11 {
1500
-				reg = <11>;
1501
-				atmel,fifo-size = <1024>;
1502
-				atmel,nb-banks = <2>;
1503
-			};
1504
-
1505
-			ep@12 {
1506
-				reg = <12>;
1507
-				atmel,fifo-size = <1024>;
1508
-				atmel,nb-banks = <2>;
1509
-			};
1510
-
1511
-			ep@13 {
1512
-				reg = <13>;
1513
-				atmel,fifo-size = <1024>;
1514
-				atmel,nb-banks = <2>;
1515
-			};
1516
-
1517
-			ep@14 {
1518
-				reg = <14>;
1519
-				atmel,fifo-size = <1024>;
1520
-				atmel,nb-banks = <2>;
1521
-			};
1522
-
1523
-			ep@15 {
1524
-				reg = <15>;
1525
-				atmel,fifo-size = <1024>;
1526
-				atmel,nb-banks = <2>;
1527
-			};
15281092 		};
15291093 
15301094 		usb1: ohci@600000 {
15311095 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
15321096 			reg = <0x00600000 0x100000>;
15331097 			interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1534
-			clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1098
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>;
15351099 			clock-names = "ohci_clk", "hclk", "uhpck";
15361100 			status = "disabled";
15371101 		};
....@@ -1540,7 +1104,7 @@
15401104 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
15411105 			reg = <0x00700000 0x100000>;
15421106 			interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1543
-			clocks = <&utmi>, <&uhphs_clk>;
1107
+			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>;
15441108 			clock-names = "usb_clk", "ehci_clk";
15451109 			status = "disabled";
15461110 		};
....@@ -1556,7 +1120,7 @@
15561120 				  0x1 0x0 0x40000000 0x10000000
15571121 				  0x2 0x0 0x50000000 0x10000000
15581122 				  0x3 0x0 0x60000000 0x10000000>;
1559
-			clocks = <&mck>;
1123
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
15601124 			status = "disabled";
15611125 
15621126 			nand_controller: nand-controller {