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2024-10-16 50a212ec906f7524620675f0c57357691c26c81f 
 kernel/arch/arm/boot/dts/r8a7740.dtsi
....@@ -1,6 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0
22 /*
3
- * Device Tree Source for the r8a7740 SoC
3
+ * Device Tree Source for the R-Mobile A1 (R8A77400) SoC
44  *
55  * Copyright (C) 2012 Renesas Solutions Corp.
66  */
....@@ -83,7 +83,7 @@
8383 	};
8484 
8585 	cmt1: timer@e6138000 {
86
-		compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
86
+		compatible = "renesas,r8a7740-cmt1";
8787 		reg = <0xe6138000 0x170>;
8888 		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
8989 		clocks = <&mstp3_clks R8A7740_CLK_CMT1>;
....@@ -102,14 +102,14 @@
102102 			<0xe6900020 1>,
103103 			<0xe6900040 1>,
104104 			<0xe6900060 1>;
105
-		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
106
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
107
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
108
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
109
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
110
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
111
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
112
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
105
+		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
106
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
107
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
108
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
109
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
110
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
111
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
112
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
113113 		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
114114 		power-domains = <&pd_a4s>;
115115 	};
....@@ -124,14 +124,14 @@
124124 			<0xe6900024 1>,
125125 			<0xe6900044 1>,
126126 			<0xe6900064 1>;
127
-		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
128
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
129
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
130
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
131
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
132
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
133
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
134
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
127
+		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
128
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
129
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
130
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
131
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
132
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
133
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
134
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
135135 		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
136136 		power-domains = <&pd_a4s>;
137137 	};
....@@ -146,14 +146,14 @@
146146 			<0xe6900028 1>,
147147 			<0xe6900048 1>,
148148 			<0xe6900068 1>;
149
-		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
150
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
151
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
152
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
153
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
154
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
155
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
156
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
149
+		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
150
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
151
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
152
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
153
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
154
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
155
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
156
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
157157 		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
158158 		power-domains = <&pd_a4s>;
159159 	};
....@@ -168,14 +168,14 @@
168168 			<0xe690002c 1>,
169169 			<0xe690004c 1>,
170170 			<0xe690006c 1>;
171
-		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
172
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
173
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
174
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
175
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
176
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
177
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
178
-			      GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
171
+		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
172
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
173
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
174
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
175
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
176
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
177
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
178
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
179179 		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
180180 		power-domains = <&pd_a4s>;
181181 	};
....@@ -198,10 +198,10 @@
198198 		#size-cells = <0>;
199199 		compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
200200 		reg = <0xfff20000 0x425>;
201
-		interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
202
-			      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
203
-			      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
204
-			      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
201
+		interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
202
+			     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
203
+			     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
204
+			     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
205205 		clocks = <&mstp1_clks R8A7740_CLK_IIC0>;
206206 		power-domains = <&pd_a4r>;
207207 		status = "disabled";
....@@ -212,10 +212,10 @@
212212 		#size-cells = <0>;
213213 		compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
214214 		reg = <0xe6c20000 0x425>;
215
-		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
216
-			      GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH
217
-			      GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
218
-			      GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
215
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
216
+			     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
217
+			     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
218
+			     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
219219 		clocks = <&mstp3_clks R8A7740_CLK_IIC1>;
220220 		power-domains = <&pd_a3sp>;
221221 		status = "disabled";
....@@ -311,7 +311,7 @@
311311 		status = "disabled";
312312 	};
313313 
314
-	pfc: pin-controller@e6050000 {
314
+	pfc: pinctrl@e6050000 {
315315 		compatible = "renesas,pfc-r8a7740";
316316 		reg = <0xe6050000 0x8000>,
317317 		      <0xe605800c 0x20>;
....@@ -342,19 +342,19 @@
342342 	mmcif0: mmc@e6bd0000 {
343343 		compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
344344 		reg = <0xe6bd0000 0x100>;
345
-		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH
346
-			      GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
345
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
346
+			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
347347 		clocks = <&mstp3_clks R8A7740_CLK_MMC>;
348348 		power-domains = <&pd_a3sp>;
349349 		status = "disabled";
350350 	};
351351 
352
-	sdhi0: sd@e6850000 {
352
+	sdhi0: mmc@e6850000 {
353353 		compatible = "renesas,sdhi-r8a7740";
354354 		reg = <0xe6850000 0x100>;
355
-		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
356
-			      GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
357
-			      GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
355
+		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
356
+			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
357
+			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
358358 		clocks = <&mstp3_clks R8A7740_CLK_SDHI0>;
359359 		power-domains = <&pd_a3sp>;
360360 		cap-sd-highspeed;
....@@ -362,12 +362,12 @@
362362 		status = "disabled";
363363 	};
364364 
365
-	sdhi1: sd@e6860000 {
365
+	sdhi1: mmc@e6860000 {
366366 		compatible = "renesas,sdhi-r8a7740";
367367 		reg = <0xe6860000 0x100>;
368
-		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH
369
-			      GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH
370
-			      GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
368
+		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
369
+			     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
370
+			     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
371371 		clocks = <&mstp3_clks R8A7740_CLK_SDHI1>;
372372 		power-domains = <&pd_a3sp>;
373373 		cap-sd-highspeed;
....@@ -375,12 +375,12 @@
375375 		status = "disabled";
376376 	};
377377 
378
-	sdhi2: sd@e6870000 {
378
+	sdhi2: mmc@e6870000 {
379379 		compatible = "renesas,sdhi-r8a7740";
380380 		reg = <0xe6870000 0x100>;
381
-		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH
382
-			      GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH
383
-			      GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
381
+		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
382
+			     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
383
+			     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
384384 		clocks = <&mstp4_clks R8A7740_CLK_SDHI2>;
385385 		power-domains = <&pd_a3sp>;
386386 		cap-sd-highspeed;