| .. | .. |
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| 46 | 46 | */ |
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| 47 | 47 | |
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| 48 | 48 | #include <dt-bindings/gpio/gpio.h> |
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| 49 | +#include <dt-bindings/input/linux-event-codes.h> |
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| 50 | +#include <dt-bindings/interrupt-controller/irq.h> |
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| 49 | 51 | |
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| 50 | 52 | / { |
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| 51 | 53 | chosen { |
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| .. | .. |
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| 71 | 73 | default-brightness-level = <100>; |
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| 72 | 74 | }; |
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| 73 | 75 | |
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| 76 | + gpio-keys { |
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| 77 | + compatible = "gpio-keys"; |
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| 78 | + #address-cells = <1>; |
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| 79 | + #size-cells = <0>; |
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| 80 | + |
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| 81 | + user-pb { |
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| 82 | + label = "user_pb"; |
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| 83 | + gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; |
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| 84 | + linux,code = <BTN_0>; |
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| 85 | + }; |
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| 86 | + |
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| 87 | + user-pb1x { |
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| 88 | + label = "user_pb1x"; |
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| 89 | + linux,code = <BTN_1>; |
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| 90 | + interrupt-parent = <&gsc>; |
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| 91 | + interrupts = <0>; |
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| 92 | + }; |
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| 93 | + |
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| 94 | + key-erased { |
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| 95 | + label = "key-erased"; |
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| 96 | + linux,code = <BTN_2>; |
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| 97 | + interrupt-parent = <&gsc>; |
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| 98 | + interrupts = <1>; |
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| 99 | + }; |
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| 100 | + |
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| 101 | + eeprom-wp { |
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| 102 | + label = "eeprom_wp"; |
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| 103 | + linux,code = <BTN_3>; |
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| 104 | + interrupt-parent = <&gsc>; |
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| 105 | + interrupts = <2>; |
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| 106 | + }; |
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| 107 | + |
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| 108 | + tamper { |
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| 109 | + label = "tamper"; |
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| 110 | + linux,code = <BTN_4>; |
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| 111 | + interrupt-parent = <&gsc>; |
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| 112 | + interrupts = <5>; |
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| 113 | + }; |
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| 114 | + |
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| 115 | + switch-hold { |
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| 116 | + label = "switch_hold"; |
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| 117 | + linux,code = <BTN_5>; |
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| 118 | + interrupt-parent = <&gsc>; |
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| 119 | + interrupts = <7>; |
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| 120 | + }; |
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| 121 | + }; |
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| 122 | + |
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| 74 | 123 | leds { |
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| 75 | 124 | compatible = "gpio-leds"; |
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| 76 | 125 | pinctrl-names = "default"; |
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| .. | .. |
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| 84 | 133 | }; |
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| 85 | 134 | |
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| 86 | 135 | memory@10000000 { |
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| 136 | + device_type = "memory"; |
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| 87 | 137 | reg = <0x10000000 0x40000000>; |
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| 88 | 138 | }; |
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| 89 | 139 | |
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| .. | .. |
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| 182 | 232 | pinctrl-0 = <&pinctrl_i2c1>; |
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| 183 | 233 | status = "okay"; |
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| 184 | 234 | |
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| 185 | | - pca9555: gpio@23 { |
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| 235 | + gsc: gsc@20 { |
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| 236 | + compatible = "gw,gsc"; |
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| 237 | + reg = <0x20>; |
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| 238 | + interrupt-parent = <&gpio1>; |
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| 239 | + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; |
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| 240 | + interrupt-controller; |
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| 241 | + #interrupt-cells = <1>; |
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| 242 | + #size-cells = <0>; |
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| 243 | + |
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| 244 | + adc { |
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| 245 | + compatible = "gw,gsc-adc"; |
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| 246 | + #address-cells = <1>; |
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| 247 | + #size-cells = <0>; |
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| 248 | + |
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| 249 | + channel@0 { |
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| 250 | + gw,mode = <0>; |
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| 251 | + reg = <0x00>; |
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| 252 | + label = "temp"; |
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| 253 | + }; |
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| 254 | + |
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| 255 | + channel@2 { |
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| 256 | + gw,mode = <1>; |
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| 257 | + reg = <0x02>; |
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| 258 | + label = "vdd_vin"; |
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| 259 | + }; |
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| 260 | + |
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| 261 | + channel@5 { |
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| 262 | + gw,mode = <1>; |
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| 263 | + reg = <0x05>; |
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| 264 | + label = "vdd_3p3"; |
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| 265 | + }; |
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| 266 | + |
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| 267 | + channel@8 { |
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| 268 | + gw,mode = <1>; |
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| 269 | + reg = <0x08>; |
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| 270 | + label = "vdd_bat"; |
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| 271 | + }; |
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| 272 | + |
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| 273 | + channel@b { |
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| 274 | + gw,mode = <1>; |
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| 275 | + reg = <0x0b>; |
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| 276 | + label = "vdd_5p0"; |
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| 277 | + }; |
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| 278 | + |
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| 279 | + channel@e { |
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| 280 | + gw,mode = <1>; |
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| 281 | + reg = <0xe>; |
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| 282 | + label = "vdd_arm"; |
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| 283 | + }; |
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| 284 | + |
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| 285 | + channel@11 { |
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| 286 | + gw,mode = <1>; |
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| 287 | + reg = <0x11>; |
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| 288 | + label = "vdd_soc"; |
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| 289 | + }; |
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| 290 | + |
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| 291 | + channel@14 { |
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| 292 | + gw,mode = <1>; |
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| 293 | + reg = <0x14>; |
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| 294 | + label = "vdd_3p0"; |
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| 295 | + }; |
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| 296 | + |
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| 297 | + channel@17 { |
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| 298 | + gw,mode = <1>; |
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| 299 | + reg = <0x17>; |
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| 300 | + label = "vdd_1p5"; |
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| 301 | + }; |
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| 302 | + |
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| 303 | + channel@1d { |
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| 304 | + gw,mode = <1>; |
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| 305 | + reg = <0x1d>; |
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| 306 | + label = "vdd_1p8"; |
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| 307 | + }; |
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| 308 | + |
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| 309 | + channel@20 { |
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| 310 | + gw,mode = <1>; |
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| 311 | + reg = <0x20>; |
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| 312 | + label = "vdd_an1"; |
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| 313 | + }; |
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| 314 | + |
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| 315 | + channel@23 { |
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| 316 | + gw,mode = <1>; |
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| 317 | + reg = <0x23>; |
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| 318 | + label = "vdd_2p5"; |
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| 319 | + }; |
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| 320 | + }; |
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| 321 | + }; |
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| 322 | + |
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| 323 | + gsc_gpio: gpio@23 { |
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| 186 | 324 | compatible = "nxp,pca9555"; |
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| 187 | 325 | reg = <0x23>; |
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| 188 | 326 | gpio-controller; |
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| 189 | 327 | #gpio-cells = <2>; |
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| 328 | + interrupt-parent = <&gsc>; |
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| 329 | + interrupts = <4>; |
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| 190 | 330 | }; |
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| 191 | 331 | |
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| 192 | 332 | eeprom1: eeprom@50 { |
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| .. | .. |
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| 310 | 450 | tlv320aic3105: codec@18 { |
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| 311 | 451 | compatible = "ti,tlv320aic3x"; |
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| 312 | 452 | reg = <0x18>; |
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| 313 | | - gpio-reset = <&gpio5 17 GPIO_ACTIVE_LOW>; |
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| 453 | + reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; |
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| 314 | 454 | clocks = <&clks IMX6QDL_CLK_CKO>; |
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| 315 | 455 | ai3x-micbias-vg = <2>; /* MICBIAS_2_5V */ |
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| 316 | 456 | /* Regulators */ |
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| .. | .. |
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| 364 | 504 | }; |
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| 365 | 505 | |
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| 366 | 506 | &pwm1 { |
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| 507 | + #pwm-cells = <2>; |
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| 367 | 508 | pinctrl-names = "default"; |
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| 368 | 509 | pinctrl-0 = <&pinctrl_pwm1>; |
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| 369 | 510 | status = "okay"; |
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