修改GPIO导出默认初始值

hc

2024-10-16 50a212ec906f7524620675f0c57357691c26c81f

 kernel/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
..
..
@@ -46,6 +46,10 @@
46
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  */
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47
 
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 #include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/media/tda1997x.h>
50
+#include <dt-bindings/input/linux-event-codes.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/sound/fsl-imx-audmux.h>
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53
 
50
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 / {
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55
 	/* these are used by bootloader for disabling nodes */
..
..
@@ -59,6 +63,53 @@
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63
 
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 	chosen {
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 		bootargs = "console=ttymxc1,115200";
66
+	};
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+
68
+	gpio-keys {
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+		compatible = "gpio-keys";
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+		#address-cells = <1>;
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+		#size-cells = <0>;
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+
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+		user-pb {
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+			label = "user_pb";
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+			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
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+			linux,code = <BTN_0>;
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+		};
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+
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+		user-pb1x {
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+			label = "user_pb1x";
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+			linux,code = <BTN_1>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <0>;
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+		};
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+
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+		key-erased {
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+			label = "key-erased";
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+			linux,code = <BTN_2>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <1>;
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+		};
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+
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+		eeprom-wp {
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+			label = "eeprom_wp";
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+			linux,code = <BTN_3>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <2>;
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+		};
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+
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+		tamper {
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+			label = "tamper";
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+			linux,code = <BTN_4>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <5>;
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+		};
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+
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+		switch-hold {
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+			label = "switch_hold";
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+			linux,code = <BTN_5>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <7>;
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+		};
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 	};
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114
 
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115
 	leds {
..
..
@@ -75,6 +126,7 @@
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126
 	};
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127
 
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 	memory@10000000 {
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+		device_type = "memory";
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 		reg = <0x10000000 0x20000000>;
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131
 	};
80
132
 
..
..
@@ -97,6 +149,47 @@
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 		regulator-name = "usb_otg_vbus";
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 		regulator-min-microvolt = <5000000>;
99
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 		regulator-max-microvolt = <5000000>;
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+	};
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+
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+	sound-digital {
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+		compatible = "simple-audio-card";
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+		simple-audio-card,name = "tda1997x-audio";
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+		simple-audio-card,format = "i2s";
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+		simple-audio-card,bitclock-master = <&sound_codec>;
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+		simple-audio-card,frame-master = <&sound_codec>;
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+
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+		sound_cpu: simple-audio-card,cpu {
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+			sound-dai = <&ssi1>;
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+		};
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+
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+		sound_codec: simple-audio-card,codec {
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+			sound-dai = <&hdmi_receiver>;
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+		};
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+	};
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+};
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+
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+&audmux {
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
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+	status = "okay";
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+
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+	ssi1 {
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+		fsl,audmux-port = <0>;
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+		fsl,port-config = <
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+			(IMX_AUDMUX_V2_PTCR_TFSDIR |
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+			IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
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+			IMX_AUDMUX_V2_PTCR_TCLKDIR |
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+			IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
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+			IMX_AUDMUX_V2_PTCR_SYN)
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+			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
185
+		>;
186
+	};
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+
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+	aud5 {
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+		fsl,audmux-port = <4>;
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+		fsl,port-config = <
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+			IMX_AUDMUX_V2_PTCR_SYN
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+			IMX_AUDMUX_V2_PDCR_RXDSEL(0)>;
100
193
 	};
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 };
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195
 
..
..
@@ -123,6 +216,97 @@
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 	pinctrl-0 = <&pinctrl_i2c1>;
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 	status = "okay";
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218
 
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+	gsc: gsc@20 {
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+		compatible = "gw,gsc";
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+		reg = <0x20>;
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+		interrupt-parent = <&gpio1>;
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+		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
224
+		interrupt-controller;
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+		#interrupt-cells = <1>;
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+		#size-cells = <0>;
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+
228
+		adc {
229
+			compatible = "gw,gsc-adc";
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+
233
+			channel@0 {
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+				gw,mode = <0>;
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+				reg = <0x00>;
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+				label = "temp";
237
+			};
238
+
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+			channel@2 {
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+				gw,mode = <1>;
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+				reg = <0x02>;
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+				label = "vdd_vin";
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+			};
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+
245
+			channel@5 {
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+				gw,mode = <1>;
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+				reg = <0x05>;
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+				label = "vdd_3p3";
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+			};
250
+
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+			channel@8 {
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+				gw,mode = <1>;
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+				reg = <0x08>;
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+				label = "vdd_bat";
255
+			};
256
+
257
+			channel@b {
258
+				gw,mode = <1>;
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+				reg = <0x0b>;
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+				label = "vdd_5p0";
261
+			};
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+
263
+			channel@e {
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+				gw,mode = <1>;
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+				reg = <0xe>;
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+				label = "vdd_arm";
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+			};
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+
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+			channel@11 {
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+				gw,mode = <1>;
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+				reg = <0x11>;
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+				label = "vdd_soc";
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+			};
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+
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+			channel@14 {
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+				gw,mode = <1>;
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+				reg = <0x14>;
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+				label = "vdd_3p0";
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+			};
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+
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+			channel@17 {
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+				gw,mode = <1>;
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+				reg = <0x17>;
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+				label = "vdd_1p5";
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+			};
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+
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+			channel@1d {
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+				gw,mode = <1>;
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+				reg = <0x1d>;
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+				label = "vdd_1p8a";
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+			};
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+
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+			channel@20 {
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+				gw,mode = <1>;
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+				reg = <0x20>;
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+				label = "vdd_1p0b";
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+			};
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+		};
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+	};
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+
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+	gsc_gpio: gpio@23 {
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+		compatible = "nxp,pca9555";
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+		reg = <0x23>;
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+		gpio-controller;
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+		#gpio-cells = <2>;
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+		interrupt-parent = <&gsc>;
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+		interrupts = <4>;
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+	};
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+
126
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 	eeprom1: eeprom@50 {
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 		compatible = "atmel,24c02";
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 		reg = <0x50>;
..
..
@@ -145,13 +329,6 @@
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 		compatible = "atmel,24c02";
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 		reg = <0x53>;
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 		pagesize = <16>;
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-	};
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-
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-	gpio: pca9555@23 {
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-		compatible = "nxp,pca9555";
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-		reg = <0x23>;
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-		gpio-controller;
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-		#gpio-cells = <2>;
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 	};
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333
 
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 	rtc: ds1672@68 {
..
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@@ -263,6 +440,60 @@
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 		#gpio-cells = <2>;
264
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 	};
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442
 
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+	hdmi_receiver: hdmi-receiver@48 {
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+		compatible = "nxp,tda19971";
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+		pinctrl-names = "default";
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+		pinctrl-0 = <&pinctrl_tda1997x>;
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+		reg = <0x48>;
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+		interrupt-parent = <&gpio1>;
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+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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+		DOVDD-supply = <&reg_3p3>;
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+		AVDD-supply = <&reg_1p8b>;
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+		DVDD-supply = <&reg_1p8a>;
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+		#sound-dai-cells = <0>;
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+		nxp,audout-format = "i2s";
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+		nxp,audout-layout = <0>;
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+		nxp,audout-width = <16>;
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+		nxp,audout-mclk-fs = <128>;
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+		/*
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+		 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
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+		 * and Y[11:4] across 16bits in the same cycle
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+		 * which we map to VP[15:08]<->CSI_DATA[19:12]
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+		 */
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+		nxp,vidout-portcfg =
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+			/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
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+			< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
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+			/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
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+			< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
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+			/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
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+			< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
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+			/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
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+			< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
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+
473
+		port {
474
+			tda1997x_to_ipu1_csi0_mux: endpoint {
475
+				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
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+				bus-width = <16>;
477
+				hsync-active = <1>;
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+				vsync-active = <1>;
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+				data-active = <1>;
480
+			};
481
+		};
482
+	};
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+};
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+
485
+&ipu1_csi0_from_ipu1_csi0_mux {
486
+	bus-width = <16>;
487
+};
488
+
489
+&ipu1_csi0_mux_from_parallel_sensor {
490
+	remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
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+	bus-width = <16>;
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+};
493
+
494
+&ipu1_csi0 {
495
+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinctrl_ipu1_csi0>;
266
497
 };
267
498
 
268
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 &pcie {
..
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@@ -320,6 +551,14 @@
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551
 };
321
552
 
322
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 &iomuxc {
554
+	pinctrl_audmux: audmuxgrp {
555
+		fsl,pins = <
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+			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0
557
+			MX6QDL_PAD_DISP0_DAT14__AUD5_RXC	0x130b0
558
+			MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS	0x130b0
559
+		>;
560
+	};
561
+
323
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 	pinctrl_flexcan1: flexcan1grp {
324
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 		fsl,pins = <
325
564
 			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
..
..
@@ -358,6 +597,7 @@
358
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 		fsl,pins = <
359
598
 			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
360
599
 			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
600
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
361
601
 		>;
362
602
 	};
363
603
 
..
..
@@ -372,6 +612,30 @@
372
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 		fsl,pins = <
373
613
 			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
374
614
 			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
615
+		>;
616
+	};
617
+
618
+	pinctrl_ipu1_csi0: ipu1_csi0grp {
619
+		fsl,pins = <
620
+			MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04		0x1b0b0
621
+			MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05		0x1b0b0
622
+			MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06		0x1b0b0
623
+			MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07		0x1b0b0
624
+			MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08		0x1b0b0
625
+			MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09		0x1b0b0
626
+			MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10		0x1b0b0
627
+			MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11		0x1b0b0
628
+			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
629
+			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
630
+			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
631
+			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
632
+			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
633
+			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
634
+			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
635
+			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
636
+			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC		0x1b0b0
637
+			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
638
+			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC		0x1b0b0
375
639
 		>;
376
640
 	};
377
641
 
..
..
@@ -399,6 +663,12 @@
399
663
 		>;
400
664
 	};
401
665
 
666
+	pinctrl_tda1997x: tda1997xgrp {
667
+		fsl,pins = <
668
+			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0
669
+		>;
670
+	};
671
+
402
672
 	pinctrl_uart2: uart2grp {
403
673
 		fsl,pins = <
404
674
 			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1