修改GPIO导出默认初始值

hc

2024-10-16 50a212ec906f7524620675f0c57357691c26c81f

 kernel/arch/arm/boot/dts/imx27.dtsi
..
..
@@ -40,7 +40,7 @@
40
40
 		spi2 = &cspi3;
41
41
 	};
42
42
 
43
-	aitc: aitc-interrupt-controller@e0000000 {
43
+	aitc: aitc-interrupt-controller@10040000 {
44
44
 		compatible = "fsl,imx27-aitc", "fsl,avic";
45
45
 		interrupt-controller;
46
46
 		#interrupt-cells = <1>;
..
..
@@ -134,7 +134,7 @@
134
134
 			};
135
135
 
136
136
 			pwm: pwm@10006000 {
137
-				#pwm-cells = <2>;
137
+				#pwm-cells = <3>;
138
138
 				compatible = "fsl,imx27-pwm";
139
139
 				reg = <0x10006000 0x1000>;
140
140
 				interrupts = <23>;
..
..
@@ -207,7 +207,7 @@
207
207
 				status = "disabled";
208
208
 			};
209
209
 
210
-			cspi1: cspi@1000e000 {
210
+			cspi1: spi@1000e000 {
211
211
 				#address-cells = <1>;
212
212
 				#size-cells = <0>;
213
213
 				compatible = "fsl,imx27-cspi";
..
..
@@ -219,7 +219,7 @@
219
219
 				status = "disabled";
220
220
 			};
221
221
 
222
-			cspi2: cspi@1000f000 {
222
+			cspi2: spi@1000f000 {
223
223
 				#address-cells = <1>;
224
224
 				#size-cells = <0>;
225
225
 				compatible = "fsl,imx27-cspi";
..
..
@@ -265,7 +265,7 @@
265
265
 				status = "disabled";
266
266
 			};
267
267
 
268
-			sdhci1: sdhci@10013000 {
268
+			sdhci1: mmc@10013000 {
269
269
 				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
270
270
 				reg = <0x10013000 0x1000>;
271
271
 				interrupts = <11>;
..
..
@@ -277,7 +277,7 @@
277
277
 				status = "disabled";
278
278
 			};
279
279
 
280
-			sdhci2: sdhci@10014000 {
280
+			sdhci2: mmc@10014000 {
281
281
 				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
282
282
 				reg = <0x10014000 0x1000>;
283
283
 				interrupts = <10>;
..
..
@@ -371,7 +371,7 @@
371
371
 				status = "disabled";
372
372
 			};
373
373
 
374
-			cspi3: cspi@10017000 {
374
+			cspi3: spi@10017000 {
375
375
 				#address-cells = <1>;
376
376
 				#size-cells = <0>;
377
377
 				compatible = "fsl,imx27-cspi";
..
..
@@ -431,7 +431,7 @@
431
431
 				status = "disabled";
432
432
 			};
433
433
 
434
-			sdhci3: sdhci@1001e000 {
434
+			sdhci3: mmc@1001e000 {
435
435
 				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
436
436
 				reg = <0x1001e000 0x1000>;
437
437
 				interrupts = <9>;
..
..
@@ -525,7 +525,7 @@
525
525
 				reg = <0x10024600 0x200>;
526
526
 			};
527
527
 
528
-			sahara2: sahara@10025000 {
528
+			sahara2: crypto@10025000 {
529
529
 				compatible = "fsl,imx27-sahara";
530
530
 				reg = <0x10025000 0x1000>;
531
531
 				interrupts = <59>;
..
..
@@ -540,7 +540,7 @@
540
540
 				#clock-cells = <1>;
541
541
 			};
542
542
 
543
-			iim: iim@10028000 {
543
+			iim: efuse@10028000 {
544
544
 				compatible = "fsl,imx27-iim";
545
545
 				reg = <0x10028000 0x1000>;
546
546
 				interrupts = <62>;
..
..
@@ -558,7 +558,7 @@
558
558
 			};
559
559
 		};
560
560
 
561
-		nfc: nand@d8000000 {
561
+		nfc: nand-controller@d8000000 {
562
562
 			#address-cells = <1>;
563
563
 			#size-cells = <1>;
564
564
 			compatible = "fsl,imx27-nand";
..
..
@@ -585,7 +585,7 @@
585
585
 			status = "disabled";
586
586
 		};
587
587
 
588
-		iram: iram@ffff4c00 {
588
+		iram: sram@ffff4c00 {
589
589
 			compatible = "mmio-sram";
590
590
 			reg = <0xffff4c00 0xb400>;
591
591
 		};