| .. | .. |
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| 84 | 84 | /* x1 port */ |
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| 85 | 85 | pcie2: pcie@2,0 { |
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| 86 | 86 | device_type = "pci"; |
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| 87 | | - assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; |
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| 87 | + assigned-addresses = <0x82001000 0 0x40000 0 0x2000>; |
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| 88 | 88 | reg = <0x1000 0 0 0 0>; |
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| 89 | 89 | #address-cells = <3>; |
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| 90 | 90 | #size-cells = <2>; |
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| .. | .. |
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| 103 | 103 | /* x1 port */ |
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| 104 | 104 | pcie3: pcie@3,0 { |
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| 105 | 105 | device_type = "pci"; |
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| 106 | | - assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; |
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| 106 | + assigned-addresses = <0x82001800 0 0x44000 0 0x2000>; |
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| 107 | 107 | reg = <0x1800 0 0 0 0>; |
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| 108 | 108 | #address-cells = <3>; |
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| 109 | 109 | #size-cells = <2>; |
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| .. | .. |
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| 125 | 125 | */ |
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| 126 | 126 | pcie4: pcie@4,0 { |
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| 127 | 127 | device_type = "pci"; |
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| 128 | | - assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; |
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| 128 | + assigned-addresses = <0x82002000 0 0x48000 0 0x2000>; |
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| 129 | 129 | reg = <0x2000 0 0 0 0>; |
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| 130 | 130 | #address-cells = <3>; |
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| 131 | 131 | #size-cells = <2>; |
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