forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-05-31 43fd8d44e8182b691c8ee61d487cec02ca11afd2
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -8,6 +8,7 @@
88
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314
....@@ -17,7 +18,8 @@
1718
1819 rk_headset: rk-headset {
1920 compatible = "rockchip_headset";
20
- headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 pinctrl-names = "default";
2224 pinctrl-0 = <&hp_det>;
2325 };
....@@ -32,15 +34,6 @@
3234 vin-supply = <&vcc3v3_sys>;
3335 };
3436
35
- vcc3v3_vga: vcc3v3-vga {
36
- compatible = "regulator-fixed";
37
- regulator-name = "vcc3v3_vga";
38
- regulator-always-on;
39
- regulator-boot-on;
40
- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41
- enable-active-high;
42
- vin-supply = <&vcc3v3_sys>;
43
- };
4437
4538 pcie30_avdd0v9: pcie30-avdd0v9 {
4639 compatible = "regulator-fixed";
....@@ -67,7 +60,9 @@
6760 regulator-name = "vcc3v3_pcie";
6861 regulator-min-microvolt = <3300000>;
6962 regulator-max-microvolt = <3300000>;
63
+ regulator-always-on;
7064 enable-active-high;
65
+ regulator-boot-on;
7166 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
7267 startup-delay-us = <5000>;
7368 vin-supply = <&dc_12v>;
....@@ -97,35 +92,65 @@
9792
9893 nk_io_init {
9994 compatible = "nk_io_control";
100
- usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
101
- lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
102
- lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
10395 vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
10496 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
10597 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
106
-// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
10798 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
10899 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
109100 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
110101 reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
111102 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
112103 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
113
-
114
- edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
115
- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
116
- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
117
- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
118
- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
119
- edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
120
-// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
121
-// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
122
-
104
+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
105
+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
123106 wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
124
-
107
+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
125108 pinctrl-names = "default";
126
- pinctrl-0 = <&nk_io_gpio>;
127
- nodka_lvds = <9>;
109
+ pinctrl-0 = <&nk_io_gpio>;
128110 };
111
+
112
+ panel: panel {
113
+ compatible = "simple-panel";
114
+ backlight = <&backlight>;
115
+ power-supply = <&vcc3v3_lcd0_n>;
116
+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
117
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
118
+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
119
+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
120
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
121
+ bpc = <8>;
122
+ prepare-delay-ms = <200>;
123
+ enable-delay-ms = <20>;
124
+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
125
+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
126
+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
127
+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
128
+ nodka-lvds = <15>;
129
+
130
+ display-timings {
131
+ native-mode = <&timing0>;
132
+ timing0: timing0 {
133
+ clock-frequency = <72500000>;
134
+ hactive = <1280>;
135
+ vactive = <800>;
136
+ hfront-porch = <70>;
137
+ hsync-len = <2>;
138
+ hback-porch = <88>;
139
+ vfront-porch = <7>;
140
+ vsync-len = <4>;
141
+ vback-porch = <17>;
142
+ hsync-active = <21>;
143
+ vsync-active = <0>;
144
+ de-active = <0>;
145
+ pixelclk-active = <0>;
146
+ };
147
+ };
148
+ ports {
149
+ panel_in: endpoint {
150
+ remote-endpoint = <&edp_out>;
151
+ };
152
+ };
153
+ };
129154 };
130155
131156 &combphy0_us {
....@@ -141,11 +166,11 @@
141166 };
142167
143168 &csi2_dphy_hw {
144
- status = "okay";
169
+ status = "disabled";
145170 };
146171
147172 &csi2_dphy0 {
148
- status = "okay";
173
+ status = "disabled";
149174
150175 ports {
151176 #address-cells = <1>;
....@@ -188,8 +213,12 @@
188213 * video_phy0 needs to be enabled
189214 * when dsi0 is enabled
190215 */
216
+&video_phy0 {
217
+ status = "disabled";
218
+};
219
+
191220 &dsi0 {
192
- status = "okay";
221
+ status = "disabled";
193222 };
194223
195224 &dsi0_in_vp0 {
....@@ -197,7 +226,7 @@
197226 };
198227
199228 &dsi0_in_vp1 {
200
- status = "okay";
229
+ status = "disabled";
201230 };
202231
203232 &dsi0_panel {
....@@ -208,6 +237,10 @@
208237 * video_phy1 needs to be enabled
209238 * when dsi1 is enabled
210239 */
240
+
241
+&video_phy1 {
242
+ status = "okay";
243
+};
211244 &dsi1 {
212245 status = "disabled";
213246 };
....@@ -217,29 +250,102 @@
217250 };
218251
219252 &dsi1_in_vp1 {
220
- status = "disabled";
253
+ status = "okay";
221254 };
222255
223256 &dsi1_panel {
224
- power-supply = <&vcc3v3_lcd1_n>;
257
+ power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
258
+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
259
+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
260
+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
261
+ pinctrl-names = "default";
262
+ pinctrl-0 = <&lcd1_rst_gpio>;
225263 };
226264
265
+&route_dsi1 {
266
+ status = "disabled";
267
+ connect = <&vp1_out_dsi1>;
268
+};
269
+
270
+
271
+/*
272
+* edp_start
273
+*/
274
+
227275 &edp {
228
- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
229
- status = "okay";
276
+ force-hpd;
277
+ status = "okay";
278
+ ports {
279
+ port@1 {
280
+ reg = <1>;
281
+ edp_out: endpoint {
282
+ remote-endpoint = <&panel_in>;
283
+ };
284
+ };
285
+ };
230286 };
231287
232288 &edp_phy {
233
- status = "okay";
289
+ status = "okay";
290
+
234291 };
235292
236293 &edp_in_vp0 {
237
- status = "okay";
294
+ status = "disabled";
238295 };
239296
240297 &edp_in_vp1 {
298
+ status = "okay";
299
+
300
+};
301
+
302
+&route_edp {
303
+ status = "okay";
304
+ connect = <&vp1_out_edp>;
305
+};
306
+
307
+&route_edp {
308
+ status = "okay";
309
+};
310
+/*
311
+* edp_end
312
+*/
313
+
314
+/*
315
+* Hdmi_start
316
+*/
317
+
318
+&hdmi {
319
+ status = "okay";
320
+ rockchip,phy-table =
321
+ <92812500 0x8009 0x0000 0x0270>,
322
+ <165000000 0x800b 0x0000 0x026d>,
323
+ <185625000 0x800b 0x0000 0x01ed>,
324
+ <297000000 0x800b 0x0000 0x01ad>,
325
+ <594000000 0x8029 0x0000 0x0088>,
326
+ <000000000 0x0000 0x0000 0x0000>;
327
+};
328
+
329
+&route_hdmi {
330
+ status = "okay";
331
+ connect = <&vp0_out_hdmi>;
332
+};
333
+
334
+&hdmi_in_vp0 {
335
+ status = "okay";
336
+};
337
+
338
+&hdmi_in_vp1 {
241339 status = "disabled";
242340 };
341
+
342
+&hdmi_sound {
343
+ status = "okay";
344
+};
345
+
346
+/*
347
+ * Hdmi_END
348
+*/
243349
244350 &gmac0 {
245351 phy-mode = "rgmii";
....@@ -317,9 +423,6 @@
317423 compatible = "nk_mcu";
318424 reg = <0x15>;
319425 };
320
-
321
-
322
-
323426 };
324427
325428 &i2c4 {
....@@ -392,6 +495,19 @@
392495 };
393496 };
394497
498
+&i2c5 {
499
+ status = "okay";
500
+
501
+ hym8563: hym8563@51 {
502
+ compatible = "haoyu,hym8563";
503
+ reg = <0x51>;
504
+ #clock-cells = <0>;
505
+ clock-frequency = <32768>;
506
+ clock-output-names = "xin32k";
507
+ /* rtc_int is not connected */
508
+ };
509
+};
510
+
395511 &mdio0 {
396512 rgmii_phy0: phy@0 {
397513 compatible = "ethernet-phy-ieee802.3-c22";
....@@ -406,20 +522,14 @@
406522 };
407523 };
408524
409
-&video_phy0 {
410
- status = "okay";
411
-};
412525
413
-&video_phy1 {
414
- status = "disabled";
415
-};
416526
417527 &pcie30phy {
418528 status = "okay";
419529 };
420530
421
-&pcie3x2 {
422
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
531
+&pcie2x1 {
532
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
423533 vpcie3v3-supply = <&vcc3v3_pcie>;
424534 status = "okay";
425535 };
....@@ -434,7 +544,8 @@
434544 // };
435545 headphone {
436546 hp_det: hp-det {
437
- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
547
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
548
+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
438549 };
439550 };
440551
....@@ -449,23 +560,46 @@
449560 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
450561 };
451562 };
563
+
564
+ lcd1 {
565
+ lcd1_rst_gpio: lcd1-rst-gpio {
566
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
567
+ };
568
+ };
569
+
452570 nk_io_init{
453571 nk_io_gpio: nk-io-gpio{
454
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
572
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
573
+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
574
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
575
+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
576
+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
577
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
578
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
579
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
580
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
581
+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
582
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
583
+ <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
584
+ <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
585
+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
586
+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
587
+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
588
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
455589 };
456590 };
457591 };
458592
459593 &rkisp {
460
- status = "okay";
594
+ status = "disabled";
461595 };
462596
463597 &rkisp_mmu {
464
- status = "okay";
598
+ status = "disabled";
465599 };
466600
467601 &rkisp_vir0 {
468
- status = "okay";
602
+ status = "disabled";
469603
470604 port {
471605 #address-cells = <1>;
....@@ -478,15 +612,9 @@
478612 };
479613 };
480614
481
-&route_dsi0 {
482
- status = "okay";
483
- connect = <&vp1_out_dsi0>;
484
-};
485615
486
-&route_edp {
487
- status = "okay";
488
- connect = <&vp0_out_edp>;
489
-};
616
+
617
+
490618
491619 &sata2 {
492620 status = "okay";
....@@ -525,12 +653,12 @@
525653 };
526654
527655 &vcc3v3_lcd0_n {
528
- gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
656
+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
529657 enable-active-high;
530658 };
531659
532660 &vcc3v3_lcd1_n {
533
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
661
+ gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
534662 enable-active-high;
535663 };
536664