forked from ~ljy/RK356X_SDK_RELEASE
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2023-05-31 43fd8d44e8182b691c8ee61d487cec02ca11afd2 
 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -8,6 +8,7 @@
88 
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314 
....@@ -17,7 +18,8 @@
1718 
1819 	rk_headset: rk-headset {
1920 		compatible = "rockchip_headset";
20
-		headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 		pinctrl-names = "default";
2224 		pinctrl-0 = <&hp_det>;
2325 	};
....@@ -32,15 +34,6 @@
3234 		vin-supply = <&vcc3v3_sys>;
3335 	};
3436 
35
-	vcc3v3_vga: vcc3v3-vga {
36
-		compatible = "regulator-fixed";
37
-		regulator-name = "vcc3v3_vga";
38
-		regulator-always-on;
39
-		regulator-boot-on;
40
-		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41
-		enable-active-high;
42
-		vin-supply = <&vcc3v3_sys>;
43
-	};
4437 
4538 	pcie30_avdd0v9: pcie30-avdd0v9 {
4639 		compatible = "regulator-fixed";
....@@ -67,7 +60,9 @@
6760 		regulator-name = "vcc3v3_pcie";
6861 		regulator-min-microvolt = <3300000>;
6962 		regulator-max-microvolt = <3300000>;
63
+		regulator-always-on;
7064 		enable-active-high;
65
+		regulator-boot-on;
7166 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
7267 		startup-delay-us = <5000>;
7368 		vin-supply = <&dc_12v>;
....@@ -82,7 +77,7 @@
8277 		regulator-max-microvolt = <3300000>;
8378 		vin-supply = <&vcc5v0_sys>;
8479 	};
85
-
80
+#if 0
8681 	vcc_camera: vcc-camera-regulator {
8782 		compatible = "regulator-fixed";
8883 		gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
....@@ -92,43 +87,70 @@
9287 		enable-active-high;
9388 		regulator-always-on;
9489 		regulator-boot-on;
95
-	
9690     	};
91
+#endif
9792 
9893 	    nk_io_init {
9994                 compatible = "nk_io_control";
100
-                hub_host2_5v_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; //USB_HOST_PWREN_H_GPIO0_A6
101
-		usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;  //USB_EN_OC_GPIO0_A5
102
-		lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
103
-		lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
104
-		vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
95
+				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
10596                 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
10697                 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
107
-//              hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 
10898                 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
10999                 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
110100                 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
111101                 reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
112102                 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
113103                 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
114
-                
115
-		edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
116
-                edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
117
-        	edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
118
-        	edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
119
-        	edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
120
-                edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
121
-//              tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
122
-//              vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
123
-		
124
-		wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
125
-
126
-  //      pinctrl-names = "default";
127
-//        pinctrl-0 = <&nk_io_gpio>;
128
-        nodka_lvds = <9>;
104
+				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
105
+//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
106
+				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
107
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
108
+				pinctrl-names = "default";
109
+				pinctrl-0 = <&nk_io_gpio>;				
129110         };
111
+		
112
+		panel: panel {
113
+				compatible = "simple-panel";
114
+				backlight = <&backlight>;
115
+				power-supply = <&vcc3v3_lcd0_n>;
116
+				enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
117
+				reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
118
+				edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
119
+				edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
120
+				bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
121
+				bpc = <8>;
122
+				prepare-delay-ms = <200>;
123
+				enable-delay-ms = <20>;
124
+				lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 
125
+				lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 
126
+				lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 
127
+				lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
128
+				nodka-lvds = <15>;
130129 
131
-	
130
+				display-timings {
131
+                native-mode = <&timing0>;
132
+                timing0: timing0 {
133
+					clock-frequency = <72500000>;
134
+					hactive = <1280>;
135
+					vactive = <800>;
136
+					hfront-porch = <70>;
137
+					hsync-len = <2>;
138
+					hback-porch = <88>;
139
+					vfront-porch = <7>;
140
+					vsync-len = <4>;
141
+					vback-porch = <17>;
142
+					hsync-active = <21>;
143
+					vsync-active = <0>;
144
+					de-active = <0>;
145
+					pixelclk-active = <0>;			
146
+					};
147
+				};
148
+				ports {
149
+					panel_in: endpoint {
150
+					remote-endpoint = <&edp_out>;
151
+						};
152
+					};   
153
+				};
132154 };
133155 
134156 &combphy0_us {
....@@ -144,11 +166,11 @@
144166 };
145167 
146168 &csi2_dphy_hw {
147
-	status = "okay";
169
+	status = "disabled";
148170 };
149171 
150172 &csi2_dphy0 {
151
-	status = "okay";
173
+	status = "disabled";
152174 
153175 	ports {
154176 		#address-cells = <1>;
....@@ -191,8 +213,12 @@
191213  * video_phy0 needs to be enabled
192214  * when dsi0 is enabled
193215  */
216
+&video_phy0 {
217
+	status = "disabled";
218
+};
219
+
194220 &dsi0 {
195
-	status = "okay";
221
+	status = "disabled";
196222 };
197223 
198224 &dsi0_in_vp0 {
....@@ -200,7 +226,7 @@
200226 };
201227 
202228 &dsi0_in_vp1 {
203
-	status = "okay";
229
+	status = "disabled";
204230 };
205231 
206232 &dsi0_panel {
....@@ -211,6 +237,10 @@
211237  * video_phy1 needs to be enabled
212238  * when dsi1 is enabled
213239  */
240
+ 
241
+&video_phy1 {
242
+	status = "okay";
243
+}; 
214244 &dsi1 {
215245 	status = "disabled";
216246 };
....@@ -220,29 +250,102 @@
220250 };
221251 
222252 &dsi1_in_vp1 {
223
-	status = "disabled";
253
+	status = "okay";
224254 };
225255 
226256 &dsi1_panel {
227
-	power-supply = <&vcc3v3_lcd1_n>;
257
+	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
258
+    vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
259
+    reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
260
+    vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
261
+    pinctrl-names = "default";
262
+    pinctrl-0 = <&lcd1_rst_gpio>;
228263 };
229264 
265
+&route_dsi1 {
266
+	status = "disabled";
267
+	connect = <&vp1_out_dsi1>;
268
+};
269
+
270
+
271
+/*
272
+*  edp_start
273
+*/
274
+
230275 &edp {
231
-	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
232
-	status = "okay";
276
+    force-hpd;
277
+    status = "okay";
278
+    ports {
279
+        port@1 {
280
+            reg = <1>;
281
+            edp_out: endpoint {
282
+                remote-endpoint = <&panel_in>;
283
+            };
284
+        };
285
+    };
233286 };
234287 
235288 &edp_phy {
236
-	status = "okay";
289
+  status = "okay";
290
+
237291 };
238292 
239293 &edp_in_vp0 {
240
-	status = "okay";
294
+    status = "disabled";
241295 };
242296 
243297 &edp_in_vp1 {
298
+    status = "okay";
299
+
300
+};
301
+
302
+&route_edp {
303
+    status = "okay";
304
+    connect = <&vp1_out_edp>;
305
+};
306
+
307
+&route_edp {
308
+	status = "okay";
309
+};
310
+/*
311
+*  edp_end
312
+*/
313
+
314
+/*
315
+*  Hdmi_start
316
+*/
317
+
318
+&hdmi {
319
+	status = "okay";
320
+	rockchip,phy-table =
321
+		<92812500  0x8009 0x0000 0x0270>,
322
+		<165000000 0x800b 0x0000 0x026d>,
323
+		<185625000 0x800b 0x0000 0x01ed>,
324
+		<297000000 0x800b 0x0000 0x01ad>,
325
+		<594000000 0x8029 0x0000 0x0088>,
326
+		<000000000 0x0000 0x0000 0x0000>;
327
+};
328
+
329
+&route_hdmi {
330
+	status = "okay";
331
+	connect = <&vp0_out_hdmi>;
332
+};
333
+
334
+&hdmi_in_vp0 {
335
+	status = "okay";
336
+};
337
+
338
+&hdmi_in_vp1 {
244339 	status = "disabled";
245340 };
341
+
342
+&hdmi_sound {
343
+	status = "okay";
344
+};
345
+
346
+/*
347
+ *  Hdmi_END
348
+*/
246349 
247350 &gmac0 {
248351 	phy-mode = "rgmii";
....@@ -320,9 +423,6 @@
320423                 compatible = "nk_mcu";
321424                 reg = <0x15>;
322425         };
323
-
324
-
325
-
326426 };
327427 
328428 &i2c4 {
....@@ -395,6 +495,19 @@
395495 	};
396496 };
397497 
498
+&i2c5 {
499
+	status = "okay";
500
+
501
+	hym8563: hym8563@51 {
502
+		compatible = "haoyu,hym8563";
503
+		reg = <0x51>;
504
+		#clock-cells = <0>;
505
+		clock-frequency = <32768>;
506
+		clock-output-names = "xin32k";
507
+		/* rtc_int is not connected */
508
+	};
509
+};
510
+
398511 &mdio0 {
399512 	rgmii_phy0: phy@0 {
400513 		compatible = "ethernet-phy-ieee802.3-c22";
....@@ -409,73 +522,84 @@
409522 	};
410523 };
411524 
412
-&video_phy0 {
413
-	status = "okay";
414
-};
415525 
416
-&video_phy1 {
417
-	status = "disabled";
418
-};
419526 
420527 &pcie30phy {
421528 	status = "okay";
422529 };
423530 
424
-&pcie3x2 {
425
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
531
+&pcie2x1 {
532
+	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
426533 	vpcie3v3-supply = <&vcc3v3_pcie>;
427534 	status = "okay";
428535 };
429536 
430537 &pinctrl {
431
-	cam {
432
-		camera_pwr: camera-pwr {
433
-			rockchip,pins =
434
-				/* camera power en */
435
-				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
436
-		};
437
-	};
538
+//	cam {
539
+//		camera_pwr: camera-pwr {
540
+//			rockchip,pins =
541
+//				/* camera power en */
542
+//				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
543
+//		};
544
+//	};
438545 	headphone {
439546 		hp_det: hp-det {
440
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
547
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
548
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
441549 		};
442550 	};
443551 
444552 	wireless-wlan {
445553 		wifi_host_wake_irq: wifi-host-wake-irq {
446
-			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
554
+			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
447555 		};
448556 	};
449557 
450558 	wireless-bluetooth {
451
-		uart8_gpios: uart8-gpios {
452
-			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
559
+		uart1_gpios: uart1-gpios {
560
+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
453561 		};
454562 	};
455
-
456
-	nk_io_gpio: nk_io_gpio_col{
457
-                        rockchip,pins =
458
-                                <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
459
-                                <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
460
-                                <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
461
-                                <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
462
-                                <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
463
-                                <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
464
-                                <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
465
-                                <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
563
+	
564
+	lcd1 {
565
+        lcd1_rst_gpio: lcd1-rst-gpio {
566
+            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
567
+        };
568
+    };
569
+		
570
+	nk_io_init{
571
+		nk_io_gpio: nk-io-gpio{
572
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
573
+							<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
574
+							<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
575
+							<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
576
+							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
577
+							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
578
+							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
579
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
580
+							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
581
+							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
582
+							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
583
+							<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
584
+							<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
585
+							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
586
+							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
587
+							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
588
+							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
589
+		};
466590 	};
467591 };
468592 
469593 &rkisp {
470
-	status = "okay";
594
+	status = "disabled";
471595 };
472596 
473597 &rkisp_mmu {
474
-	status = "okay";
598
+	status = "disabled";
475599 };
476600 
477601 &rkisp_vir0 {
478
-	status = "okay";
602
+	status = "disabled";
479603 
480604 	port {
481605 		#address-cells = <1>;
....@@ -488,34 +612,32 @@
488612 	};
489613 };
490614 
491
-&route_dsi0 {
492
-	status = "okay";
493
-	connect = <&vp1_out_dsi0>;
494
-};
495615 
496
-&route_edp {
497
-	status = "okay";
498
-	connect = <&vp0_out_edp>;
499
-};
616
+
617
+
500618 
501619 &sata2 {
502620 	status = "okay";
503621 };
504622 
505623 &sdmmc2 {
506
-	max-frequency = <150000000>;
507
-	supports-sdio;
508
-	bus-width = <4>;
509
-	disable-wp;
510
-	cap-sd-highspeed;
511
-	cap-sdio-irq;
512
-	keep-power-in-suspend;
513
-	mmc-pwrseq = <&sdio_pwrseq>;
514
-	non-removable;
515
-	pinctrl-names = "default";
516
-	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
517
-	sd-uhs-sdr104;
518
-	status = "okay";
624
+        status = "disabled";
625
+};
626
+
627
+&sdmmc1 {
628
+        max-frequency = <150000000>;
629
+        supports-sdio;
630
+        bus-width = <4>;
631
+        disable-wp;
632
+        cap-sd-highspeed;
633
+        cap-sdio-irq;
634
+        keep-power-in-suspend;
635
+        mmc-pwrseq = <&sdio_pwrseq>;
636
+        non-removable;
637
+        pinctrl-names = "default";
638
+        pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
639
+        sd-uhs-sdr104;
640
+        status = "okay";
519641 };
520642 
521643 &spdif_8ch {
....@@ -531,12 +653,12 @@
531653 };
532654 
533655 &vcc3v3_lcd0_n {
534
-	gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
656
+	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
535657 	enable-active-high;
536658 };
537659 
538660 &vcc3v3_lcd1_n {
539
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
661
+	gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
540662 	enable-active-high;
541663 };
542664 
....@@ -551,12 +673,42 @@
551673 	clocks = <&rk809 1>;
552674 	clock-names = "ext_clock";
553675 	//wifi-bt-power-toggle;
554
-	uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
676
+	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
677
+	BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
555678 	pinctrl-names = "default", "rts_gpio";
556
-	pinctrl-0 = <&uart8m0_rtsn>;
557
-	pinctrl-1 = <&uart8_gpios>;
679
+	pinctrl-0 = <&uart1m0_rtsn>;
680
+	pinctrl-1 = <&uart1_gpios>;
558681 	BT,reset_gpio    = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
559682 	BT,wake_gpio     = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
560683 	BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
684
+	status = "disabled";
685
+};
686
+
687
+&uart0 {
561688 	status = "okay";
562689 };
690
+
691
+&uart3 {
692
+	status = "okay";
693
+	pinctrl-0 = <&uart3m1_xfer>;
694
+};
695
+
696
+&uart4 {
697
+	status = "okay";
698
+	pinctrl-0 = <&uart4m1_xfer>;
699
+};
700
+
701
+&uart5 {
702
+	status = "okay";
703
+	pinctrl-0 = <&uart5m1_xfer>;
704
+};
705
+
706
+&uart7 {
707
+	status = "okay";
708
+	pinctrl-0 = <&uart7m1_xfer>;
709
+};
710
+
711
+&uart9 {
712
+	status = "okay";
713
+	pinctrl-0 = <&uart9m1_xfer>;
714
+};