hc
2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb
kernel/include/linux/iio/adc/ad_sigma_delta.h
....@@ -1,10 +1,9 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23 * Support code for Analog Devices Sigma-Delta ADCs
34 *
45 * Copyright 2012 Analog Devices Inc.
56 * Author: Lars-Peter Clausen <lars@metafoo.de>
6
- *
7
- * Licensed under the GPL-2.
87 */
98 #ifndef __AD_SIGMA_DELTA_H__
109 #define __AD_SIGMA_DELTA_H__
....@@ -39,6 +38,9 @@
3938 * if there is just one read-only sample data shift register.
4039 * @addr_shift: Shift of the register address in the communications register.
4140 * @read_mask: Mask for the communications register having the read bit set.
41
+ * @data_reg: Address of the data register, if 0 the default address of 0x3 will
42
+ * be used.
43
+ * @irq_flags: flags for the interrupt used by the triggered buffer
4244 */
4345 struct ad_sigma_delta_info {
4446 int (*set_channel)(struct ad_sigma_delta *, unsigned int channel);
....@@ -47,6 +49,8 @@
4749 bool has_registers;
4850 unsigned int addr_shift;
4951 unsigned int read_mask;
52
+ unsigned int data_reg;
53
+ unsigned long irq_flags;
5054 };
5155
5256 /**
....@@ -75,8 +79,12 @@
7579 /*
7680 * DMA (thus cache coherency maintenance) requires the
7781 * transfer buffers to live in their own cache lines.
82
+ * 'tx_buf' is up to 32 bits.
83
+ * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp,
84
+ * rounded to 16 bytes to take into account padding.
7885 */
79
- uint8_t data[4] ____cacheline_aligned;
86
+ uint8_t tx_buf[4] ____cacheline_aligned;
87
+ uint8_t rx_buf[16] __aligned(8);
8088 };
8189
8290 static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
....@@ -117,6 +125,8 @@
117125
118126 int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
119127 const struct iio_chan_spec *chan, int *val);
128
+int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta,
129
+ unsigned int mode, unsigned int channel);
120130 int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
121131 const struct ad_sd_calib_data *cd, unsigned int n);
122132 int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev,
....@@ -126,63 +136,5 @@
126136 void ad_sd_cleanup_buffer_and_trigger(struct iio_dev *indio_dev);
127137
128138 int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig);
129
-
130
-#define __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
131
- _storagebits, _shift, _extend_name, _type, _mask_all) \
132
- { \
133
- .type = (_type), \
134
- .differential = (_channel2 == -1 ? 0 : 1), \
135
- .indexed = 1, \
136
- .channel = (_channel1), \
137
- .channel2 = (_channel2), \
138
- .address = (_address), \
139
- .extend_name = (_extend_name), \
140
- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
141
- BIT(IIO_CHAN_INFO_OFFSET), \
142
- .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
143
- .info_mask_shared_by_all = _mask_all, \
144
- .scan_index = (_si), \
145
- .scan_type = { \
146
- .sign = 'u', \
147
- .realbits = (_bits), \
148
- .storagebits = (_storagebits), \
149
- .shift = (_shift), \
150
- .endianness = IIO_BE, \
151
- }, \
152
- }
153
-
154
-#define AD_SD_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
155
- _storagebits, _shift) \
156
- __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
157
- _storagebits, _shift, NULL, IIO_VOLTAGE, \
158
- BIT(IIO_CHAN_INFO_SAMP_FREQ))
159
-
160
-#define AD_SD_SHORTED_CHANNEL(_si, _channel, _address, _bits, \
161
- _storagebits, _shift) \
162
- __AD_SD_CHANNEL(_si, _channel, _channel, _address, _bits, \
163
- _storagebits, _shift, "shorted", IIO_VOLTAGE, \
164
- BIT(IIO_CHAN_INFO_SAMP_FREQ))
165
-
166
-#define AD_SD_CHANNEL(_si, _channel, _address, _bits, \
167
- _storagebits, _shift) \
168
- __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
169
- _storagebits, _shift, NULL, IIO_VOLTAGE, \
170
- BIT(IIO_CHAN_INFO_SAMP_FREQ))
171
-
172
-#define AD_SD_CHANNEL_NO_SAMP_FREQ(_si, _channel, _address, _bits, \
173
- _storagebits, _shift) \
174
- __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
175
- _storagebits, _shift, NULL, IIO_VOLTAGE, 0)
176
-
177
-#define AD_SD_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \
178
- __AD_SD_CHANNEL(_si, 0, -1, _address, _bits, \
179
- _storagebits, _shift, NULL, IIO_TEMP, \
180
- BIT(IIO_CHAN_INFO_SAMP_FREQ))
181
-
182
-#define AD_SD_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \
183
- _shift) \
184
- __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
185
- _storagebits, _shift, "supply", IIO_VOLTAGE, \
186
- BIT(IIO_CHAN_INFO_SAMP_FREQ))
187139
188140 #endif