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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2006, Intel Corporation. |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify it |
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5 | | - * under the terms and conditions of the GNU General Public License, |
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6 | | - * version 2, as published by the Free Software Foundation. |
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7 | | - * |
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8 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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9 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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10 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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11 | | - * more details. |
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12 | | - * |
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13 | | - * You should have received a copy of the GNU General Public License along with |
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14 | | - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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15 | | - * Place - Suite 330, Boston, MA 02111-1307 USA. |
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16 | 4 | * |
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17 | 5 | * Copyright (C) Ashok Raj <ashok.raj@intel.com> |
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18 | 6 | * Copyright (C) Shaohua Li <shaohua.li@intel.com> |
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.. | .. |
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39 | 27 | /* DMAR Flags */ |
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40 | 28 | #define DMAR_INTR_REMAP 0x1 |
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41 | 29 | #define DMAR_X2APIC_OPT_OUT 0x2 |
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| 30 | +#define DMAR_PLATFORM_OPT_IN 0x4 |
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42 | 31 | |
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43 | 32 | struct intel_iommu; |
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44 | 33 | |
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.. | .. |
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59 | 48 | u16 segment; /* PCI domain */ |
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60 | 49 | u8 ignored:1; /* ignore drhd */ |
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61 | 50 | u8 include_all:1; |
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| 51 | + u8 gfx_dedicated:1; /* graphic dedicated */ |
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62 | 52 | struct intel_iommu *iommu; |
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63 | 53 | }; |
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64 | 54 | |
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.. | .. |
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80 | 70 | extern struct rw_semaphore dmar_global_lock; |
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81 | 71 | extern struct list_head dmar_drhd_units; |
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82 | 72 | |
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83 | | -#define for_each_drhd_unit(drhd) \ |
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84 | | - list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) |
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| 73 | +#define for_each_drhd_unit(drhd) \ |
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| 74 | + list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ |
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| 75 | + dmar_rcu_check()) |
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85 | 76 | |
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86 | 77 | #define for_each_active_drhd_unit(drhd) \ |
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87 | | - list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \ |
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| 78 | + list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ |
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| 79 | + dmar_rcu_check()) \ |
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88 | 80 | if (drhd->ignored) {} else |
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89 | 81 | |
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90 | 82 | #define for_each_active_iommu(i, drhd) \ |
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91 | | - list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \ |
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| 83 | + list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ |
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| 84 | + dmar_rcu_check()) \ |
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92 | 85 | if (i=drhd->iommu, drhd->ignored) {} else |
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93 | 86 | |
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94 | 87 | #define for_each_iommu(i, drhd) \ |
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95 | | - list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \ |
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| 88 | + list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ |
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| 89 | + dmar_rcu_check()) \ |
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96 | 90 | if (i=drhd->iommu, 0) {} else |
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97 | 91 | |
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98 | 92 | static inline bool dmar_rcu_check(void) |
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.. | .. |
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103 | 97 | |
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104 | 98 | #define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check()) |
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105 | 99 | |
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106 | | -#define for_each_dev_scope(a, c, p, d) \ |
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107 | | - for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)].dev) : \ |
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108 | | - NULL, (p) < (c)); (p)++) |
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| 100 | +#define for_each_dev_scope(devs, cnt, i, tmp) \ |
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| 101 | + for ((i) = 0; ((tmp) = (i) < (cnt) ? \ |
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| 102 | + dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \ |
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| 103 | + (i)++) |
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109 | 104 | |
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110 | | -#define for_each_active_dev_scope(a, c, p, d) \ |
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111 | | - for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else |
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| 105 | +#define for_each_active_dev_scope(devs, cnt, i, tmp) \ |
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| 106 | + for_each_dev_scope((devs), (cnt), (i), (tmp)) \ |
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| 107 | + if (!(tmp)) { continue; } else |
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112 | 108 | |
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113 | 109 | extern int dmar_table_init(void); |
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114 | 110 | extern int dmar_dev_scope_init(void); |
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.. | .. |
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138 | 134 | #ifdef CONFIG_INTEL_IOMMU |
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139 | 135 | extern int iommu_detected, no_iommu; |
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140 | 136 | extern int intel_iommu_init(void); |
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| 137 | +extern void intel_iommu_shutdown(void); |
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141 | 138 | extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg); |
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142 | 139 | extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg); |
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143 | 140 | extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg); |
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.. | .. |
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146 | 143 | extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info); |
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147 | 144 | #else /* !CONFIG_INTEL_IOMMU: */ |
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148 | 145 | static inline int intel_iommu_init(void) { return -ENODEV; } |
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| 146 | +static inline void intel_iommu_shutdown(void) { } |
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149 | 147 | |
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150 | 148 | #define dmar_parse_one_rmrr dmar_res_noop |
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151 | 149 | #define dmar_parse_one_atsr dmar_res_noop |
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.. | .. |
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170 | 168 | { return 0; } |
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171 | 169 | #endif /* CONFIG_IRQ_REMAP */ |
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172 | 170 | |
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| 171 | +extern bool dmar_platform_optin(void); |
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| 172 | + |
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173 | 173 | #else /* CONFIG_DMAR_TABLE */ |
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174 | 174 | |
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175 | 175 | static inline int dmar_device_add(void *handle) |
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.. | .. |
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182 | 182 | return 0; |
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183 | 183 | } |
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184 | 184 | |
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| 185 | +static inline bool dmar_platform_optin(void) |
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| 186 | +{ |
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| 187 | + return false; |
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| 188 | +} |
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| 189 | + |
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185 | 190 | #endif /* CONFIG_DMAR_TABLE */ |
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186 | 191 | |
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187 | 192 | struct irte { |
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