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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb 
 kernel/drivers/video/rockchip/rga3/include/rga.h
....@@ -86,6 +86,12 @@
8686 	RGA_SCALE_DOWN_AVG	= 0x1,
8787 };
8888 
89
+enum RGA_SCHEDULER_CORE {
90
+	RGA_SCHEDULER_RGA3_CORE0 = 1 << 0,
91
+	RGA_SCHEDULER_RGA3_CORE1 = 1 << 1,
92
+	RGA_SCHEDULER_RGA2_CORE0 = 1 << 2,
93
+};
94
+
8995 /* RGA process mode enum */
9096 enum {
9197 	BITBLT_MODE			= 0x0,
....@@ -139,6 +145,7 @@
139145 	RGA_YUV_VDS			= 0x1 << 10,
140146 	RGA_OSD				= 0x1 << 11,
141147 	RGA_PRE_INTR			= 0x1 << 12,
148
+	RGA_FULL_CSC			= 0x1 << 13,
142149 };
143150 
144151 enum rga_surf_format {
....@@ -201,6 +208,55 @@
201208 	RGA_FORMAT_RGBA_2BPP		= 0x30,
202209 
203210 	RGA_FORMAT_UNKNOWN		= 0x100,
211
+};
212
+
213
+enum rga_alpha_mode {
214
+	RGA_ALPHA_STRAIGHT		= 0,
215
+	RGA_ALPHA_INVERSE		= 1,
216
+};
217
+
218
+enum rga_global_blend_mode {
219
+	RGA_ALPHA_GLOBAL		= 0,
220
+	RGA_ALPHA_PER_PIXEL		= 1,
221
+	RGA_ALPHA_PER_PIXEL_GLOBAL	= 2,
222
+};
223
+
224
+enum rga_alpha_cal_mode {
225
+	RGA_ALPHA_SATURATION		= 0,
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+	RGA_ALPHA_NO_SATURATION		= 1,
227
+};
228
+
229
+enum rga_factor_mode {
230
+	RGA_ALPHA_ZERO			= 0,
231
+	RGA_ALPHA_ONE			= 1,
232
+	/*
233
+	 *   When used as a factor for the SRC channel, it indicates
234
+	 * the use of the DST channel's alpha value, and vice versa.
235
+	 */
236
+	RGA_ALPHA_OPPOSITE		= 2,
237
+	RGA_ALPHA_OPPOSITE_INVERSE	= 3,
238
+	RGA_ALPHA_OWN			= 4,
239
+};
240
+
241
+enum rga_color_mode {
242
+	RGA_ALPHA_PRE_MULTIPLIED	= 0,
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+	RGA_ALPHA_NO_PRE_MULTIPLIED	= 1,
244
+};
245
+
246
+enum rga_alpha_blend_mode {
247
+	RGA_ALPHA_NONE			= 0,
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+	RGA_ALPHA_BLEND_SRC,
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+	RGA_ALPHA_BLEND_DST,
250
+	RGA_ALPHA_BLEND_SRC_OVER,
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+	RGA_ALPHA_BLEND_DST_OVER,
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+	RGA_ALPHA_BLEND_SRC_IN,
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+	RGA_ALPHA_BLEND_DST_IN,
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+	RGA_ALPHA_BLEND_SRC_OUT,
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+	RGA_ALPHA_BLEND_DST_OUT,
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+	RGA_ALPHA_BLEND_SRC_ATOP,
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+	RGA_ALPHA_BLEND_DST_ATOP,
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+	RGA_ALPHA_BLEND_XOR,
259
+	RGA_ALPHA_BLEND_CLEAR,
204260 };
205261 
206262 #define RGA_SCHED_PRIORITY_DEFAULT 0
....@@ -329,6 +385,16 @@
329385 	struct rga_csc_coe coe_y;
330386 	struct rga_csc_coe coe_u;
331387 	struct rga_csc_coe coe_v;
388
+};
389
+
390
+struct rga_csc_range {
391
+	uint16_t max;
392
+	uint16_t min;
393
+};
394
+
395
+struct rga_csc_clip {
396
+	struct rga_csc_range y;
397
+	struct rga_csc_range uv;
332398 };
333399 
334400 struct rga_mosaic_info {
....@@ -507,6 +573,12 @@
507573 	uint16_t enable;
508574 };
509575 
576
+struct rga_feature {
577
+	uint32_t global_alpha_en:1;
578
+	uint32_t full_csc_clip_en:1;
579
+	uint32_t user_close_fence:1;
580
+};
581
+
510582 struct rga_req {
511583 	/* (enum) process mode sel */
512584 	uint8_t render_mode;
....@@ -563,7 +635,7 @@
563635 	/* porter duff alpha mode sel */
564636 	uint8_t PD_mode;
565637 
566
-	/* global alpha value */
638
+	/* legacy: global alpha value */
567639 	uint8_t alpha_global_value;
568640 
569641 	/* rop2/3/4 code scan from rop code table*/
....@@ -625,7 +697,28 @@
625697 
626698 	struct rga_pre_intr_info pre_intr_info;
627699 
628
-	uint8_t reservr[59];
700
+	/* global alpha */
701
+	uint8_t fg_global_alpha;
702
+	uint8_t bg_global_alpha;
703
+
704
+	struct rga_feature feature;
705
+
706
+	struct rga_csc_clip full_csc_clip;
707
+
708
+	uint8_t reservr[43];
709
+};
710
+
711
+struct rga_alpha_config {
712
+	bool enable;
713
+	bool fg_pre_multiplied;
714
+	bool bg_pre_multiplied;
715
+	bool fg_pixel_alpha_en;
716
+	bool bg_pixel_alpha_en;
717
+	bool fg_global_alpha_en;
718
+	bool bg_global_alpha_en;
719
+	uint16_t fg_global_alpha_value;
720
+	uint16_t bg_global_alpha_value;
721
+	enum rga_alpha_blend_mode mode;
629722 };
630723 
631724 struct rga2_req {
....@@ -672,29 +765,7 @@
672765 	/* ([7] = 1 gradient fill mode sel) */
673766 	u16 alpha_rop_flag;
674767 
675
-	/* [0]	 SrcAlphaMode0		 */
676
-	/* [2:1] SrcGlobalAlphaMode0	*/
677
-	/* [3]	 SrcAlphaSelectMode0	*/
678
-	/* [6:4] SrcFactorMode0		 */
679
-	/* [7]	 SrcColorMode		 */
680
-
681
-	/* [8]	 DstAlphaMode0		 */
682
-	/* [10:9] DstGlobalAlphaMode0	*/
683
-	/* [11]	DstAlphaSelectMode0	*/
684
-	/* [14:12] DstFactorMode0		 */
685
-	/* [15]	DstColorMode0		 */
686
-	u16 alpha_mode_0;
687
-
688
-	/* [0]	 SrcAlphaMode1		 */
689
-	/* [2:1] SrcGlobalAlphaMode1	*/
690
-	/* [3]	 SrcAlphaSelectMode1	*/
691
-	/* [6:4] SrcFactorMode1		 */
692
-
693
-	/* [8]	 DstAlphaMode1		 */
694
-	/* [10:9] DstGlobalAlphaMode1	*/
695
-	/* [11]	DstAlphaSelectMode1	*/
696
-	/* [14:12] DstFactorMode1		 */
697
-	u16 alpha_mode_1;
768
+	struct rga_alpha_config alpha_config;
698769 
699770 	/* 0 1 2 3 */
700771 	u8 scale_bicu_mode;
....@@ -782,8 +853,10 @@
782853 
783854 	u16 alpha_rop_flag;
784855 
785
-	u16 alpha_mode_0;
786
-	u16 alpha_mode_1;
856
+	struct rga_alpha_config alpha_config;
857
+
858
+	/* for abb mode presever alpha. */
859
+	bool abb_alpha_pass;
787860 
788861 	u8 scale_bicu_mode;
789862