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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/drivers/video/fbdev/mmp/hw/mmp_ctrl.c
..
..
@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
1
2
 /*
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3
  * linux/drivers/video/mmp/hw/mmp_ctrl.c
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4
  * Marvell MMP series Display Controller support
..
..
@@ -6,20 +7,6 @@
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7
  * Authors:  Guoqing Li <ligq@marvell.com>
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8
  *          Lisa Du <cldu@marvell.com>
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9
  *          Zhou Zhu <zzhu3@marvell.com>
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License as published by the
12
- * Free Software Foundation; either version 2 of the License, or (at your
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- * option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
18
- * more details.
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- *
20
- * You should have received a copy of the GNU General Public License along with
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- * this program.  If not, see <http://www.gnu.org/licenses/>.
22
- *
23
10
  */
24
11
 #include <linux/module.h>
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12
 #include <linux/moduleparam.h>
..
..
@@ -149,19 +136,26 @@
149
136
 	mutex_lock(&overlay->access_ok);
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137
 
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 	if (overlay_is_vid(overlay)) {
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-		writel_relaxed(win->pitch[0], &regs->v_pitch_yc);
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-		writel_relaxed(win->pitch[2] << 16 |
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-				win->pitch[1], &regs->v_pitch_uv);
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+		writel_relaxed(win->pitch[0],
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+				(void __iomem *)&regs->v_pitch_yc);
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+		writel_relaxed(win->pitch[2] << 16 | win->pitch[1],
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+				(void __iomem *)&regs->v_pitch_uv);
155
143
 
156
-		writel_relaxed((win->ysrc << 16) | win->xsrc, &regs->v_size);
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-		writel_relaxed((win->ydst << 16) | win->xdst, &regs->v_size_z);
158
-		writel_relaxed(win->ypos << 16 | win->xpos, &regs->v_start);
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+		writel_relaxed((win->ysrc << 16) | win->xsrc,
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+				(void __iomem *)&regs->v_size);
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+		writel_relaxed((win->ydst << 16) | win->xdst,
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+				(void __iomem *)&regs->v_size_z);
148
+		writel_relaxed(win->ypos << 16 | win->xpos,
149
+				(void __iomem *)&regs->v_start);
159
150
 	} else {
160
-		writel_relaxed(win->pitch[0], &regs->g_pitch);
151
+		writel_relaxed(win->pitch[0], (void __iomem *)&regs->g_pitch);
161
152
 
162
-		writel_relaxed((win->ysrc << 16) | win->xsrc, &regs->g_size);
163
-		writel_relaxed((win->ydst << 16) | win->xdst, &regs->g_size_z);
164
-		writel_relaxed(win->ypos << 16 | win->xpos, &regs->g_start);
153
+		writel_relaxed((win->ysrc << 16) | win->xsrc,
154
+				(void __iomem *)&regs->g_size);
155
+		writel_relaxed((win->ydst << 16) | win->xdst,
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+				(void __iomem *)&regs->g_size_z);
157
+		writel_relaxed(win->ypos << 16 | win->xpos,
158
+				(void __iomem *)&regs->g_start);
165
159
 	}
166
160
 
167
161
 	dmafetch_set_fmt(overlay);
..
..
@@ -246,11 +240,11 @@
246
240
 	memcpy(&overlay->addr, addr, sizeof(struct mmp_addr));
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241
 
248
242
 	if (overlay_is_vid(overlay)) {
249
-		writel_relaxed(addr->phys[0], &regs->v_y0);
250
-		writel_relaxed(addr->phys[1], &regs->v_u0);
251
-		writel_relaxed(addr->phys[2], &regs->v_v0);
243
+		writel_relaxed(addr->phys[0], (void __iomem *)&regs->v_y0);
244
+		writel_relaxed(addr->phys[1], (void __iomem *)&regs->v_u0);
245
+		writel_relaxed(addr->phys[2], (void __iomem *)&regs->v_v0);
252
246
 	} else
253
-		writel_relaxed(addr->phys[0], &regs->g_0);
247
+		writel_relaxed(addr->phys[0], (void __iomem *)&regs->g_0);
254
248
 
255
249
 	return overlay->addr.phys[0];
256
250
 }
..
..
@@ -281,16 +275,18 @@
281
275
 	tmp |= dsi_rbswap & CFG_INTFRBSWAP_MASK;
282
276
 	writel_relaxed(tmp, ctrl_regs(path) + intf_rbswap_ctrl(path->id));
283
277
 
284
-	writel_relaxed((mode->yres << 16) | mode->xres, &regs->screen_active);
278
+	writel_relaxed((mode->yres << 16) | mode->xres,
279
+		(void __iomem *)&regs->screen_active);
285
280
 	writel_relaxed((mode->left_margin << 16) | mode->right_margin,
286
-		&regs->screen_h_porch);
281
+		(void __iomem *)&regs->screen_h_porch);
287
282
 	writel_relaxed((mode->upper_margin << 16) | mode->lower_margin,
288
-		&regs->screen_v_porch);
283
+		(void __iomem *)&regs->screen_v_porch);
289
284
 	total_x = mode->xres + mode->left_margin + mode->right_margin +
290
285
 		mode->hsync_len;
291
286
 	total_y = mode->yres + mode->upper_margin + mode->lower_margin +
292
287
 		mode->vsync_len;
293
-	writel_relaxed((total_y << 16) | total_x, &regs->screen_size);
288
+	writel_relaxed((total_y << 16) | total_x,
289
+		(void __iomem *)&regs->screen_size);
294
290
 
295
291
 	/* vsync ctrl */
296
292
 	if (path->output_type == PATH_OUT_DSI)
..
..
@@ -298,7 +294,7 @@
298
294
 	else
299
295
 		vsync_ctrl = ((mode->xres + mode->right_margin) << 16)
300
296
 					| (mode->xres + mode->right_margin);
301
-	writel_relaxed(vsync_ctrl, &regs->vsync_ctrl);
297
+	writel_relaxed(vsync_ctrl, (void __iomem *)&regs->vsync_ctrl);
302
298
 
303
299
 	/* set pixclock div */
304
300
 	sclk_src = clk_get_rate(path_to_ctrl(path)->clk);
..
..
@@ -379,9 +375,9 @@
379
375
 	writel_relaxed(dma_ctrl1, ctrl_regs(path) + dma_ctrl(1, path->id));
380
376
 
381
377
 	/* Configure default register values */
382
-	writel_relaxed(0x00000000, &regs->blank_color);
383
-	writel_relaxed(0x00000000, &regs->g_1);
384
-	writel_relaxed(0x00000000, &regs->g_start);
378
+	writel_relaxed(0x00000000, (void __iomem *)&regs->blank_color);
379
+	writel_relaxed(0x00000000, (void __iomem *)&regs->g_1);
380
+	writel_relaxed(0x00000000, (void __iomem *)&regs->g_start);
385
381
 
386
382
 	/*
387
383
 	 * 1.enable multiple burst request in DMA AXI
..
..
@@ -446,7 +442,7 @@
446
442
 {
447
443
 	struct mmp_mach_plat_info *mi;
448
444
 	struct resource *res;
449
-	int ret, i, size, irq;
445
+	int ret, i, irq;
450
446
 	struct mmphw_path_plat *path_plat;
451
447
 	struct mmphw_ctrl *ctrl = NULL;
452
448
 
..
..
@@ -460,7 +456,6 @@
460
456
 
461
457
 	irq = platform_get_irq(pdev, 0);
462
458
 	if (irq < 0) {
463
-		dev_err(&pdev->dev, "%s: no IRQ defined\n", __func__);
464
459
 		ret = -ENOENT;
465
460
 		goto failed;
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461
 	}
..
..
@@ -474,9 +469,9 @@
474
469
 	}
475
470
 
476
471
 	/* allocate */
477
-	size = sizeof(struct mmphw_ctrl) + sizeof(struct mmphw_path_plat) *
478
-	       mi->path_num;
479
-	ctrl = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
472
+	ctrl = devm_kzalloc(&pdev->dev,
473
+			    struct_size(ctrl, path_plats, mi->path_num),
474
+			    GFP_KERNEL);
480
475
 	if (!ctrl) {
481
476
 		ret = -ENOMEM;
482
477
 		goto failed;
..
..
@@ -498,7 +493,7 @@
498
493
 		goto failed;
499
494
 	}
500
495
 
501
-	ctrl->reg_base = devm_ioremap_nocache(ctrl->dev,
496
+	ctrl->reg_base = devm_ioremap(ctrl->dev,
502
497
 			res->start, resource_size(res));
503
498
 	if (ctrl->reg_base == NULL) {
504
499
 		dev_err(ctrl->dev, "%s: res %pR map failed\n", __func__, res);
..
..
@@ -523,7 +518,9 @@
523
518
 		ret = -ENOENT;
524
519
 		goto failed;
525
520
 	}
526
-	clk_prepare_enable(ctrl->clk);
521
+	ret = clk_prepare_enable(ctrl->clk);
522
+	if (ret)
523
+		goto failed;
527
524
 
528
525
 	/* init global regs */
529
526
 	ctrl_set_default(ctrl);