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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/drivers/usb/dwc2/platform.c
..
..
@@ -131,9 +131,9 @@
131
131
 	} else if (hsotg->plat && hsotg->plat->phy_init) {
132
132
 		ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
133
133
 	} else {
134
-		ret = phy_power_on(hsotg->phy);
134
+		ret = phy_init(hsotg->phy);
135
135
 		if (ret == 0)
136
-			ret = phy_init(hsotg->phy);
136
+			ret = phy_power_on(hsotg->phy);
137
137
 	}
138
138
 
139
139
 	return ret;
..
..
@@ -165,9 +165,9 @@
165
165
 	} else if (hsotg->plat && hsotg->plat->phy_exit) {
166
166
 		ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
167
167
 	} else {
168
-		ret = phy_exit(hsotg->phy);
168
+		ret = phy_power_off(hsotg->phy);
169
169
 		if (ret == 0)
170
-			ret = phy_power_off(hsotg->phy);
170
+			ret = phy_exit(hsotg->phy);
171
171
 	}
172
172
 
173
173
 	return ret;
..
..
@@ -191,21 +191,16 @@
191
191
 
192
192
 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
193
193
 {
194
-	int clk, ret;
194
+	int ret;
195
195
 
196
196
 	ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
197
197
 				    hsotg->supplies);
198
198
 	if (ret)
199
199
 		return ret;
200
200
 
201
-	for (clk = 0; clk < DWC2_MAX_CLKS && hsotg->clks[clk]; clk++) {
202
-		ret = clk_prepare_enable(hsotg->clks[clk]);
203
-		if (ret) {
204
-			while (--clk >= 0)
205
-				clk_disable_unprepare(hsotg->clks[clk]);
206
-			return ret;
207
-		}
208
-	}
201
+	ret = clk_bulk_prepare_enable(hsotg->num_clks, hsotg->clks);
202
+	if (ret)
203
+		return ret;
209
204
 
210
205
 	if (!hsotg->ll_phy_enabled)
211
206
 		ret = dwc2_lowlevel_phy_enable(hsotg);
..
..
@@ -231,7 +226,7 @@
231
226
 
232
227
 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
233
228
 {
234
-	int clk, ret = 0;
229
+	int ret = 0;
235
230
 
236
231
 	if (hsotg->ll_phy_enabled)
237
232
 		ret = dwc2_lowlevel_phy_disable(hsotg);
..
..
@@ -239,14 +234,9 @@
239
234
 	if (ret)
240
235
 		return ret;
241
236
 
242
-	for (clk = DWC2_MAX_CLKS - 1; clk >= 0; clk--)
243
-		if (hsotg->clks[clk])
244
-			clk_disable_unprepare(hsotg->clks[clk]);
237
+	clk_bulk_disable_unprepare(hsotg->num_clks, hsotg->clks);
245
238
 
246
-	ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
247
-				     hsotg->supplies);
248
-
249
-	return ret;
239
+	return regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies);
250
240
 }
251
241
 
252
242
 /**
..
..
@@ -265,17 +255,9 @@
265
255
 	return ret;
266
256
 }
267
257
 
268
-/* Only used to reset usb phy at interrupter runtime */
269
-static void dwc2_reset_phy_work(struct work_struct *data)
270
-{
271
-	struct dwc2_hsotg *hsotg = container_of(data, struct dwc2_hsotg,
272
-			phy_rst_work);
273
-	phy_reset(hsotg->phy);
274
-}
275
-
276
258
 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
277
259
 {
278
-	int i, clk, ret;
260
+	int i, ret;
279
261
 
280
262
 	hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
281
263
 	if (IS_ERR(hsotg->reset)) {
..
..
@@ -294,9 +276,6 @@
294
276
 	}
295
277
 
296
278
 	reset_control_deassert(hsotg->reset_ecc);
297
-
298
-	/* Set default UTMI width */
299
-	hsotg->phyif = GUSBCFG_PHYIF16;
300
279
 
301
280
 	/*
302
281
 	 * Attempt to find a generic PHY, then look for an old style
..
..
@@ -317,7 +296,6 @@
317
296
 			return ret;
318
297
 		}
319
298
 	}
320
-	INIT_WORK(&hsotg->phy_rst_work, dwc2_reset_phy_work);
321
299
 
322
300
 	if (!hsotg->phy) {
323
301
 		hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
..
..
@@ -340,28 +318,19 @@
340
318
 
341
319
 	hsotg->plat = dev_get_platdata(hsotg->dev);
342
320
 
343
-	if (hsotg->phy) {
321
+	/* Clock */
322
+	if (hsotg->dev->of_node) {
323
+		ret = devm_clk_bulk_get_all(hsotg->dev, &hsotg->clks);
324
+		if (ret == -EPROBE_DEFER)
325
+			return ret;
344
326
 		/*
345
-		 * If using the generic PHY framework, check if the PHY bus
346
-		 * width is 8-bit and set the phyif appropriately.
327
+		 * Clocks are optional, but new DT platforms should support all
328
+		 * clocks as required by the DT-binding.
347
329
 		 */
348
-		if (phy_get_bus_width(hsotg->phy) == 8)
349
-			hsotg->phyif = GUSBCFG_PHYIF8;
350
-	}
351
-
352
-	for (clk = 0; clk < DWC2_MAX_CLKS; clk++) {
353
-		hsotg->clks[clk] = of_clk_get(hsotg->dev->of_node, clk);
354
-		if (IS_ERR(hsotg->clks[clk])) {
355
-			ret = PTR_ERR(hsotg->clks[clk]);
356
-			if (ret == -EPROBE_DEFER) {
357
-				while (--clk >= 0)
358
-					clk_put(hsotg->clks[clk]);
359
-				return ret;
360
-			}
361
-
362
-			hsotg->clks[clk] = NULL;
363
-			break;
364
-		}
330
+		if (ret < 0)
331
+			hsotg->num_clks = 0;
332
+		else
333
+			hsotg->num_clks = ret;
365
334
 	}
366
335
 
367
336
 	/* Regulators */
..
..
@@ -371,7 +340,9 @@
371
340
 	ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
372
341
 				      hsotg->supplies);
373
342
 	if (ret) {
374
-		dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
343
+		if (ret != -EPROBE_DEFER)
344
+			dev_err(hsotg->dev, "failed to request supplies: %d\n",
345
+				ret);
375
346
 		return ret;
376
347
 	}
377
348
 	return 0;
..
..
@@ -397,6 +368,11 @@
397
368
 		dwc2_hcd_remove(hsotg);
398
369
 	if (hsotg->gadget_enabled)
399
370
 		dwc2_hsotg_remove(hsotg);
371
+
372
+	dwc2_drd_exit(hsotg);
373
+
374
+	if (hsotg->params.activate_stm_id_vb_detection)
375
+		regulator_disable(hsotg->usb33d);
400
376
 
401
377
 	pm_runtime_put_sync(hsotg->dev);
402
378
 	pm_runtime_disable(hsotg->dev);
..
..
@@ -448,6 +424,37 @@
448
424
 }
449
425
 
450
426
 /**
427
+ * Check core version
428
+ *
429
+ * @hsotg: Programming view of the DWC_otg controller
430
+ *
431
+ */
432
+int dwc2_check_core_version(struct dwc2_hsotg *hsotg)
433
+{
434
+	struct dwc2_hw_params *hw = &hsotg->hw_params;
435
+
436
+	/*
437
+	 * Attempt to ensure this device is really a DWC_otg Controller.
438
+	 * Read and verify the GSNPSID register contents. The value should be
439
+	 * 0x45f4xxxx, 0x5531xxxx or 0x5532xxxx
440
+	 */
441
+
442
+	hw->snpsid = dwc2_readl(hsotg, GSNPSID);
443
+	if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID &&
444
+	    (hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID &&
445
+	    (hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) {
446
+		dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n",
447
+			hw->snpsid);
448
+		return -ENODEV;
449
+	}
450
+
451
+	dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n",
452
+		hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf,
453
+		hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid);
454
+	return 0;
455
+}
456
+
457
+/**
451
458
  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
452
459
  * driver
453
460
  *
..
..
@@ -482,8 +489,7 @@
482
489
 		return retval;
483
490
 	}
484
491
 
485
-	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
486
-	hsotg->regs = devm_ioremap_resource(&dev->dev, res);
492
+	hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res);
487
493
 	if (IS_ERR(hsotg->regs))
488
494
 		return PTR_ERR(hsotg->regs);
489
495
 
..
..
@@ -497,10 +503,8 @@
497
503
 	spin_lock_init(&hsotg->lock);
498
504
 
499
505
 	hsotg->irq = platform_get_irq(dev, 0);
500
-	if (hsotg->irq < 0) {
501
-		dev_err(&dev->dev, "missing IRQ resource\n");
506
+	if (hsotg->irq < 0)
502
507
 		return hsotg->irq;
503
-	}
504
508
 
505
509
 	dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
506
510
 		hsotg->irq);
..
..
@@ -509,6 +513,14 @@
509
513
 				  dev_name(hsotg->dev), hsotg);
510
514
 	if (retval)
511
515
 		return retval;
516
+
517
+	hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
518
+	if (IS_ERR(hsotg->vbus_supply)) {
519
+		retval = PTR_ERR(hsotg->vbus_supply);
520
+		hsotg->vbus_supply = NULL;
521
+		if (retval != -ENODEV)
522
+			return retval;
523
+	}
512
524
 
513
525
 	retval = dwc2_lowlevel_hw_enable(hsotg);
514
526
 	if (retval)
..
..
@@ -522,6 +534,18 @@
522
534
 		goto error;
523
535
 
524
536
 	retval = dwc2_get_dr_mode(hsotg);
537
+	if (retval)
538
+		goto error;
539
+
540
+	hsotg->need_phy_for_wake =
541
+		of_property_read_bool(dev->dev.of_node,
542
+				      "snps,need-phy-for-wake");
543
+
544
+	/*
545
+	 * Before performing any core related operations
546
+	 * check core version.
547
+	 */
548
+	retval = dwc2_check_core_version(hsotg);
525
549
 	if (retval)
526
550
 		goto error;
527
551
 
..
..
@@ -549,11 +573,63 @@
549
573
 	if (retval)
550
574
 		goto error;
551
575
 
576
+	if (hsotg->params.activate_stm_id_vb_detection) {
577
+		u32 ggpio;
578
+
579
+		hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d");
580
+		if (IS_ERR(hsotg->usb33d)) {
581
+			retval = PTR_ERR(hsotg->usb33d);
582
+			if (retval != -EPROBE_DEFER)
583
+				dev_err(hsotg->dev,
584
+					"failed to request usb33d supply: %d\n",
585
+					retval);
586
+			goto error;
587
+		}
588
+		retval = regulator_enable(hsotg->usb33d);
589
+		if (retval) {
590
+			dev_err(hsotg->dev,
591
+				"failed to enable usb33d supply: %d\n", retval);
592
+			goto error;
593
+		}
594
+
595
+		ggpio = dwc2_readl(hsotg, GGPIO);
596
+		ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
597
+		ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
598
+		dwc2_writel(hsotg, ggpio, GGPIO);
599
+
600
+		/* ID/VBUS detection startup time */
601
+		usleep_range(5000, 7000);
602
+	}
603
+
604
+	retval = dwc2_drd_init(hsotg);
605
+	if (retval) {
606
+		if (retval != -EPROBE_DEFER)
607
+			dev_err(hsotg->dev, "failed to initialize dual-role\n");
608
+		goto error_init;
609
+	}
610
+
552
611
 	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
553
612
 		retval = dwc2_gadget_init(hsotg);
554
613
 		if (retval)
555
-			goto error;
614
+			goto error_drd;
556
615
 		hsotg->gadget_enabled = 1;
616
+	}
617
+
618
+	/*
619
+	 * If we need PHY for wakeup we must be wakeup capable.
620
+	 * When we have a device that can wake without the PHY we
621
+	 * can adjust this condition.
622
+	 */
623
+	if (hsotg->need_phy_for_wake)
624
+		device_set_wakeup_capable(&dev->dev, true);
625
+
626
+	hsotg->reset_phy_on_wake =
627
+		of_property_read_bool(dev->dev.of_node,
628
+				      "snps,reset-phy-on-wake");
629
+	if (hsotg->reset_phy_on_wake && !hsotg->phy) {
630
+		dev_warn(hsotg->dev,
631
+			 "Quirk reset-phy-on-wake only supports generic PHYs\n");
632
+		hsotg->reset_phy_on_wake = false;
557
633
 	}
558
634
 
559
635
 	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
..
..
@@ -561,7 +637,7 @@
561
637
 		if (retval) {
562
638
 			if (hsotg->gadget_enabled)
563
639
 				dwc2_hsotg_remove(hsotg);
564
-			goto error;
640
+			goto error_drd;
565
641
 		}
566
642
 		hsotg->hcd_enabled = 1;
567
643
 	}
..
..
@@ -588,16 +664,29 @@
588
664
 		if (retval) {
589
665
 			hsotg->gadget.udc = NULL;
590
666
 			dwc2_hsotg_remove(hsotg);
591
-			goto error;
667
+			goto error_debugfs;
592
668
 		}
593
669
 	}
594
670
 #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
595
671
 	return 0;
596
672
 
673
+#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
674
+	IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
675
+error_debugfs:
676
+	dwc2_debugfs_exit(hsotg);
677
+	if (hsotg->hcd_enabled)
678
+		dwc2_hcd_remove(hsotg);
679
+#endif
680
+error_drd:
681
+	dwc2_drd_exit(hsotg);
682
+
683
+error_init:
684
+	if (hsotg->params.activate_stm_id_vb_detection)
685
+		regulator_disable(hsotg->usb33d);
597
686
 error:
598
687
 	pm_runtime_put_sync(hsotg->dev);
599
688
 	pm_runtime_disable(hsotg->dev);
600
-	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL)
689
+	if (hsotg->ll_hw_enabled)
601
690
 		dwc2_lowlevel_hw_disable(hsotg);
602
691
 	return retval;
603
692
 }
..
..
@@ -605,13 +694,50 @@
605
694
 static int __maybe_unused dwc2_suspend(struct device *dev)
606
695
 {
607
696
 	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
697
+	bool is_device_mode = dwc2_is_device_mode(dwc2);
608
698
 	int ret = 0;
609
699
 
610
-	if (dwc2_is_device_mode(dwc2))
700
+	if (is_device_mode)
611
701
 		dwc2_hsotg_suspend(dwc2);
612
702
 
613
-	if (dwc2->ll_hw_enabled)
703
+	dwc2_drd_suspend(dwc2);
704
+
705
+	if (dwc2->params.activate_stm_id_vb_detection) {
706
+		unsigned long flags;
707
+		u32 ggpio, gotgctl;
708
+
709
+		/*
710
+		 * Need to force the mode to the current mode to avoid Mode
711
+		 * Mismatch Interrupt when ID detection will be disabled.
712
+		 */
713
+		dwc2_force_mode(dwc2, !is_device_mode);
714
+
715
+		spin_lock_irqsave(&dwc2->lock, flags);
716
+		gotgctl = dwc2_readl(dwc2, GOTGCTL);
717
+		/* bypass debounce filter, enable overrides */
718
+		gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
719
+		gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN;
720
+		/* Force A / B session if needed */
721
+		if (gotgctl & GOTGCTL_ASESVLD)
722
+			gotgctl |= GOTGCTL_AVALOVAL;
723
+		if (gotgctl & GOTGCTL_BSESVLD)
724
+			gotgctl |= GOTGCTL_BVALOVAL;
725
+		dwc2_writel(dwc2, gotgctl, GOTGCTL);
726
+		spin_unlock_irqrestore(&dwc2->lock, flags);
727
+
728
+		ggpio = dwc2_readl(dwc2, GGPIO);
729
+		ggpio &= ~GGPIO_STM32_OTG_GCCFG_IDEN;
730
+		ggpio &= ~GGPIO_STM32_OTG_GCCFG_VBDEN;
731
+		dwc2_writel(dwc2, ggpio, GGPIO);
732
+
733
+		regulator_disable(dwc2->usb33d);
734
+	}
735
+
736
+	if (dwc2->ll_hw_enabled &&
737
+	    (is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) {
614
738
 		ret = __dwc2_lowlevel_hw_disable(dwc2);
739
+		dwc2->phy_off_for_suspend = true;
740
+	}
615
741
 
616
742
 	return ret;
617
743
 }
..
..
@@ -622,11 +748,42 @@
622
748
 	unsigned long flags;
623
749
 	int ret = 0;
624
750
 
625
-	if (dwc2->ll_hw_enabled) {
751
+	if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) {
626
752
 		ret = __dwc2_lowlevel_hw_enable(dwc2);
627
753
 		if (ret)
628
754
 			return ret;
629
755
 	}
756
+	dwc2->phy_off_for_suspend = false;
757
+
758
+	if (dwc2->params.activate_stm_id_vb_detection) {
759
+		unsigned long flags;
760
+		u32 ggpio, gotgctl;
761
+
762
+		ret = regulator_enable(dwc2->usb33d);
763
+		if (ret)
764
+			return ret;
765
+
766
+		ggpio = dwc2_readl(dwc2, GGPIO);
767
+		ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
768
+		ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
769
+		dwc2_writel(dwc2, ggpio, GGPIO);
770
+
771
+		/* ID/VBUS detection startup time */
772
+		usleep_range(5000, 7000);
773
+
774
+		spin_lock_irqsave(&dwc2->lock, flags);
775
+		gotgctl = dwc2_readl(dwc2, GOTGCTL);
776
+		gotgctl &= ~GOTGCTL_DBNCE_FLTR_BYPASS;
777
+		gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN |
778
+			     GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL);
779
+		dwc2_writel(dwc2, gotgctl, GOTGCTL);
780
+		spin_unlock_irqrestore(&dwc2->lock, flags);
781
+	}
782
+
783
+	/* Need to restore FORCEDEVMODE/FORCEHOSTMODE */
784
+	dwc2_force_dr_mode(dwc2);
785
+
786
+	dwc2_drd_resume(dwc2);
630
787
 
631
788
 	if (dwc2->dr_mode == USB_DR_MODE_HOST && dwc2_is_device_mode(dwc2)) {
632
789
 		/* Reinit for Host mode if lost power */