| .. | .. |
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| 6 | 6 | * Author: Tony Xie <tony.xie@rock-chips.com> |
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| 7 | 7 | */ |
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| 8 | 8 | |
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| 9 | +#include <asm/cputype.h> |
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| 9 | 10 | #include <linux/clk.h> |
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| 10 | 11 | #include <linux/module.h> |
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| 11 | 12 | #include <linux/of.h> |
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| .. | .. |
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| 13 | 14 | #include <linux/pm_domain.h> |
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| 14 | 15 | #include <linux/pm_runtime.h> |
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| 15 | 16 | #include <linux/rockchip/rockchip_sip.h> |
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| 17 | +#include <soc/rockchip/rockchip_amp.h> |
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| 18 | +#include <linux/irqchip/arm-gic-common.h> |
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| 16 | 19 | |
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| 17 | 20 | #define RK_CPU_STATUS_OFF 0 |
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| 18 | 21 | #define RK_CPU_STATUS_ON 1 |
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| 19 | 22 | #define RK_CPU_STATUS_BUSY -1 |
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| 23 | +#define AMP_AFF_MAX_CLUSTER 4 |
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| 24 | +#define AMP_AFF_MAX_CPU 8 |
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| 25 | +#define GPIO_BANK_NUM 16 |
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| 26 | +#define GPIO_GROUP_PRIO_MAX 3 |
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| 27 | + |
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| 28 | +#define MAX_GIC_SPI_NUM (1020) |
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| 29 | +#define AMP_GIC_DBG(fmt, arg...) do { if (0) { pr_warn(fmt, ##arg); } } while (0) |
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| 20 | 30 | |
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| 21 | 31 | enum amp_cpu_ctrl_status { |
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| 22 | 32 | AMP_CPU_STATUS_AMP_DIS = 0, |
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| .. | .. |
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| 43 | 53 | u64 entry; |
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| 44 | 54 | u64 cpu_id; |
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| 45 | 55 | } cpu_boot_info[CONFIG_NR_CPUS]; |
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| 56 | + |
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| 57 | +struct amp_gpio_group_s { |
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| 58 | + u32 bank_id; |
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| 59 | + u32 prio; |
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| 60 | + u64 irq_aff[AMP_AFF_MAX_CPU]; |
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| 61 | + u32 irq_id[AMP_AFF_MAX_CPU]; |
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| 62 | + u32 en[AMP_AFF_MAX_CPU]; |
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| 63 | +}; |
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| 64 | + |
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| 65 | +struct amp_irq_cfg_s { |
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| 66 | + u64 aff; |
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| 67 | + u32 prio; |
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| 68 | + u32 cpumask; |
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| 69 | + int amp_flag; |
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| 70 | +} irqs_cfg[MAX_GIC_SPI_NUM]; |
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| 71 | + |
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| 72 | +static struct amp_gic_ctrl_s { |
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| 73 | + enum gic_type gic_version; |
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| 74 | + u32 spis_num; |
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| 75 | + struct { |
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| 76 | + u32 aff; |
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| 77 | + u32 cpumask; |
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| 78 | + u32 flag; |
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| 79 | + } aff_to_cpumask[AMP_AFF_MAX_CLUSTER][AMP_AFF_MAX_CPU]; |
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| 80 | + struct amp_irq_cfg_s irqs_cfg[MAX_GIC_SPI_NUM]; |
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| 81 | + struct amp_gpio_group_s gpio_grp[GPIO_BANK_NUM][GPIO_GROUP_PRIO_MAX]; |
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| 82 | + u32 gpio_banks; |
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| 83 | +} amp_ctrl; |
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| 46 | 84 | |
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| 47 | 85 | static int get_cpu_boot_info_idx(unsigned long cpu_id) |
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| 48 | 86 | { |
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| .. | .. |
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| 77 | 115 | static void cpu_status_print(unsigned long cpu_id, struct arm_smccc_res *res) |
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| 78 | 116 | { |
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| 79 | 117 | if (res->a0) { |
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| 80 | | - pr_info("get cpu-0x%lx status(%lx) error!\n", cpu_id, res->a0); |
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| 118 | + pr_info("failed to get cpu[%lx] status, ret=%lx!\n", cpu_id, res->a0); |
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| 81 | 119 | return; |
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| 82 | 120 | } |
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| 83 | 121 | |
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| 84 | 122 | if (res->a1 == AMP_CPU_STATUS_AMP_DIS) |
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| 85 | | - pr_info("cpu-0x%lx amp is disable (%ld)\n", cpu_id, res->a1); |
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| 123 | + pr_info("cpu[%lx] amp is disabled (%ld)\n", cpu_id, res->a1); |
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| 86 | 124 | else if (res->a1 == AMP_CPU_STATUS_EN) |
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| 87 | | - pr_info("cpu-0x%lx amp is enable (%ld)\n", cpu_id, res->a1); |
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| 125 | + pr_info("cpu[%lx] amp is enabled (%ld)\n", cpu_id, res->a1); |
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| 88 | 126 | else if (res->a1 == AMP_CPU_STATUS_ON) |
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| 89 | | - pr_info("cpu-0x%lx amp: cpu is on (%ld)\n", cpu_id, res->a1); |
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| 127 | + pr_info("cpu[%lx] amp: cpu is on (%ld)\n", cpu_id, res->a1); |
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| 90 | 128 | else if (res->a1 == AMP_CPU_STATUS_OFF) |
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| 91 | | - pr_info("cpu-0x%lx amp: cpu is off(%ld)\n", cpu_id, res->a1); |
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| 129 | + pr_info("cpu[%lx] amp: cpu is off(%ld)\n", cpu_id, res->a1); |
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| 92 | 130 | else |
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| 93 | | - pr_info("cpu-0x%lx status(%ld) is error\n", cpu_id, res->a1); |
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| 131 | + pr_info("cpu[%lx] amp status(%ld) is error\n", cpu_id, res->a1); |
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| 94 | 132 | |
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| 95 | 133 | if (res->a2 == RK_CPU_STATUS_OFF) |
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| 96 | | - pr_info("cpu-0x%lx status(%ld) is off\n", cpu_id, res->a2); |
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| 134 | + pr_info("cpu[%lx] status(%ld) is off\n", cpu_id, res->a2); |
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| 97 | 135 | else if (res->a2 == RK_CPU_STATUS_ON) |
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| 98 | | - pr_info("cpu-0x%lx status(%ld) is on\n", cpu_id, res->a2); |
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| 136 | + pr_info("cpu[%lx] status(%ld) is on\n", cpu_id, res->a2); |
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| 99 | 137 | else if (res->a2 == RK_CPU_STATUS_BUSY) |
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| 100 | | - pr_info("cpu-0x%lx status(%ld) is busy\n", cpu_id, res->a2); |
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| 138 | + pr_info("cpu[%lx] status(%ld) is busy\n", cpu_id, res->a2); |
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| 101 | 139 | else |
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| 102 | | - pr_info("cpu-0x%lx status(%ld) is error\n", cpu_id, res->a2); |
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| 140 | + pr_info("cpu[%lx] status(%ld) is error\n", cpu_id, res->a2); |
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| 103 | 141 | } |
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| 104 | 142 | |
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| 105 | 143 | static ssize_t boot_cpu_store(struct device *dev, |
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| .. | .. |
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| 107 | 145 | const char *buf, |
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| 108 | 146 | size_t count) |
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| 109 | 147 | { |
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| 110 | | - char cmd[10]; |
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| 111 | | - unsigned long cpu_id; |
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| 112 | 148 | struct arm_smccc_res res = {0}; |
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| 149 | + unsigned long cpu_id; |
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| 150 | + char cmd[10]; |
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| 113 | 151 | int ret, idx; |
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| 114 | 152 | |
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| 115 | 153 | ret = sscanf(buf, "%s", cmd); |
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| .. | .. |
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| 120 | 158 | |
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| 121 | 159 | if (!strncmp(cmd, "status", strlen("status"))) { |
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| 122 | 160 | ret = sscanf(buf, "%s %lx", cmd, &cpu_id); |
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| 123 | | - |
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| 124 | 161 | if (ret != 2) |
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| 125 | 162 | return -EINVAL; |
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| 126 | 163 | |
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| 127 | | - res = sip_smc_get_amp_info(RK_AMP_SUB_FUNC_GET_CPU_STATUS, |
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| 128 | | - cpu_id); |
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| 164 | + res = sip_smc_get_amp_info(RK_AMP_SUB_FUNC_GET_CPU_STATUS, cpu_id); |
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| 129 | 165 | cpu_status_print(cpu_id, &res); |
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| 130 | 166 | } else if (!strncmp(cmd, "off", strlen("off"))) { |
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| 131 | 167 | ret = sscanf(buf, "%s %lx", cmd, &cpu_id); |
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| .. | .. |
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| 133 | 169 | return -EINVAL; |
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| 134 | 170 | |
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| 135 | 171 | idx = get_cpu_boot_info_idx(cpu_id); |
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| 136 | | - |
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| 137 | 172 | if (idx >= 0 && cpu_boot_info[idx].en) { |
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| 138 | 173 | ret = sip_smc_amp_config(RK_AMP_SUB_FUNC_REQ_CPU_OFF, |
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| 139 | 174 | cpu_id, 0, 0); |
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| 140 | 175 | if (ret) |
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| 141 | | - pr_info("requesting a cpu off is error(%d)!\n", |
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| 142 | | - ret); |
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| 176 | + dev_warn(dev, "failed to request cpu[%lx] off, ret=%d!\n", cpu_id, ret); |
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| 143 | 177 | } |
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| 144 | 178 | } else if (!strncmp(cmd, "on", strlen("on"))) { |
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| 145 | 179 | ret = sscanf(buf, "%s %lx", cmd, &cpu_id); |
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| 146 | | - |
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| 147 | 180 | if (ret != 2) |
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| 148 | 181 | return -EINVAL; |
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| 149 | 182 | |
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| .. | .. |
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| 154 | 187 | cpu_boot_info[idx].entry, |
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| 155 | 188 | 0); |
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| 156 | 189 | if (ret) |
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| 157 | | - pr_info("booting up a cpu is error(%d)!\n", |
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| 158 | | - ret); |
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| 190 | + dev_warn(dev, "Brought up cpu[%lx] failed, ret=%d\n", cpu_id, ret); |
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| 191 | + else |
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| 192 | + pr_info("Brought up cpu[%lx] ok.\n", cpu_id); |
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| 193 | + } else { |
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| 194 | + dev_warn(dev, "cpu[%lx] is unavailable\n", cpu_id); |
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| 159 | 195 | } |
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| 160 | 196 | } else { |
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| 161 | | - pr_info("unsupported cmd(%s)\n", cmd); |
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| 197 | + dev_warn(dev, "unsupported cmd(%s)\n", cmd); |
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| 162 | 198 | } |
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| 163 | 199 | |
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| 164 | 200 | return count; |
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| .. | .. |
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| 173 | 209 | struct device_node *cpu_node, int idx) |
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| 174 | 210 | { |
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| 175 | 211 | u64 cpu_entry, cpu_id; |
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| 176 | | - u32 cpu_mode; |
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| 212 | + u32 cpu_mode, boot_on; |
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| 177 | 213 | int ret; |
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| 178 | 214 | |
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| 179 | 215 | if (idx >= CONFIG_NR_CPUS) |
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| 180 | 216 | return -1; |
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| 181 | 217 | |
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| 218 | + if (of_property_read_u64_array(cpu_node, "id", &cpu_id, 1)) { |
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| 219 | + dev_warn(dev, "failed to get 'id'\n"); |
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| 220 | + return -1; |
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| 221 | + } |
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| 222 | + |
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| 182 | 223 | if (of_property_read_u64_array(cpu_node, "entry", &cpu_entry, 1)) { |
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| 183 | | - dev_warn(dev, "can not get the entry\n"); |
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| 224 | + dev_warn(dev, "failed to get cpu[%llx] 'entry'\n", cpu_id); |
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| 184 | 225 | return -1; |
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| 185 | 226 | } |
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| 186 | 227 | |
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| 187 | 228 | if (!cpu_entry) { |
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| 188 | | - dev_warn(dev, "cpu-entry is 0\n"); |
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| 189 | | - return -1; |
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| 190 | | - } |
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| 191 | | - |
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| 192 | | - if (of_property_read_u64_array(cpu_node, "id", &cpu_id, 1)) { |
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| 193 | | - dev_warn(dev, "can not get the cpu id\n"); |
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| 229 | + dev_warn(dev, "invalid cpu[%llx] 'entry': 0\n", cpu_id); |
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| 194 | 230 | return -1; |
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| 195 | 231 | } |
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| 196 | 232 | |
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| 197 | 233 | if (of_property_read_u32_array(cpu_node, "mode", &cpu_mode, 1)) { |
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| 198 | | - dev_warn(dev, "can not get the cpu mode\n"); |
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| 234 | + dev_warn(dev, "failed to get cpu[%llx] 'mode'\n", cpu_id); |
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| 199 | 235 | return -1; |
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| 200 | 236 | } |
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| 237 | + |
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| 238 | + if (of_property_read_u32_array(cpu_node, "boot-on", &boot_on, 1)) |
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| 239 | + boot_on = 1; /* compatible old action */ |
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| 201 | 240 | |
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| 202 | 241 | cpu_boot_info[idx].entry = cpu_entry; |
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| 203 | 242 | cpu_boot_info[idx].mode = cpu_mode; |
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| .. | .. |
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| 205 | 244 | |
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| 206 | 245 | ret = sip_smc_amp_config(RK_AMP_SUB_FUNC_CFG_MODE, cpu_id, cpu_mode, 0); |
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| 207 | 246 | if (ret) { |
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| 208 | | - dev_warn(dev, "setting cpu mode is error(%d)!\n", ret); |
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| 247 | + dev_warn(dev, "failed to set cpu mode, ret=%d\n", ret); |
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| 209 | 248 | return ret; |
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| 210 | 249 | } |
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| 211 | 250 | |
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| 212 | | - ret = sip_smc_amp_config(RK_AMP_SUB_FUNC_CPU_ON, cpu_id, cpu_entry, 0); |
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| 213 | | - if (ret) { |
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| 214 | | - dev_warn(dev, "booting up a cpu is error(%d)!\n", ret); |
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| 215 | | - return ret; |
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| 251 | + if (boot_on) { |
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| 252 | + ret = sip_smc_amp_config(RK_AMP_SUB_FUNC_CPU_ON, cpu_id, cpu_entry, 0); |
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| 253 | + if (ret) { |
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| 254 | + dev_warn(dev, "Brought up cpu[%llx] failed, ret=%d\n", cpu_id, ret); |
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| 255 | + return ret; |
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| 256 | + } else { |
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| 257 | + pr_info("Brought up cpu[%llx] ok.\n", cpu_id); |
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| 258 | + } |
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| 216 | 259 | } |
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| 217 | 260 | |
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| 218 | 261 | cpu_boot_info[idx].en = 1; |
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| .. | .. |
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| 220 | 263 | return 0; |
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| 221 | 264 | } |
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| 222 | 265 | |
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| 266 | +int rockchip_amp_check_amp_irq(u32 irq) |
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| 267 | +{ |
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| 268 | + return amp_ctrl.irqs_cfg[irq].amp_flag; |
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| 269 | +} |
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| 270 | + |
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| 271 | +u32 rockchip_amp_get_irq_prio(u32 irq) |
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| 272 | +{ |
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| 273 | + return amp_ctrl.irqs_cfg[irq].prio; |
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| 274 | +} |
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| 275 | + |
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| 276 | +u32 rockchip_amp_get_irq_cpumask(u32 irq) |
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| 277 | +{ |
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| 278 | + return amp_ctrl.irqs_cfg[irq].cpumask; |
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| 279 | +} |
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| 280 | + |
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| 281 | +int rockchip_amp_need_init_amp_irq(u32 irq) |
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| 282 | +{ |
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| 283 | + return amp_ctrl.irqs_cfg[irq].amp_flag; |
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| 284 | +} |
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| 285 | + |
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| 286 | +static u32 amp_get_cpumask_bit(u64 aff) |
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| 287 | +{ |
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| 288 | + u32 aff_cluster, aff_cpu; |
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| 289 | + |
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| 290 | + aff_cluster = MPIDR_AFFINITY_LEVEL(aff, 1); |
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| 291 | + aff_cpu = MPIDR_AFFINITY_LEVEL(aff, 0); |
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| 292 | + |
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| 293 | + if (aff_cpu >= AMP_AFF_MAX_CPU || aff_cluster >= AMP_AFF_MAX_CLUSTER) |
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| 294 | + return 0; |
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| 295 | + |
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| 296 | + AMP_GIC_DBG(" %s: aff:%d-%d: %x\n", __func__, aff_cluster, aff_cpu, |
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| 297 | + amp_ctrl.aff_to_cpumask[aff_cluster][aff_cpu].cpumask); |
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| 298 | + |
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| 299 | + return amp_ctrl.aff_to_cpumask[aff_cluster][aff_cpu].cpumask; |
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| 300 | +} |
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| 301 | + |
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| 302 | +u64 rockchip_amp_get_irq_aff(u32 irq) |
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| 303 | +{ |
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| 304 | + return amp_ctrl.irqs_cfg[irq].aff; |
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| 305 | +} |
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| 306 | + |
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| 307 | +static int gic_amp_get_gpio_prio_group_info(struct device_node *np, |
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| 308 | + struct amp_gic_ctrl_s *amp_ctrl, |
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| 309 | + int prio_id) |
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| 310 | +{ |
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| 311 | + u32 gpio_bank, prio, irq_id; |
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| 312 | + u64 irq_aff; |
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| 313 | + int i, count0, count1; |
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| 314 | + struct amp_gpio_group_s *gpio_grp; |
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| 315 | + struct amp_irq_cfg_s *irqs_cfg; |
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| 316 | + |
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| 317 | + if (prio_id >= GPIO_GROUP_PRIO_MAX) |
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| 318 | + return -EINVAL; |
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| 319 | + |
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| 320 | + if (of_property_read_u32_array(np, "gpio-bank", &gpio_bank, 1)) |
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| 321 | + return -EINVAL; |
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| 322 | + if (gpio_bank >= amp_ctrl->gpio_banks) |
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| 323 | + return -EINVAL; |
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| 324 | + |
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| 325 | + gpio_grp = &_ctrl->gpio_grp[gpio_bank][prio_id]; |
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| 326 | + |
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| 327 | + if (of_property_read_u32_array(np, "prio", &prio, 1)) |
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| 328 | + return -EINVAL; |
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| 329 | + |
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| 330 | + if (gpio_bank >= GPIO_BANK_NUM) |
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| 331 | + return -EINVAL; |
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| 332 | + |
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| 333 | + AMP_GIC_DBG("%s: gpio-%d, group prio:%d-%x\n", |
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| 334 | + __func__, gpio_bank, prio_id, prio); |
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| 335 | + |
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| 336 | + count0 = of_property_count_u32_elems(np, "girq-id"); |
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| 337 | + count1 = of_property_count_u64_elems(np, "girq-aff"); |
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| 338 | + |
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| 339 | + if (count0 != count1) |
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| 340 | + return -EINVAL; |
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| 341 | + |
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| 342 | + gpio_grp->prio = prio; |
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| 343 | + |
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| 344 | + for (i = 0; i < count0; i++) { |
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| 345 | + of_property_read_u32_index(np, "girq-id", i, &irq_id); |
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| 346 | + gpio_grp->irq_id[i] = irq_id; |
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| 347 | + of_property_read_u64_index(np, "girq-aff", i, &irq_aff); |
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| 348 | + |
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| 349 | + gpio_grp->irq_aff[i] = irq_aff; |
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| 350 | + |
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| 351 | + of_property_read_u32_index(np, "girq-en", i, &gpio_grp->en[i]); |
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| 352 | + |
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| 353 | + irqs_cfg = &_ctrl->irqs_cfg[irq_id]; |
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| 354 | + |
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| 355 | + AMP_GIC_DBG(" %s: group cpu-%d, irq-%d: prio-%x, aff-%llx en-%d\n", |
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| 356 | + __func__, i, gpio_grp->irq_id[i], gpio_grp->prio, |
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| 357 | + gpio_grp->irq_aff[i], gpio_grp->en[i]); |
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| 358 | + |
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| 359 | + if (gpio_grp->en[i]) { |
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| 360 | + irqs_cfg->prio = gpio_grp->prio; |
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| 361 | + irqs_cfg->aff = irq_aff; |
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| 362 | + if (amp_ctrl->gic_version == GIC_V2) { |
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| 363 | + irqs_cfg->cpumask = amp_get_cpumask_bit(irq_aff); |
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| 364 | + if (!irqs_cfg->cpumask) { |
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| 365 | + pr_err(" %s: get cpumask error\n", __func__); |
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| 366 | + return -EINVAL; |
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| 367 | + } |
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| 368 | + } |
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| 369 | + irqs_cfg->amp_flag = 1; |
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| 370 | + } |
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| 371 | + |
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| 372 | + AMP_GIC_DBG(" %s: prio-%x aff-%llx cpumaks-%x flag-%d\n", |
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| 373 | + __func__, irqs_cfg->prio, irqs_cfg->aff, |
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| 374 | + irqs_cfg->cpumask, irqs_cfg->amp_flag); |
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| 375 | + } |
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| 376 | + |
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| 377 | + return 0; |
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| 378 | +} |
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| 379 | + |
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| 380 | +static int gic_amp_gpio_group_get_info(struct device_node *group_node, |
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| 381 | + struct amp_gic_ctrl_s *amp_ctrl, |
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| 382 | + int idx) |
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| 383 | +{ |
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| 384 | + int i = 0; |
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| 385 | + struct device_node *node; |
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| 386 | + |
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| 387 | + if (group_node) { |
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| 388 | + for_each_available_child_of_node(group_node, node) { |
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| 389 | + if (i >= GPIO_GROUP_PRIO_MAX) |
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| 390 | + break; |
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| 391 | + if (!gic_amp_get_gpio_prio_group_info(node, amp_ctrl, |
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| 392 | + i)) { |
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| 393 | + i++; |
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| 394 | + } |
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| 395 | + } |
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| 396 | + } |
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| 397 | + return 0; |
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| 398 | +} |
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| 399 | + |
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| 400 | +static void gic_of_get_gpio_group(struct device_node *np, |
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| 401 | + struct amp_gic_ctrl_s *amp_ctrl) |
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| 402 | +{ |
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| 403 | + struct device_node *gpio_group_node, *node; |
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| 404 | + int i = 0; |
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| 405 | + |
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| 406 | + if (of_property_read_u32_array(np, "gpio-group-banks", |
|---|
| 407 | + &_ctrl->gpio_banks, 1)) |
|---|
| 408 | + return; |
|---|
| 409 | + |
|---|
| 410 | + gpio_group_node = of_get_child_by_name(np, "gpio-group"); |
|---|
| 411 | + if (gpio_group_node) { |
|---|
| 412 | + for_each_available_child_of_node(gpio_group_node, node) { |
|---|
| 413 | + if (i >= amp_ctrl->gpio_banks) |
|---|
| 414 | + break; |
|---|
| 415 | + if (!gic_amp_gpio_group_get_info(node, amp_ctrl, i)) |
|---|
| 416 | + i++; |
|---|
| 417 | + } |
|---|
| 418 | + } |
|---|
| 419 | + |
|---|
| 420 | + of_node_put(gpio_group_node); |
|---|
| 421 | +} |
|---|
| 422 | + |
|---|
| 423 | +static int amp_gic_get_cpumask(struct device_node *np, struct amp_gic_ctrl_s *amp_ctrl) |
|---|
| 424 | +{ |
|---|
| 425 | + const struct property *prop; |
|---|
| 426 | + int count, i; |
|---|
| 427 | + u32 cluster, aff_cpu; |
|---|
| 428 | + u64 aff, cpumask; |
|---|
| 429 | + |
|---|
| 430 | + if (amp_ctrl->gic_version != GIC_V2) |
|---|
| 431 | + return 0; |
|---|
| 432 | + prop = of_find_property(np, "amp-cpu-aff-maskbits", NULL); |
|---|
| 433 | + |
|---|
| 434 | + if (!prop) |
|---|
| 435 | + return -1; |
|---|
| 436 | + |
|---|
| 437 | + if (!prop->value) |
|---|
| 438 | + return -1; |
|---|
| 439 | + |
|---|
| 440 | + count = of_property_count_u64_elems(np, "amp-cpu-aff-maskbits"); |
|---|
| 441 | + if (count % 2) |
|---|
| 442 | + return -1; |
|---|
| 443 | + |
|---|
| 444 | + for (i = 0; i < count / 2; i++) { |
|---|
| 445 | + of_property_read_u64_index(np, "amp-cpu-aff-maskbits", |
|---|
| 446 | + 2 * i, &aff); |
|---|
| 447 | + cluster = MPIDR_AFFINITY_LEVEL(aff, 1); |
|---|
| 448 | + aff_cpu = MPIDR_AFFINITY_LEVEL(aff, 0); |
|---|
| 449 | + amp_ctrl->aff_to_cpumask[cluster][aff_cpu].aff = aff; |
|---|
| 450 | + |
|---|
| 451 | + of_property_read_u64_index(np, "amp-cpu-aff-maskbits", |
|---|
| 452 | + 2 * i + 1, &cpumask); |
|---|
| 453 | + |
|---|
| 454 | + amp_ctrl->aff_to_cpumask[cluster][aff_cpu].cpumask = (u32)cpumask; |
|---|
| 455 | + |
|---|
| 456 | + AMP_GIC_DBG("cpumask: %d-%d: aff-%llx cpumask-%d\n", |
|---|
| 457 | + cluster, aff_cpu, aff, (u32)cpumask); |
|---|
| 458 | + |
|---|
| 459 | + if (!cpumask) |
|---|
| 460 | + return -1; |
|---|
| 461 | + } |
|---|
| 462 | + |
|---|
| 463 | + return 0; |
|---|
| 464 | +} |
|---|
| 465 | + |
|---|
| 466 | +static void amp_gic_get_irqs_config(struct device_node *np, |
|---|
| 467 | + struct amp_gic_ctrl_s *amp_ctrl) |
|---|
| 468 | +{ |
|---|
| 469 | + const struct property *prop; |
|---|
| 470 | + u32 irq, i; |
|---|
| 471 | + int count; |
|---|
| 472 | + u64 aff, val, prio; |
|---|
| 473 | + |
|---|
| 474 | + prop = of_find_property(np, "amp-irqs", NULL); |
|---|
| 475 | + if (!prop) |
|---|
| 476 | + return; |
|---|
| 477 | + |
|---|
| 478 | + if (!prop->value) |
|---|
| 479 | + return; |
|---|
| 480 | + |
|---|
| 481 | + count = of_property_count_u64_elems(np, "amp-irqs"); |
|---|
| 482 | + |
|---|
| 483 | + if (count % 3) |
|---|
| 484 | + return; |
|---|
| 485 | + |
|---|
| 486 | + for (i = 0; i < count / 3; i++) { |
|---|
| 487 | + of_property_read_u64_index(np, "amp-irqs", 3 * i, &val); |
|---|
| 488 | + irq = (u32)val; |
|---|
| 489 | + if (irq > amp_ctrl->spis_num) |
|---|
| 490 | + break; |
|---|
| 491 | + |
|---|
| 492 | + of_property_read_u64_index(np, "amp-irqs", 3 * i + 1, &prio); |
|---|
| 493 | + of_property_read_u64_index(np, "amp-irqs", 3 * i + 2, &aff); |
|---|
| 494 | + |
|---|
| 495 | + AMP_GIC_DBG("%s: irq-%d aff-%llx prio-%llx\n", |
|---|
| 496 | + __func__, irq, aff, prio); |
|---|
| 497 | + |
|---|
| 498 | + amp_ctrl->irqs_cfg[irq].prio = (u32)prio; |
|---|
| 499 | + amp_ctrl->irqs_cfg[irq].aff = aff; |
|---|
| 500 | + if (amp_ctrl->gic_version == GIC_V2) { |
|---|
| 501 | + amp_ctrl->irqs_cfg[irq].cpumask = amp_get_cpumask_bit(aff); |
|---|
| 502 | + if (!amp_ctrl->irqs_cfg[irq].cpumask) { |
|---|
| 503 | + pr_err("%s: get cpumask error\n", __func__); |
|---|
| 504 | + break; |
|---|
| 505 | + } |
|---|
| 506 | + } |
|---|
| 507 | + |
|---|
| 508 | + if (!amp_ctrl->irqs_cfg[irq].aff && |
|---|
| 509 | + !amp_ctrl->irqs_cfg[irq].prio) |
|---|
| 510 | + break; |
|---|
| 511 | + |
|---|
| 512 | + amp_ctrl->irqs_cfg[irq].amp_flag = 1; |
|---|
| 513 | + |
|---|
| 514 | + AMP_GIC_DBG(" %s: irq-%d aff-%llx cpumask-%x pri-%x\n", |
|---|
| 515 | + __func__, irq, amp_ctrl->irqs_cfg[irq].aff, |
|---|
| 516 | + amp_ctrl->irqs_cfg[irq].cpumask, |
|---|
| 517 | + amp_ctrl->irqs_cfg[irq].prio); |
|---|
| 518 | + } |
|---|
| 519 | +} |
|---|
| 520 | + |
|---|
| 521 | +void rockchip_amp_get_gic_info(u32 spis_num, enum gic_type gic_version) |
|---|
| 522 | +{ |
|---|
| 523 | + struct device_node *np; |
|---|
| 524 | + |
|---|
| 525 | + amp_ctrl.spis_num = spis_num; |
|---|
| 526 | + amp_ctrl.gic_version = gic_version; |
|---|
| 527 | + |
|---|
| 528 | + np = of_find_node_by_name(NULL, "rockchip-amp"); |
|---|
| 529 | + if (!np) |
|---|
| 530 | + return; |
|---|
| 531 | + |
|---|
| 532 | + if (amp_gic_get_cpumask(np, &_ctrl)) { |
|---|
| 533 | + pr_err("%s: get amp gic cpu mask error\n", __func__); |
|---|
| 534 | + goto exit; |
|---|
| 535 | + } |
|---|
| 536 | + |
|---|
| 537 | + gic_of_get_gpio_group(np, &_ctrl); |
|---|
| 538 | + amp_gic_get_irqs_config(np, &_ctrl); |
|---|
| 539 | + |
|---|
| 540 | +exit: |
|---|
| 541 | + of_node_put(np); |
|---|
| 542 | +} |
|---|
| 543 | + |
|---|
| 223 | 544 | static int rockchip_amp_probe(struct platform_device *pdev) |
|---|
| 224 | 545 | { |
|---|
| 225 | | - struct rkamp_device *rkamp_dev = NULL; |
|---|
| 226 | | - int ret, i, idx = 0; |
|---|
| 227 | 546 | struct device_node *cpus_node, *cpu_node; |
|---|
| 547 | + struct rkamp_device *rkamp_dev; |
|---|
| 548 | + int ret, i, idx = 0; |
|---|
| 228 | 549 | |
|---|
| 229 | 550 | rkamp_dev = devm_kzalloc(&pdev->dev, sizeof(*rkamp_dev), GFP_KERNEL); |
|---|
| 230 | 551 | if (!rkamp_dev) |
|---|
| .. | .. |
|---|
| 233 | 554 | rkamp_dev->num_clks = devm_clk_bulk_get_all(&pdev->dev, &rkamp_dev->clks); |
|---|
| 234 | 555 | if (rkamp_dev->num_clks < 0) |
|---|
| 235 | 556 | return -ENODEV; |
|---|
| 557 | + |
|---|
| 236 | 558 | ret = clk_bulk_prepare_enable(rkamp_dev->num_clks, rkamp_dev->clks); |
|---|
| 237 | 559 | if (ret) |
|---|
| 238 | 560 | return dev_err_probe(&pdev->dev, ret, "failed to prepare enable clks: %d\n", ret); |
|---|
| 239 | 561 | |
|---|
| 240 | 562 | pm_runtime_enable(&pdev->dev); |
|---|
| 241 | 563 | |
|---|
| 242 | | - rkamp_dev->num_pds = of_count_phandle_with_args(pdev->dev.of_node, "power-domains", |
|---|
| 243 | | - "#power-domain-cells"); |
|---|
| 244 | | - |
|---|
| 564 | + rkamp_dev->num_pds = |
|---|
| 565 | + of_count_phandle_with_args(pdev->dev.of_node, "power-domains", |
|---|
| 566 | + "#power-domain-cells"); |
|---|
| 245 | 567 | if (rkamp_dev->num_pds > 0) { |
|---|
| 246 | | - rkamp_dev->pd_dev = devm_kmalloc_array(&pdev->dev, rkamp_dev->num_pds, |
|---|
| 247 | | - sizeof(*rkamp_dev->pd_dev), GFP_KERNEL); |
|---|
| 568 | + rkamp_dev->pd_dev = |
|---|
| 569 | + devm_kmalloc_array(&pdev->dev, rkamp_dev->num_pds, |
|---|
| 570 | + sizeof(*rkamp_dev->pd_dev), GFP_KERNEL); |
|---|
| 248 | 571 | if (!rkamp_dev->pd_dev) |
|---|
| 249 | 572 | return -ENOMEM; |
|---|
| 250 | 573 | |
|---|
| .. | .. |
|---|
| 265 | 588 | } |
|---|
| 266 | 589 | |
|---|
| 267 | 590 | cpus_node = of_get_child_by_name(pdev->dev.of_node, "amp-cpus"); |
|---|
| 268 | | - |
|---|
| 269 | 591 | if (cpus_node) { |
|---|
| 270 | 592 | for_each_available_child_of_node(cpus_node, cpu_node) { |
|---|
| 271 | | - if (!rockchip_amp_boot_cpus(&pdev->dev, cpu_node, |
|---|
| 272 | | - idx)) { |
|---|
| 593 | + if (!rockchip_amp_boot_cpus(&pdev->dev, cpu_node, idx)) |
|---|
| 273 | 594 | idx++; |
|---|
| 274 | | - } |
|---|
| 275 | 595 | } |
|---|
| 596 | + of_node_put(cpus_node); |
|---|
| 276 | 597 | } |
|---|
| 277 | 598 | |
|---|
| 278 | 599 | rk_amp_kobj = kobject_create_and_add("rk_amp", NULL); |
|---|
| .. | .. |
|---|
| 290 | 611 | |
|---|
| 291 | 612 | static int rockchip_amp_remove(struct platform_device *pdev) |
|---|
| 292 | 613 | { |
|---|
| 293 | | - int i; |
|---|
| 294 | 614 | struct rkamp_device *rkamp_dev = platform_get_drvdata(pdev); |
|---|
| 615 | + int i; |
|---|
| 295 | 616 | |
|---|
| 296 | 617 | clk_bulk_disable_unprepare(rkamp_dev->num_clks, rkamp_dev->clks); |
|---|
| 297 | 618 | |
|---|