| .. | .. |
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| 15 | 15 | #include <linux/pm_runtime.h> |
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| 16 | 16 | #include <linux/rockchip/rockchip_sip.h> |
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| 17 | 17 | #include <soc/rockchip/rockchip_amp.h> |
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| 18 | +#include <linux/irqchip/arm-gic-common.h> |
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| 18 | 19 | |
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| 19 | 20 | #define RK_CPU_STATUS_OFF 0 |
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| 20 | 21 | #define RK_CPU_STATUS_ON 1 |
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| .. | .. |
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| 24 | 25 | #define GPIO_BANK_NUM 16 |
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| 25 | 26 | #define GPIO_GROUP_PRIO_MAX 3 |
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| 26 | 27 | |
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| 28 | +#define MAX_GIC_SPI_NUM (1020) |
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| 27 | 29 | #define AMP_GIC_DBG(fmt, arg...) do { if (0) { pr_warn(fmt, ##arg); } } while (0) |
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| 28 | 30 | |
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| 29 | 31 | enum amp_cpu_ctrl_status { |
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| .. | .. |
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| 55 | 57 | struct amp_gpio_group_s { |
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| 56 | 58 | u32 bank_id; |
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| 57 | 59 | u32 prio; |
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| 58 | | - u32 irq_aff[AMP_AFF_MAX_CPU]; |
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| 60 | + u64 irq_aff[AMP_AFF_MAX_CPU]; |
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| 59 | 61 | u32 irq_id[AMP_AFF_MAX_CPU]; |
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| 60 | 62 | u32 en[AMP_AFF_MAX_CPU]; |
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| 61 | 63 | }; |
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| 62 | 64 | |
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| 63 | 65 | struct amp_irq_cfg_s { |
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| 66 | + u64 aff; |
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| 64 | 67 | u32 prio; |
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| 65 | 68 | u32 cpumask; |
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| 66 | | - u32 aff; |
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| 67 | 69 | int amp_flag; |
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| 68 | | -} irqs_cfg[1024]; |
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| 70 | +} irqs_cfg[MAX_GIC_SPI_NUM]; |
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| 69 | 71 | |
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| 70 | 72 | static struct amp_gic_ctrl_s { |
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| 73 | + enum gic_type gic_version; |
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| 74 | + u32 spis_num; |
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| 71 | 75 | struct { |
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| 72 | 76 | u32 aff; |
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| 73 | 77 | u32 cpumask; |
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| 74 | 78 | u32 flag; |
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| 75 | 79 | } aff_to_cpumask[AMP_AFF_MAX_CLUSTER][AMP_AFF_MAX_CPU]; |
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| 76 | | - struct amp_irq_cfg_s irqs_cfg[1024]; |
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| 77 | | - u32 validmask[1020 / 32 + 1]; |
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| 80 | + struct amp_irq_cfg_s irqs_cfg[MAX_GIC_SPI_NUM]; |
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| 78 | 81 | struct amp_gpio_group_s gpio_grp[GPIO_BANK_NUM][GPIO_GROUP_PRIO_MAX]; |
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| 79 | 82 | u32 gpio_banks; |
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| 80 | 83 | } amp_ctrl; |
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| .. | .. |
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| 275 | 278 | return amp_ctrl.irqs_cfg[irq].cpumask; |
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| 276 | 279 | } |
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| 277 | 280 | |
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| 278 | | -static u32 amp_get_cpumask_bit(u32 aff) |
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| 281 | +int rockchip_amp_need_init_amp_irq(u32 irq) |
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| 282 | +{ |
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| 283 | + return amp_ctrl.irqs_cfg[irq].amp_flag; |
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| 284 | +} |
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| 285 | + |
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| 286 | +static u32 amp_get_cpumask_bit(u64 aff) |
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| 279 | 287 | { |
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| 280 | 288 | u32 aff_cluster, aff_cpu; |
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| 281 | 289 | |
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| .. | .. |
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| 285 | 293 | if (aff_cpu >= AMP_AFF_MAX_CPU || aff_cluster >= AMP_AFF_MAX_CLUSTER) |
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| 286 | 294 | return 0; |
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| 287 | 295 | |
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| 288 | | - AMP_GIC_DBG("%s: aff:%d-%d: %x\n", __func__, aff_cluster, aff_cpu, |
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| 296 | + AMP_GIC_DBG(" %s: aff:%d-%d: %x\n", __func__, aff_cluster, aff_cpu, |
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| 289 | 297 | amp_ctrl.aff_to_cpumask[aff_cluster][aff_cpu].cpumask); |
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| 290 | 298 | |
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| 291 | 299 | return amp_ctrl.aff_to_cpumask[aff_cluster][aff_cpu].cpumask; |
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| 300 | +} |
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| 301 | + |
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| 302 | +u64 rockchip_amp_get_irq_aff(u32 irq) |
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| 303 | +{ |
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| 304 | + return amp_ctrl.irqs_cfg[irq].aff; |
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| 292 | 305 | } |
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| 293 | 306 | |
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| 294 | 307 | static int gic_amp_get_gpio_prio_group_info(struct device_node *np, |
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| 295 | 308 | struct amp_gic_ctrl_s *amp_ctrl, |
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| 296 | 309 | int prio_id) |
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| 297 | 310 | { |
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| 298 | | - u32 gpio_bank, count0, count1, prio, irq_id, irq_aff; |
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| 299 | | - int i; |
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| 311 | + u32 gpio_bank, prio, irq_id; |
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| 312 | + u64 irq_aff; |
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| 313 | + int i, count0, count1; |
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| 300 | 314 | struct amp_gpio_group_s *gpio_grp; |
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| 301 | 315 | struct amp_irq_cfg_s *irqs_cfg; |
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| 302 | 316 | |
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| .. | .. |
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| 320 | 334 | __func__, gpio_bank, prio_id, prio); |
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| 321 | 335 | |
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| 322 | 336 | count0 = of_property_count_u32_elems(np, "girq-id"); |
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| 323 | | - count1 = of_property_count_u32_elems(np, "girq-aff"); |
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| 337 | + count1 = of_property_count_u64_elems(np, "girq-aff"); |
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| 324 | 338 | |
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| 325 | 339 | if (count0 != count1) |
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| 326 | 340 | return -EINVAL; |
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| .. | .. |
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| 330 | 344 | for (i = 0; i < count0; i++) { |
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| 331 | 345 | of_property_read_u32_index(np, "girq-id", i, &irq_id); |
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| 332 | 346 | gpio_grp->irq_id[i] = irq_id; |
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| 333 | | - of_property_read_u32_index(np, "girq-aff", i, &irq_aff); |
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| 347 | + of_property_read_u64_index(np, "girq-aff", i, &irq_aff); |
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| 334 | 348 | |
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| 335 | 349 | gpio_grp->irq_aff[i] = irq_aff; |
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| 336 | 350 | |
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| .. | .. |
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| 338 | 352 | |
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| 339 | 353 | irqs_cfg = &_ctrl->irqs_cfg[irq_id]; |
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| 340 | 354 | |
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| 341 | | - AMP_GIC_DBG(" %s: group cpu-%d, irq-%d: prio-%x, aff-%x en-%d\n", |
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| 355 | + AMP_GIC_DBG(" %s: group cpu-%d, irq-%d: prio-%x, aff-%llx en-%d\n", |
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| 342 | 356 | __func__, i, gpio_grp->irq_id[i], gpio_grp->prio, |
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| 343 | 357 | gpio_grp->irq_aff[i], gpio_grp->en[i]); |
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| 344 | 358 | |
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| 345 | 359 | if (gpio_grp->en[i]) { |
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| 346 | 360 | irqs_cfg->prio = gpio_grp->prio; |
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| 347 | 361 | irqs_cfg->aff = irq_aff; |
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| 348 | | - irqs_cfg->cpumask = amp_get_cpumask_bit(irq_aff); |
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| 362 | + if (amp_ctrl->gic_version == GIC_V2) { |
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| 363 | + irqs_cfg->cpumask = amp_get_cpumask_bit(irq_aff); |
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| 364 | + if (!irqs_cfg->cpumask) { |
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| 365 | + pr_err(" %s: get cpumask error\n", __func__); |
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| 366 | + return -EINVAL; |
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| 367 | + } |
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| 368 | + } |
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| 349 | 369 | irqs_cfg->amp_flag = 1; |
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| 350 | 370 | } |
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| 351 | 371 | |
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| 352 | | - AMP_GIC_DBG(" %s: irqs_cfg prio-%x aff-%x cpumaks-%x en-%d\n", |
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| 372 | + AMP_GIC_DBG(" %s: prio-%x aff-%llx cpumaks-%x flag-%d\n", |
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| 353 | 373 | __func__, irqs_cfg->prio, irqs_cfg->aff, |
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| 354 | 374 | irqs_cfg->cpumask, irqs_cfg->amp_flag); |
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| 355 | 375 | } |
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| .. | .. |
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| 404 | 424 | { |
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| 405 | 425 | const struct property *prop; |
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| 406 | 426 | int count, i; |
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| 407 | | - u32 cluster, aff_cpu, aff, cpumask; |
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| 427 | + u32 cluster, aff_cpu; |
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| 428 | + u64 aff, cpumask; |
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| 408 | 429 | |
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| 430 | + if (amp_ctrl->gic_version != GIC_V2) |
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| 431 | + return 0; |
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| 409 | 432 | prop = of_find_property(np, "amp-cpu-aff-maskbits", NULL); |
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| 433 | + |
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| 410 | 434 | if (!prop) |
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| 411 | 435 | return -1; |
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| 412 | 436 | |
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| 413 | 437 | if (!prop->value) |
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| 414 | 438 | return -1; |
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| 415 | 439 | |
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| 416 | | - count = of_property_count_u32_elems(np, "amp-cpu-aff-maskbits"); |
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| 440 | + count = of_property_count_u64_elems(np, "amp-cpu-aff-maskbits"); |
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| 417 | 441 | if (count % 2) |
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| 418 | 442 | return -1; |
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| 419 | 443 | |
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| 420 | 444 | for (i = 0; i < count / 2; i++) { |
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| 421 | | - of_property_read_u32_index(np, "amp-cpu-aff-maskbits", |
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| 445 | + of_property_read_u64_index(np, "amp-cpu-aff-maskbits", |
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| 422 | 446 | 2 * i, &aff); |
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| 423 | 447 | cluster = MPIDR_AFFINITY_LEVEL(aff, 1); |
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| 424 | 448 | aff_cpu = MPIDR_AFFINITY_LEVEL(aff, 0); |
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| 425 | 449 | amp_ctrl->aff_to_cpumask[cluster][aff_cpu].aff = aff; |
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| 426 | 450 | |
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| 427 | | - of_property_read_u32_index(np, "amp-cpu-aff-maskbits", |
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| 451 | + of_property_read_u64_index(np, "amp-cpu-aff-maskbits", |
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| 428 | 452 | 2 * i + 1, &cpumask); |
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| 429 | 453 | |
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| 430 | | - amp_ctrl->aff_to_cpumask[cluster][aff_cpu].cpumask = cpumask; |
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| 454 | + amp_ctrl->aff_to_cpumask[cluster][aff_cpu].cpumask = (u32)cpumask; |
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| 431 | 455 | |
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| 432 | | - AMP_GIC_DBG("cpumask: %d-%d: aff-%d cpumask-%d\n", |
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| 433 | | - cluster, aff_cpu, aff, cpumask); |
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| 456 | + AMP_GIC_DBG("cpumask: %d-%d: aff-%llx cpumask-%d\n", |
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| 457 | + cluster, aff_cpu, aff, (u32)cpumask); |
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| 434 | 458 | |
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| 435 | 459 | if (!cpumask) |
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| 436 | 460 | return -1; |
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| .. | .. |
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| 443 | 467 | struct amp_gic_ctrl_s *amp_ctrl) |
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| 444 | 468 | { |
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| 445 | 469 | const struct property *prop; |
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| 446 | | - int count, i; |
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| 447 | | - u32 irq, prio, aff; |
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| 470 | + u32 irq, i; |
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| 471 | + int count; |
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| 472 | + u64 aff, val, prio; |
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| 448 | 473 | |
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| 449 | 474 | prop = of_find_property(np, "amp-irqs", NULL); |
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| 450 | 475 | if (!prop) |
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| .. | .. |
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| 453 | 478 | if (!prop->value) |
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| 454 | 479 | return; |
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| 455 | 480 | |
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| 456 | | - count = of_property_count_u32_elems(np, "amp-irqs"); |
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| 481 | + count = of_property_count_u64_elems(np, "amp-irqs"); |
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| 457 | 482 | |
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| 458 | | - if (count < 0 || count % 3) |
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| 483 | + if (count % 3) |
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| 459 | 484 | return; |
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| 460 | 485 | |
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| 461 | 486 | for (i = 0; i < count / 3; i++) { |
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| 462 | | - of_property_read_u32_index(np, "amp-irqs", 3 * i, &irq); |
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| 463 | | - |
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| 464 | | - if (irq > 1020) |
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| 487 | + of_property_read_u64_index(np, "amp-irqs", 3 * i, &val); |
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| 488 | + irq = (u32)val; |
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| 489 | + if (irq > amp_ctrl->spis_num) |
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| 465 | 490 | break; |
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| 466 | 491 | |
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| 467 | | - of_property_read_u32_index(np, "amp-irqs", 3 * i + 1, &prio); |
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| 468 | | - of_property_read_u32_index(np, "amp-irqs", 3 * i + 2, &aff); |
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| 492 | + of_property_read_u64_index(np, "amp-irqs", 3 * i + 1, &prio); |
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| 493 | + of_property_read_u64_index(np, "amp-irqs", 3 * i + 2, &aff); |
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| 469 | 494 | |
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| 470 | | - AMP_GIC_DBG("%s: irq-%d aff-%d prio-%x\n", |
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| 495 | + AMP_GIC_DBG("%s: irq-%d aff-%llx prio-%llx\n", |
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| 471 | 496 | __func__, irq, aff, prio); |
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| 472 | 497 | |
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| 473 | | - amp_ctrl->irqs_cfg[irq].prio = prio; |
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| 498 | + amp_ctrl->irqs_cfg[irq].prio = (u32)prio; |
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| 474 | 499 | amp_ctrl->irqs_cfg[irq].aff = aff; |
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| 475 | | - amp_ctrl->irqs_cfg[irq].cpumask = amp_get_cpumask_bit(aff); |
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| 476 | | - |
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| 477 | | - if (!amp_ctrl->irqs_cfg[irq].cpumask) { |
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| 478 | | - AMP_GIC_DBG("%s: get cpumask error\n", __func__); |
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| 479 | | - break; |
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| 500 | + if (amp_ctrl->gic_version == GIC_V2) { |
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| 501 | + amp_ctrl->irqs_cfg[irq].cpumask = amp_get_cpumask_bit(aff); |
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| 502 | + if (!amp_ctrl->irqs_cfg[irq].cpumask) { |
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| 503 | + pr_err("%s: get cpumask error\n", __func__); |
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| 504 | + break; |
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| 505 | + } |
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| 480 | 506 | } |
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| 481 | 507 | |
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| 482 | 508 | if (!amp_ctrl->irqs_cfg[irq].aff && |
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| .. | .. |
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| 485 | 511 | |
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| 486 | 512 | amp_ctrl->irqs_cfg[irq].amp_flag = 1; |
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| 487 | 513 | |
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| 488 | | - AMP_GIC_DBG("%s: irq-%d aff-%d cpumask-%d pri-%x\n", |
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| 514 | + AMP_GIC_DBG(" %s: irq-%d aff-%llx cpumask-%x pri-%x\n", |
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| 489 | 515 | __func__, irq, amp_ctrl->irqs_cfg[irq].aff, |
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| 490 | 516 | amp_ctrl->irqs_cfg[irq].cpumask, |
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| 491 | 517 | amp_ctrl->irqs_cfg[irq].prio); |
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| 492 | 518 | } |
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| 493 | 519 | } |
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| 494 | 520 | |
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| 495 | | -void rockchip_amp_get_gic_info(void) |
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| 521 | +void rockchip_amp_get_gic_info(u32 spis_num, enum gic_type gic_version) |
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| 496 | 522 | { |
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| 497 | 523 | struct device_node *np; |
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| 524 | + |
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| 525 | + amp_ctrl.spis_num = spis_num; |
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| 526 | + amp_ctrl.gic_version = gic_version; |
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| 498 | 527 | |
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| 499 | 528 | np = of_find_node_by_name(NULL, "rockchip-amp"); |
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| 500 | 529 | if (!np) |
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| .. | .. |
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| 504 | 533 | pr_err("%s: get amp gic cpu mask error\n", __func__); |
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| 505 | 534 | goto exit; |
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| 506 | 535 | } |
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| 536 | + |
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| 507 | 537 | gic_of_get_gpio_group(np, &_ctrl); |
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| 508 | 538 | amp_gic_get_irqs_config(np, &_ctrl); |
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| 509 | 539 | |
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