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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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1 | 2 | /* |
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2 | 3 | * drivers/net/ethernet/ibm/emac/core.h |
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3 | 4 | * |
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.. | .. |
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15 | 16 | * Armin Kuster <akuster@mvista.com> |
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16 | 17 | * Johnnie Peters <jpeters@mvista.com> |
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17 | 18 | * Copyright 2000, 2001 MontaVista Softare Inc. |
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18 | | - * |
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19 | | - * This program is free software; you can redistribute it and/or modify it |
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20 | | - * under the terms of the GNU General Public License as published by the |
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21 | | - * Free Software Foundation; either version 2 of the License, or (at your |
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22 | | - * option) any later version. |
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23 | | - * |
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24 | 19 | */ |
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25 | 20 | #ifndef __IBM_NEWEMAC_CORE_H |
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26 | 21 | #define __IBM_NEWEMAC_CORE_H |
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.. | .. |
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68 | 63 | return mal_rx_size(ETH_DATA_LEN + EMAC_MTU_OVERHEAD); |
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69 | 64 | } |
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70 | 65 | |
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71 | | -#define EMAC_DMA_ALIGN(x) ALIGN((x), dma_get_cache_alignment()) |
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72 | | - |
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73 | | -#define EMAC_RX_SKB_HEADROOM \ |
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74 | | - EMAC_DMA_ALIGN(CONFIG_IBM_EMAC_RX_SKB_HEADROOM) |
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75 | | - |
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76 | 66 | /* Size of RX skb for the given MTU */ |
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77 | 67 | static inline int emac_rx_skb_size(int mtu) |
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78 | 68 | { |
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79 | 69 | int size = max(mtu + EMAC_MTU_OVERHEAD, emac_rx_size(mtu)); |
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80 | | - return EMAC_DMA_ALIGN(size + 2) + EMAC_RX_SKB_HEADROOM; |
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| 70 | + |
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| 71 | + return SKB_DATA_ALIGN(size + NET_IP_ALIGN) + NET_SKB_PAD; |
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81 | 72 | } |
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82 | 73 | |
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83 | 74 | /* RX DMA sync size */ |
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84 | 75 | static inline int emac_rx_sync_size(int mtu) |
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85 | 76 | { |
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86 | | - return EMAC_DMA_ALIGN(emac_rx_size(mtu) + 2); |
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| 77 | + return SKB_DATA_ALIGN(emac_rx_size(mtu) + NET_IP_ALIGN); |
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87 | 78 | } |
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88 | 79 | |
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89 | 80 | /* Driver statistcs is split into two parts to make it more cache friendly: |
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.. | .. |
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180 | 171 | struct mal_commac commac; |
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181 | 172 | |
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182 | 173 | /* PHY infos */ |
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183 | | - int phy_mode; |
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| 174 | + phy_interface_t phy_mode; |
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184 | 175 | u32 phy_map; |
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185 | 176 | u32 phy_address; |
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186 | 177 | u32 phy_feat_exc; |
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.. | .. |
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390 | 381 | #define EMAC4SYNC_XAHT_SLOTS_SHIFT 8 |
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391 | 382 | #define EMAC4SYNC_XAHT_WIDTH_SHIFT 5 |
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392 | 383 | |
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| 384 | +/* The largest span between slots and widths above is 3 */ |
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| 385 | +#define EMAC_XAHT_MAX_REGS (1 << 3) |
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| 386 | + |
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393 | 387 | #define EMAC_XAHT_SLOTS(dev) (1 << (dev)->xaht_slots_shift) |
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394 | 388 | #define EMAC_XAHT_WIDTH(dev) (1 << (dev)->xaht_width_shift) |
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395 | 389 | #define EMAC_XAHT_REGS(dev) (1 << ((dev)->xaht_slots_shift - \ |
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