| .. | .. |
|---|
| 17 | 17 | |
|---|
| 18 | 18 | struct mux_gpio { |
|---|
| 19 | 19 | struct gpio_descs *gpios; |
|---|
| 20 | | - int *val; |
|---|
| 21 | 20 | }; |
|---|
| 22 | 21 | |
|---|
| 23 | 22 | static int mux_gpio_set(struct mux_control *mux, int state) |
|---|
| 24 | 23 | { |
|---|
| 25 | 24 | struct mux_gpio *mux_gpio = mux_chip_priv(mux->chip); |
|---|
| 26 | | - int i; |
|---|
| 25 | + DECLARE_BITMAP(values, BITS_PER_TYPE(state)); |
|---|
| 27 | 26 | |
|---|
| 28 | | - for (i = 0; i < mux_gpio->gpios->ndescs; i++) |
|---|
| 29 | | - mux_gpio->val[i] = (state >> i) & 1; |
|---|
| 27 | + values[0] = state; |
|---|
| 30 | 28 | |
|---|
| 31 | 29 | gpiod_set_array_value_cansleep(mux_gpio->gpios->ndescs, |
|---|
| 32 | 30 | mux_gpio->gpios->desc, |
|---|
| 33 | | - mux_gpio->val); |
|---|
| 31 | + mux_gpio->gpios->info, values); |
|---|
| 34 | 32 | |
|---|
| 35 | 33 | return 0; |
|---|
| 36 | 34 | } |
|---|
| .. | .. |
|---|
| 58 | 56 | if (pins < 0) |
|---|
| 59 | 57 | return pins; |
|---|
| 60 | 58 | |
|---|
| 61 | | - mux_chip = devm_mux_chip_alloc(dev, 1, sizeof(*mux_gpio) + |
|---|
| 62 | | - pins * sizeof(*mux_gpio->val)); |
|---|
| 59 | + mux_chip = devm_mux_chip_alloc(dev, 1, sizeof(*mux_gpio)); |
|---|
| 63 | 60 | if (IS_ERR(mux_chip)) |
|---|
| 64 | 61 | return PTR_ERR(mux_chip); |
|---|
| 65 | 62 | |
|---|
| 66 | 63 | mux_gpio = mux_chip_priv(mux_chip); |
|---|
| 67 | | - mux_gpio->val = (int *)(mux_gpio + 1); |
|---|
| 68 | 64 | mux_chip->ops = &mux_gpio_ops; |
|---|
| 69 | 65 | |
|---|
| 70 | 66 | mux_gpio->gpios = devm_gpiod_get_array(dev, "mux", GPIOD_OUT_LOW); |
|---|