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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb 
 kernel/drivers/media/pci/cx23885/cx23888-ir.c
....@@ -1,19 +1,10 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  *  Driver for the Conexant CX23885/7/8 PCIe bridge
34  *
45  *  CX23888 Integrated Consumer Infrared Controller
56  *
67  *  Copyright (C) 2009  Andy Walls <awalls@md.metrocast.net>
7
- *
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- *  This program is free software; you can redistribute it and/or
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- *  modify it under the terms of the GNU General Public License
10
- *  as published by the Free Software Foundation; either version 2
11
- *  of the License, or (at your option) any later version.
12
- *
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- *  This program is distributed in the hope that it will be useful,
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- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- *  GNU General Public License for more details.
178  */
189 
1910 #include "cx23885.h"
....@@ -184,19 +175,6 @@
184175 	return (u16) d;
185176 }
186177 
187
-static inline u16 ns_to_clock_divider(unsigned int ns)
188
-{
189
-	return count_to_clock_divider(
190
-		DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ / 1000000 * ns, 1000));
191
-}
192
-
193
-static inline unsigned int clock_divider_to_ns(unsigned int divider)
194
-{
195
-	/* Period of the Rx or Tx clock in ns */
196
-	return DIV_ROUND_CLOSEST((divider + 1) * 1000,
197
-				 CX23888_IR_REFCLK_FREQ / 1000000);
198
-}
199
-
200178 static inline u16 carrier_freq_to_clock_divider(unsigned int freq)
201179 {
202180 	return count_to_clock_divider(
....@@ -206,13 +184,6 @@
206184 static inline unsigned int clock_divider_to_carrier_freq(unsigned int divider)
207185 {
208186 	return DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ, (divider + 1) * 16);
209
-}
210
-
211
-static inline u16 freq_to_clock_divider(unsigned int freq,
212
-					unsigned int rollovers)
213
-{
214
-	return count_to_clock_divider(
215
-		   DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ, freq * rollovers));
216187 }
217188 
218189 static inline unsigned int clock_divider_to_freq(unsigned int divider,
....@@ -548,7 +519,7 @@
548519 	ror = stats & STATS_ROR; /* Rx FIFO Over Run */
549520 
550521 	tse = irqen & IRQEN_TSE; /* Tx FIFO Service Request IRQ Enable */
551
-	rse = irqen & IRQEN_RSE; /* Rx FIFO Service Reuqest IRQ Enable */
522
+	rse = irqen & IRQEN_RSE; /* Rx FIFO Service Request IRQ Enable */
552523 	rte = irqen & IRQEN_RTE; /* Rx Pulse Width Timer Time Out IRQ Enable */
553524 	roe = irqen & IRQEN_ROE; /* Rx FIFO Over Run IRQ Enable */
554525 
....@@ -638,7 +609,7 @@
638609 		events |= V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED;
639610 	}
640611 	if (v) {
641
-		/* Clear STATS_ROR & STATS_RTO as needed by reseting hardware */
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+		/* Clear STATS_ROR & STATS_RTO as needed by resetting hardware */
642613 		cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl & ~v);
643614 		cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl);
644615 		*handled = true;
....@@ -692,14 +663,12 @@
692663 		}
693664 
694665 		v = (unsigned) pulse_width_count_to_ns(
695
-				  (u16) (p->hw_fifo_data & FIFO_RXTX), divider);
666
+				  (u16)(p->hw_fifo_data & FIFO_RXTX), divider) / 1000;
696667 		if (v > IR_MAX_DURATION)
697668 			v = IR_MAX_DURATION;
698669 
699
-		init_ir_raw_event(&p->ir_core_data);
700
-		p->ir_core_data.pulse = u;
701
-		p->ir_core_data.duration = v;
702
-		p->ir_core_data.timeout = w;
670
+		p->ir_core_data = (struct ir_raw_event)
671
+			{ .pulse = u, .duration = v, .timeout = w };
703672 
704673 		v4l2_dbg(2, ir_888_debug, sd, "rx read: %10u ns  %s  %s\n",
705674 			 v, u ? "mark" : "space", w ? "(timed out)" : "");