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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.c
..
..
@@ -3,26 +3,25 @@
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3
  * Copyright (C) 2017-2018 Etnaviv Project
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  */
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5
 
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+#include <linux/dma-mapping.h>
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+
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 #include <drm/drm_mm.h>
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9
 
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 #include "etnaviv_cmdbuf.h"
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+#include "etnaviv_gem.h"
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 #include "etnaviv_gpu.h"
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 #include "etnaviv_mmu.h"
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 #include "etnaviv_perfmon.h"
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15
 
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-#define SUBALLOC_SIZE		SZ_256K
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+#define SUBALLOC_SIZE		SZ_512K
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 #define SUBALLOC_GRANULE	SZ_4K
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 #define SUBALLOC_GRANULES	(SUBALLOC_SIZE / SUBALLOC_GRANULE)
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19
 
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 struct etnaviv_cmdbuf_suballoc {
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 	/* suballocated dma buffer properties */
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-	struct etnaviv_gpu *gpu;
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+	struct device *dev;
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 	void *vaddr;
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 	dma_addr_t paddr;
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-
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-	/* GPU mapping */
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-	u32 iova;
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-	struct drm_mm_node vram_node; /* only used on MMUv2 */
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25
 
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 	/* allocation management */
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 	struct mutex lock;
..
..
@@ -32,7 +31,7 @@
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 };
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32
 
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 struct etnaviv_cmdbuf_suballoc *
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-etnaviv_cmdbuf_suballoc_new(struct etnaviv_gpu * gpu)
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+etnaviv_cmdbuf_suballoc_new(struct device *dev)
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 {
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 	struct etnaviv_cmdbuf_suballoc *suballoc;
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 	int ret;
..
..
@@ -41,36 +40,44 @@
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 	if (!suballoc)
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 		return ERR_PTR(-ENOMEM);
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-	suballoc->gpu = gpu;
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+	suballoc->dev = dev;
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 	mutex_init(&suballoc->lock);
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 	init_waitqueue_head(&suballoc->free_event);
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46
 
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-	suballoc->vaddr = dma_alloc_wc(gpu->dev, SUBALLOC_SIZE,
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+	BUILD_BUG_ON(ETNAVIV_SOFTPIN_START_ADDRESS < SUBALLOC_SIZE);
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+	suballoc->vaddr = dma_alloc_wc(dev, SUBALLOC_SIZE,
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 				       &suballoc->paddr, GFP_KERNEL);
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-	if (!suballoc->vaddr)
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+	if (!suballoc->vaddr) {
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+		ret = -ENOMEM;
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 		goto free_suballoc;
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-
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-	ret = etnaviv_iommu_get_suballoc_va(gpu, suballoc->paddr,
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-					    &suballoc->vram_node, SUBALLOC_SIZE,
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-					    &suballoc->iova);
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-	if (ret)
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-		goto free_dma;
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+	}
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54
 
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 	return suballoc;
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56
 
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-free_dma:
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-	dma_free_wc(gpu->dev, SUBALLOC_SIZE, suballoc->vaddr, suballoc->paddr);
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57
 free_suballoc:
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 	kfree(suballoc);
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59
 
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-	return NULL;
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+	return ERR_PTR(ret);
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+}
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+
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+int etnaviv_cmdbuf_suballoc_map(struct etnaviv_cmdbuf_suballoc *suballoc,
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+				struct etnaviv_iommu_context *context,
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+				struct etnaviv_vram_mapping *mapping,
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+				u32 memory_base)
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+{
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+	return etnaviv_iommu_get_suballoc_va(context, mapping, memory_base,
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+					     suballoc->paddr, SUBALLOC_SIZE);
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+}
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+
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+void etnaviv_cmdbuf_suballoc_unmap(struct etnaviv_iommu_context *context,
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+				   struct etnaviv_vram_mapping *mapping)
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+{
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+	etnaviv_iommu_put_suballoc_va(context, mapping);
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 }
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77
 
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 void etnaviv_cmdbuf_suballoc_destroy(struct etnaviv_cmdbuf_suballoc *suballoc)
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 {
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-	etnaviv_iommu_put_suballoc_va(suballoc->gpu, &suballoc->vram_node,
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-				      SUBALLOC_SIZE, suballoc->iova);
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-	dma_free_wc(suballoc->gpu->dev, SUBALLOC_SIZE, suballoc->vaddr,
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+	dma_free_wc(suballoc->dev, SUBALLOC_SIZE, suballoc->vaddr,
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 		    suballoc->paddr);
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 	kfree(suballoc);
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 }
..
..
@@ -95,7 +102,7 @@
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 						       suballoc->free_space,
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 						       msecs_to_jiffies(10 * 1000));
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 		if (!ret) {
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-			dev_err(suballoc->gpu->dev,
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+			dev_err(suballoc->dev,
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 				"Timeout waiting for cmdbuf space\n");
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 			return -ETIMEDOUT;
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 		}
..
..
@@ -123,9 +130,10 @@
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 	wake_up_all(&suballoc->free_event);
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 }
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132
 
126
-u32 etnaviv_cmdbuf_get_va(struct etnaviv_cmdbuf *buf)
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+u32 etnaviv_cmdbuf_get_va(struct etnaviv_cmdbuf *buf,
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+			  struct etnaviv_vram_mapping *mapping)
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135
 {
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-	return buf->suballoc->iova + buf->suballoc_offset;
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+	return mapping->iova + buf->suballoc_offset;
129
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 }
130
138
 
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 dma_addr_t etnaviv_cmdbuf_get_pa(struct etnaviv_cmdbuf *buf)