gmac get mac form eeprom

hc

2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/drivers/gpu/drm/amd/amdgpu/soc15d.h
..
..
@@ -253,7 +253,30 @@
253
253
 #              define PACKET3_DMA_DATA_CMD_SAIC    (1 << 28)
254
254
 #              define PACKET3_DMA_DATA_CMD_DAIC    (1 << 29)
255
255
 #              define PACKET3_DMA_DATA_CMD_RAW_WAIT  (1 << 30)
256
-#define	PACKET3_AQUIRE_MEM				0x58
256
+#define	PACKET3_ACQUIRE_MEM				0x58
257
+/* 1.  HEADER
258
+ * 2.  COHER_CNTL [30:0]
259
+ * 2.1 ENGINE_SEL [31:31]
260
+ * 3.  COHER_SIZE [31:0]
261
+ * 4.  COHER_SIZE_HI [7:0]
262
+ * 5.  COHER_BASE_LO [31:0]
263
+ * 6.  COHER_BASE_HI [23:0]
264
+ * 7.  POLL_INTERVAL [15:0]
265
+ */
266
+/* COHER_CNTL fields for CP_COHER_CNTL */
267
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_TC_NC_ACTION_ENA(x) ((x) << 3)
268
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_TC_WC_ACTION_ENA(x) ((x) << 4)
269
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_TC_INV_METADATA_ACTION_ENA(x) ((x) << 5)
270
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_TCL1_VOL_ACTION_ENA(x) ((x) << 15)
271
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_TC_WB_ACTION_ENA(x) ((x) << 18)
272
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_TCL1_ACTION_ENA(x) ((x) << 22)
273
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_TC_ACTION_ENA(x) ((x) << 23)
274
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_CB_ACTION_ENA(x) ((x) << 25)
275
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_DB_ACTION_ENA(x) ((x) << 26)
276
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_SH_KCACHE_ACTION_ENA(x) ((x) << 27)
277
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_SH_KCACHE_VOL_ACTION_ENA(x) ((x) << 28)
278
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_SH_ICACHE_ACTION_ENA(x) ((x) << 29)
279
+#define 	PACKET3_ACQUIRE_MEM_CP_COHER_CNTL_SH_KCACHE_WB_ACTION_ENA(x) ((x) << 30)
257
280
 #define	PACKET3_REWIND					0x59
258
281
 #define	PACKET3_LOAD_UCONFIG_REG			0x5E
259
282
 #define	PACKET3_LOAD_SH_REG				0x5F
..
..
@@ -286,6 +309,7 @@
286
309
 #define	PACKET3_WAIT_ON_DE_COUNTER_DIFF			0x88
287
310
 #define	PACKET3_SWITCH_BUFFER				0x8B
288
311
 #define PACKET3_FRAME_CONTROL				0x90
312
+#			define FRAME_TMZ	(1 << 0)
289
313
 #			define FRAME_CMD(x) ((x) << 28)
290
314
 			/*
291
315
 			 * x=0: tmz_begin