hc
2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb
kernel/drivers/crypto/omap-aes.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Cryptographic API.
34 *
....@@ -6,11 +7,6 @@
67 * Copyright (c) 2010 Nokia Corporation
78 * Author: Dmitry Kasatkin <dmitry.kasatkin@nokia.com>
89 * Copyright (c) 2011 Texas Instruments Incorporated
9
- *
10
- * This program is free software; you can redistribute it and/or modify
11
- * it under the terms of the GNU General Public License version 2 as published
12
- * by the Free Software Foundation.
13
- *
1410 */
1511
1612 #define pr_fmt(fmt) "%20s: " fmt, __func__
....@@ -107,7 +103,7 @@
107103 dd->err = 0;
108104 }
109105
110
- err = pm_runtime_get_sync(dd->dev);
106
+ err = pm_runtime_resume_and_get(dd->dev);
111107 if (err < 0) {
112108 dev_err(dd->dev, "failed to get sync: %d\n", err);
113109 return err;
....@@ -143,11 +139,11 @@
143139
144140 for (i = 0; i < key32; i++) {
145141 omap_aes_write(dd, AES_REG_KEY(dd, i),
146
- __le32_to_cpu(dd->ctx->key[i]));
142
+ (__force u32)cpu_to_le32(dd->ctx->key[i]));
147143 }
148144
149
- if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->info)
150
- omap_aes_write_n(dd, AES_REG_IV(dd, 0), dd->req->info, 4);
145
+ if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->iv)
146
+ omap_aes_write_n(dd, AES_REG_IV(dd, 0), (void *)dd->req->iv, 4);
151147
152148 if ((dd->flags & (FLAGS_GCM)) && dd->aead_req->iv) {
153149 rctx = aead_request_ctx(dd->aead_req);
....@@ -273,13 +269,14 @@
273269 struct scatterlist *out_sg,
274270 int in_sg_len, int out_sg_len)
275271 {
276
- struct dma_async_tx_descriptor *tx_in, *tx_out;
272
+ struct dma_async_tx_descriptor *tx_in, *tx_out = NULL, *cb_desc;
277273 struct dma_slave_config cfg;
278274 int ret;
279275
280276 if (dd->pio_only) {
281277 scatterwalk_start(&dd->in_walk, dd->in_sg);
282
- scatterwalk_start(&dd->out_walk, dd->out_sg);
278
+ if (out_sg_len)
279
+ scatterwalk_start(&dd->out_walk, dd->out_sg);
283280
284281 /* Enable DATAIN interrupt and let it take
285282 care of the rest */
....@@ -316,34 +313,45 @@
316313
317314 /* No callback necessary */
318315 tx_in->callback_param = dd;
316
+ tx_in->callback = NULL;
319317
320318 /* OUT */
321
- ret = dmaengine_slave_config(dd->dma_lch_out, &cfg);
322
- if (ret) {
323
- dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n",
324
- ret);
325
- return ret;
326
- }
319
+ if (out_sg_len) {
320
+ ret = dmaengine_slave_config(dd->dma_lch_out, &cfg);
321
+ if (ret) {
322
+ dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n",
323
+ ret);
324
+ return ret;
325
+ }
327326
328
- tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg, out_sg_len,
329
- DMA_DEV_TO_MEM,
330
- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
331
- if (!tx_out) {
332
- dev_err(dd->dev, "OUT prep_slave_sg() failed\n");
333
- return -EINVAL;
327
+ tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg,
328
+ out_sg_len,
329
+ DMA_DEV_TO_MEM,
330
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
331
+ if (!tx_out) {
332
+ dev_err(dd->dev, "OUT prep_slave_sg() failed\n");
333
+ return -EINVAL;
334
+ }
335
+
336
+ cb_desc = tx_out;
337
+ } else {
338
+ cb_desc = tx_in;
334339 }
335340
336341 if (dd->flags & FLAGS_GCM)
337
- tx_out->callback = omap_aes_gcm_dma_out_callback;
342
+ cb_desc->callback = omap_aes_gcm_dma_out_callback;
338343 else
339
- tx_out->callback = omap_aes_dma_out_callback;
340
- tx_out->callback_param = dd;
344
+ cb_desc->callback = omap_aes_dma_out_callback;
345
+ cb_desc->callback_param = dd;
346
+
341347
342348 dmaengine_submit(tx_in);
343
- dmaengine_submit(tx_out);
349
+ if (tx_out)
350
+ dmaengine_submit(tx_out);
344351
345352 dma_async_issue_pending(dd->dma_lch_in);
346
- dma_async_issue_pending(dd->dma_lch_out);
353
+ if (out_sg_len)
354
+ dma_async_issue_pending(dd->dma_lch_out);
347355
348356 /* start DMA */
349357 dd->pdata->trigger(dd, dd->total);
....@@ -355,7 +363,7 @@
355363 {
356364 int err;
357365
358
- pr_debug("total: %d\n", dd->total);
366
+ pr_debug("total: %zu\n", dd->total);
359367
360368 if (!dd->pio_only) {
361369 err = dma_map_sg(dd->dev, dd->in_sg, dd->in_sg_len,
....@@ -365,11 +373,13 @@
365373 return -EINVAL;
366374 }
367375
368
- err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len,
369
- DMA_FROM_DEVICE);
370
- if (!err) {
371
- dev_err(dd->dev, "dma_map_sg() error\n");
372
- return -EINVAL;
376
+ if (dd->out_sg_len) {
377
+ err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len,
378
+ DMA_FROM_DEVICE);
379
+ if (!err) {
380
+ dev_err(dd->dev, "dma_map_sg() error\n");
381
+ return -EINVAL;
382
+ }
373383 }
374384 }
375385
....@@ -377,8 +387,9 @@
377387 dd->out_sg_len);
378388 if (err && !dd->pio_only) {
379389 dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
380
- dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
381
- DMA_FROM_DEVICE);
390
+ if (dd->out_sg_len)
391
+ dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
392
+ DMA_FROM_DEVICE);
382393 }
383394
384395 return err;
....@@ -386,11 +397,11 @@
386397
387398 static void omap_aes_finish_req(struct omap_aes_dev *dd, int err)
388399 {
389
- struct ablkcipher_request *req = dd->req;
400
+ struct skcipher_request *req = dd->req;
390401
391402 pr_debug("err: %d\n", err);
392403
393
- crypto_finalize_ablkcipher_request(dd->engine, req, err);
404
+ crypto_finalize_skcipher_request(dd->engine, req, err);
394405
395406 pm_runtime_mark_last_busy(dd->dev);
396407 pm_runtime_put_autosuspend(dd->dev);
....@@ -398,7 +409,7 @@
398409
399410 int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
400411 {
401
- pr_debug("total: %d\n", dd->total);
412
+ pr_debug("total: %zu\n", dd->total);
402413
403414 omap_aes_dma_stop(dd);
404415
....@@ -407,10 +418,10 @@
407418 }
408419
409420 static int omap_aes_handle_queue(struct omap_aes_dev *dd,
410
- struct ablkcipher_request *req)
421
+ struct skcipher_request *req)
411422 {
412423 if (req)
413
- return crypto_transfer_ablkcipher_request_to_engine(dd->engine, req);
424
+ return crypto_transfer_skcipher_request_to_engine(dd->engine, req);
414425
415426 return 0;
416427 }
....@@ -418,10 +429,10 @@
418429 static int omap_aes_prepare_req(struct crypto_engine *engine,
419430 void *areq)
420431 {
421
- struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
422
- struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
423
- crypto_ablkcipher_reqtfm(req));
424
- struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
432
+ struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
433
+ struct omap_aes_ctx *ctx = crypto_skcipher_ctx(
434
+ crypto_skcipher_reqtfm(req));
435
+ struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
425436 struct omap_aes_dev *dd = rctx->dd;
426437 int ret;
427438 u16 flags;
....@@ -431,8 +442,8 @@
431442
432443 /* assign new request to device */
433444 dd->req = req;
434
- dd->total = req->nbytes;
435
- dd->total_save = req->nbytes;
445
+ dd->total = req->cryptlen;
446
+ dd->total_save = req->cryptlen;
436447 dd->in_sg = req->src;
437448 dd->out_sg = req->dst;
438449 dd->orig_out = req->dst;
....@@ -473,14 +484,22 @@
473484 static int omap_aes_crypt_req(struct crypto_engine *engine,
474485 void *areq)
475486 {
476
- struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
477
- struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
487
+ struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
488
+ struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
478489 struct omap_aes_dev *dd = rctx->dd;
479490
480491 if (!dd)
481492 return -ENODEV;
482493
483494 return omap_aes_crypt_dma_start(dd);
495
+}
496
+
497
+static void omap_aes_copy_ivout(struct omap_aes_dev *dd, u8 *ivbuf)
498
+{
499
+ int i;
500
+
501
+ for (i = 0; i < 4; i++)
502
+ ((u32 *)ivbuf)[i] = omap_aes_read(dd, AES_REG_IV(dd, i));
484503 }
485504
486505 static void omap_aes_done_task(unsigned long data)
....@@ -498,44 +517,49 @@
498517 omap_aes_crypt_dma_stop(dd);
499518 }
500519
501
- omap_crypto_cleanup(dd->in_sgl, NULL, 0, dd->total_save,
520
+ omap_crypto_cleanup(dd->in_sg, NULL, 0, dd->total_save,
502521 FLAGS_IN_DATA_ST_SHIFT, dd->flags);
503522
504
- omap_crypto_cleanup(&dd->out_sgl, dd->orig_out, 0, dd->total_save,
523
+ omap_crypto_cleanup(dd->out_sg, dd->orig_out, 0, dd->total_save,
505524 FLAGS_OUT_DATA_ST_SHIFT, dd->flags);
525
+
526
+ /* Update IV output */
527
+ if (dd->flags & (FLAGS_CBC | FLAGS_CTR))
528
+ omap_aes_copy_ivout(dd, dd->req->iv);
506529
507530 omap_aes_finish_req(dd, 0);
508531
509532 pr_debug("exit\n");
510533 }
511534
512
-static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
535
+static int omap_aes_crypt(struct skcipher_request *req, unsigned long mode)
513536 {
514
- struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
515
- crypto_ablkcipher_reqtfm(req));
516
- struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
537
+ struct omap_aes_ctx *ctx = crypto_skcipher_ctx(
538
+ crypto_skcipher_reqtfm(req));
539
+ struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
517540 struct omap_aes_dev *dd;
518541 int ret;
519542
520
- pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
543
+ if ((req->cryptlen % AES_BLOCK_SIZE) && !(mode & FLAGS_CTR))
544
+ return -EINVAL;
545
+
546
+ pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->cryptlen,
521547 !!(mode & FLAGS_ENCRYPT),
522548 !!(mode & FLAGS_CBC));
523549
524
- if (req->nbytes < aes_fallback_sz) {
525
- SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
526
-
527
- skcipher_request_set_tfm(subreq, ctx->fallback);
528
- skcipher_request_set_callback(subreq, req->base.flags, NULL,
529
- NULL);
530
- skcipher_request_set_crypt(subreq, req->src, req->dst,
531
- req->nbytes, req->info);
550
+ if (req->cryptlen < aes_fallback_sz) {
551
+ skcipher_request_set_tfm(&rctx->fallback_req, ctx->fallback);
552
+ skcipher_request_set_callback(&rctx->fallback_req,
553
+ req->base.flags,
554
+ req->base.complete,
555
+ req->base.data);
556
+ skcipher_request_set_crypt(&rctx->fallback_req, req->src,
557
+ req->dst, req->cryptlen, req->iv);
532558
533559 if (mode & FLAGS_ENCRYPT)
534
- ret = crypto_skcipher_encrypt(subreq);
560
+ ret = crypto_skcipher_encrypt(&rctx->fallback_req);
535561 else
536
- ret = crypto_skcipher_decrypt(subreq);
537
-
538
- skcipher_request_zero(subreq);
562
+ ret = crypto_skcipher_decrypt(&rctx->fallback_req);
539563 return ret;
540564 }
541565 dd = omap_aes_find_dev(rctx);
....@@ -549,10 +573,10 @@
549573
550574 /* ********************** ALG API ************************************ */
551575
552
-static int omap_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
576
+static int omap_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
553577 unsigned int keylen)
554578 {
555
- struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
579
+ struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
556580 int ret;
557581
558582 if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
....@@ -575,32 +599,32 @@
575599 return 0;
576600 }
577601
578
-static int omap_aes_ecb_encrypt(struct ablkcipher_request *req)
602
+static int omap_aes_ecb_encrypt(struct skcipher_request *req)
579603 {
580604 return omap_aes_crypt(req, FLAGS_ENCRYPT);
581605 }
582606
583
-static int omap_aes_ecb_decrypt(struct ablkcipher_request *req)
607
+static int omap_aes_ecb_decrypt(struct skcipher_request *req)
584608 {
585609 return omap_aes_crypt(req, 0);
586610 }
587611
588
-static int omap_aes_cbc_encrypt(struct ablkcipher_request *req)
612
+static int omap_aes_cbc_encrypt(struct skcipher_request *req)
589613 {
590614 return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
591615 }
592616
593
-static int omap_aes_cbc_decrypt(struct ablkcipher_request *req)
617
+static int omap_aes_cbc_decrypt(struct skcipher_request *req)
594618 {
595619 return omap_aes_crypt(req, FLAGS_CBC);
596620 }
597621
598
-static int omap_aes_ctr_encrypt(struct ablkcipher_request *req)
622
+static int omap_aes_ctr_encrypt(struct skcipher_request *req)
599623 {
600624 return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CTR);
601625 }
602626
603
-static int omap_aes_ctr_decrypt(struct ablkcipher_request *req)
627
+static int omap_aes_ctr_decrypt(struct skcipher_request *req)
604628 {
605629 return omap_aes_crypt(req, FLAGS_CTR);
606630 }
....@@ -610,20 +634,20 @@
610634 static int omap_aes_crypt_req(struct crypto_engine *engine,
611635 void *req);
612636
613
-static int omap_aes_cra_init(struct crypto_tfm *tfm)
637
+static int omap_aes_init_tfm(struct crypto_skcipher *tfm)
614638 {
615
- const char *name = crypto_tfm_alg_name(tfm);
616
- const u32 flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK;
617
- struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm);
639
+ const char *name = crypto_tfm_alg_name(&tfm->base);
640
+ struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
618641 struct crypto_skcipher *blk;
619642
620
- blk = crypto_alloc_skcipher(name, 0, flags);
643
+ blk = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK);
621644 if (IS_ERR(blk))
622645 return PTR_ERR(blk);
623646
624647 ctx->fallback = blk;
625648
626
- tfm->crt_ablkcipher.reqsize = sizeof(struct omap_aes_reqctx);
649
+ crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_aes_reqctx) +
650
+ crypto_skcipher_reqsize(blk));
627651
628652 ctx->enginectx.op.prepare_request = omap_aes_prepare_req;
629653 ctx->enginectx.op.unprepare_request = NULL;
....@@ -632,39 +656,9 @@
632656 return 0;
633657 }
634658
635
-static int omap_aes_gcm_cra_init(struct crypto_aead *tfm)
659
+static void omap_aes_exit_tfm(struct crypto_skcipher *tfm)
636660 {
637
- struct omap_aes_dev *dd = NULL;
638
- struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm);
639
- int err;
640
-
641
- /* Find AES device, currently picks the first device */
642
- spin_lock_bh(&list_lock);
643
- list_for_each_entry(dd, &dev_list, list) {
644
- break;
645
- }
646
- spin_unlock_bh(&list_lock);
647
-
648
- err = pm_runtime_get_sync(dd->dev);
649
- if (err < 0) {
650
- dev_err(dd->dev, "%s: failed to get_sync(%d)\n",
651
- __func__, err);
652
- return err;
653
- }
654
-
655
- tfm->reqsize = sizeof(struct omap_aes_reqctx);
656
- ctx->ctr = crypto_alloc_skcipher("ecb(aes)", 0, 0);
657
- if (IS_ERR(ctx->ctr)) {
658
- pr_warn("could not load aes driver for encrypting IV\n");
659
- return PTR_ERR(ctx->ctr);
660
- }
661
-
662
- return 0;
663
-}
664
-
665
-static void omap_aes_cra_exit(struct crypto_tfm *tfm)
666
-{
667
- struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm);
661
+ struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
668662
669663 if (ctx->fallback)
670664 crypto_free_skcipher(ctx->fallback);
....@@ -672,91 +666,71 @@
672666 ctx->fallback = NULL;
673667 }
674668
675
-static void omap_aes_gcm_cra_exit(struct crypto_aead *tfm)
676
-{
677
- struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm);
678
-
679
- omap_aes_cra_exit(crypto_aead_tfm(tfm));
680
-
681
- if (ctx->ctr)
682
- crypto_free_skcipher(ctx->ctr);
683
-}
684
-
685669 /* ********************** ALGS ************************************ */
686670
687
-static struct crypto_alg algs_ecb_cbc[] = {
671
+static struct skcipher_alg algs_ecb_cbc[] = {
688672 {
689
- .cra_name = "ecb(aes)",
690
- .cra_driver_name = "ecb-aes-omap",
691
- .cra_priority = 300,
692
- .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
693
- CRYPTO_ALG_KERN_DRIVER_ONLY |
694
- CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
695
- .cra_blocksize = AES_BLOCK_SIZE,
696
- .cra_ctxsize = sizeof(struct omap_aes_ctx),
697
- .cra_alignmask = 0,
698
- .cra_type = &crypto_ablkcipher_type,
699
- .cra_module = THIS_MODULE,
700
- .cra_init = omap_aes_cra_init,
701
- .cra_exit = omap_aes_cra_exit,
702
- .cra_u.ablkcipher = {
703
- .min_keysize = AES_MIN_KEY_SIZE,
704
- .max_keysize = AES_MAX_KEY_SIZE,
705
- .setkey = omap_aes_setkey,
706
- .encrypt = omap_aes_ecb_encrypt,
707
- .decrypt = omap_aes_ecb_decrypt,
708
- }
673
+ .base.cra_name = "ecb(aes)",
674
+ .base.cra_driver_name = "ecb-aes-omap",
675
+ .base.cra_priority = 300,
676
+ .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY |
677
+ CRYPTO_ALG_ASYNC |
678
+ CRYPTO_ALG_NEED_FALLBACK,
679
+ .base.cra_blocksize = AES_BLOCK_SIZE,
680
+ .base.cra_ctxsize = sizeof(struct omap_aes_ctx),
681
+ .base.cra_module = THIS_MODULE,
682
+
683
+ .min_keysize = AES_MIN_KEY_SIZE,
684
+ .max_keysize = AES_MAX_KEY_SIZE,
685
+ .setkey = omap_aes_setkey,
686
+ .encrypt = omap_aes_ecb_encrypt,
687
+ .decrypt = omap_aes_ecb_decrypt,
688
+ .init = omap_aes_init_tfm,
689
+ .exit = omap_aes_exit_tfm,
709690 },
710691 {
711
- .cra_name = "cbc(aes)",
712
- .cra_driver_name = "cbc-aes-omap",
713
- .cra_priority = 300,
714
- .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
715
- CRYPTO_ALG_KERN_DRIVER_ONLY |
716
- CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
717
- .cra_blocksize = AES_BLOCK_SIZE,
718
- .cra_ctxsize = sizeof(struct omap_aes_ctx),
719
- .cra_alignmask = 0,
720
- .cra_type = &crypto_ablkcipher_type,
721
- .cra_module = THIS_MODULE,
722
- .cra_init = omap_aes_cra_init,
723
- .cra_exit = omap_aes_cra_exit,
724
- .cra_u.ablkcipher = {
725
- .min_keysize = AES_MIN_KEY_SIZE,
726
- .max_keysize = AES_MAX_KEY_SIZE,
727
- .ivsize = AES_BLOCK_SIZE,
728
- .setkey = omap_aes_setkey,
729
- .encrypt = omap_aes_cbc_encrypt,
730
- .decrypt = omap_aes_cbc_decrypt,
731
- }
692
+ .base.cra_name = "cbc(aes)",
693
+ .base.cra_driver_name = "cbc-aes-omap",
694
+ .base.cra_priority = 300,
695
+ .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY |
696
+ CRYPTO_ALG_ASYNC |
697
+ CRYPTO_ALG_NEED_FALLBACK,
698
+ .base.cra_blocksize = AES_BLOCK_SIZE,
699
+ .base.cra_ctxsize = sizeof(struct omap_aes_ctx),
700
+ .base.cra_module = THIS_MODULE,
701
+
702
+ .min_keysize = AES_MIN_KEY_SIZE,
703
+ .max_keysize = AES_MAX_KEY_SIZE,
704
+ .ivsize = AES_BLOCK_SIZE,
705
+ .setkey = omap_aes_setkey,
706
+ .encrypt = omap_aes_cbc_encrypt,
707
+ .decrypt = omap_aes_cbc_decrypt,
708
+ .init = omap_aes_init_tfm,
709
+ .exit = omap_aes_exit_tfm,
732710 }
733711 };
734712
735
-static struct crypto_alg algs_ctr[] = {
713
+static struct skcipher_alg algs_ctr[] = {
736714 {
737
- .cra_name = "ctr(aes)",
738
- .cra_driver_name = "ctr-aes-omap",
739
- .cra_priority = 300,
740
- .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
741
- CRYPTO_ALG_KERN_DRIVER_ONLY |
742
- CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
743
- .cra_blocksize = AES_BLOCK_SIZE,
744
- .cra_ctxsize = sizeof(struct omap_aes_ctx),
745
- .cra_alignmask = 0,
746
- .cra_type = &crypto_ablkcipher_type,
747
- .cra_module = THIS_MODULE,
748
- .cra_init = omap_aes_cra_init,
749
- .cra_exit = omap_aes_cra_exit,
750
- .cra_u.ablkcipher = {
751
- .min_keysize = AES_MIN_KEY_SIZE,
752
- .max_keysize = AES_MAX_KEY_SIZE,
753
- .geniv = "eseqiv",
754
- .ivsize = AES_BLOCK_SIZE,
755
- .setkey = omap_aes_setkey,
756
- .encrypt = omap_aes_ctr_encrypt,
757
- .decrypt = omap_aes_ctr_decrypt,
758
- }
759
-} ,
715
+ .base.cra_name = "ctr(aes)",
716
+ .base.cra_driver_name = "ctr-aes-omap",
717
+ .base.cra_priority = 300,
718
+ .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY |
719
+ CRYPTO_ALG_ASYNC |
720
+ CRYPTO_ALG_NEED_FALLBACK,
721
+ .base.cra_blocksize = 1,
722
+ .base.cra_ctxsize = sizeof(struct omap_aes_ctx),
723
+ .base.cra_module = THIS_MODULE,
724
+
725
+ .min_keysize = AES_MIN_KEY_SIZE,
726
+ .max_keysize = AES_MAX_KEY_SIZE,
727
+ .ivsize = AES_BLOCK_SIZE,
728
+ .setkey = omap_aes_setkey,
729
+ .encrypt = omap_aes_ctr_encrypt,
730
+ .decrypt = omap_aes_ctr_decrypt,
731
+ .init = omap_aes_init_tfm,
732
+ .exit = omap_aes_exit_tfm,
733
+}
760734 };
761735
762736 static struct omap_aes_algs_info omap_aes_algs_info_ecb_cbc[] = {
....@@ -775,15 +749,15 @@
775749 .cra_flags = CRYPTO_ALG_ASYNC |
776750 CRYPTO_ALG_KERN_DRIVER_ONLY,
777751 .cra_blocksize = 1,
778
- .cra_ctxsize = sizeof(struct omap_aes_ctx),
752
+ .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx),
779753 .cra_alignmask = 0xf,
780754 .cra_module = THIS_MODULE,
781755 },
782756 .init = omap_aes_gcm_cra_init,
783
- .exit = omap_aes_gcm_cra_exit,
784757 .ivsize = GCM_AES_IV_SIZE,
785758 .maxauthsize = AES_BLOCK_SIZE,
786759 .setkey = omap_aes_gcm_setkey,
760
+ .setauthsize = omap_aes_gcm_setauthsize,
787761 .encrypt = omap_aes_gcm_encrypt,
788762 .decrypt = omap_aes_gcm_decrypt,
789763 },
....@@ -795,15 +769,15 @@
795769 .cra_flags = CRYPTO_ALG_ASYNC |
796770 CRYPTO_ALG_KERN_DRIVER_ONLY,
797771 .cra_blocksize = 1,
798
- .cra_ctxsize = sizeof(struct omap_aes_ctx),
772
+ .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx),
799773 .cra_alignmask = 0xf,
800774 .cra_module = THIS_MODULE,
801775 },
802776 .init = omap_aes_gcm_cra_init,
803
- .exit = omap_aes_gcm_cra_exit,
804777 .maxauthsize = AES_BLOCK_SIZE,
805778 .ivsize = GCM_RFC4106_IV_SIZE,
806779 .setkey = omap_aes_4106gcm_setkey,
780
+ .setauthsize = omap_aes_4106gcm_setauthsize,
807781 .encrypt = omap_aes_4106gcm_encrypt,
808782 .decrypt = omap_aes_4106gcm_decrypt,
809783 },
....@@ -1127,7 +1101,7 @@
11271101 {
11281102 struct device *dev = &pdev->dev;
11291103 struct omap_aes_dev *dd;
1130
- struct crypto_alg *algp;
1104
+ struct skcipher_alg *algp;
11311105 struct aead_alg *aalg;
11321106 struct resource res;
11331107 int err = -ENOMEM, i, j, irq = -1;
....@@ -1159,7 +1133,7 @@
11591133 pm_runtime_set_autosuspend_delay(dev, DEFAULT_AUTOSUSPEND_DELAY);
11601134
11611135 pm_runtime_enable(dev);
1162
- err = pm_runtime_get_sync(dev);
1136
+ err = pm_runtime_resume_and_get(dev);
11631137 if (err < 0) {
11641138 dev_err(dev, "%s: failed to get_sync(%d)\n",
11651139 __func__, err);
....@@ -1186,7 +1160,6 @@
11861160
11871161 irq = platform_get_irq(pdev, 0);
11881162 if (irq < 0) {
1189
- dev_err(dev, "can't get IRQ resource\n");
11901163 err = irq;
11911164 goto err_irq;
11921165 }
....@@ -1202,9 +1175,9 @@
12021175 spin_lock_init(&dd->lock);
12031176
12041177 INIT_LIST_HEAD(&dd->list);
1205
- spin_lock(&list_lock);
1178
+ spin_lock_bh(&list_lock);
12061179 list_add_tail(&dd->list, &dev_list);
1207
- spin_unlock(&list_lock);
1180
+ spin_unlock_bh(&list_lock);
12081181
12091182 /* Initialize crypto engine */
12101183 dd->engine = crypto_engine_alloc_init(dev, 1);
....@@ -1222,10 +1195,9 @@
12221195 for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
12231196 algp = &dd->pdata->algs_info[i].algs_list[j];
12241197
1225
- pr_debug("reg alg: %s\n", algp->cra_name);
1226
- INIT_LIST_HEAD(&algp->cra_list);
1198
+ pr_debug("reg alg: %s\n", algp->base.cra_name);
12271199
1228
- err = crypto_register_alg(algp);
1200
+ err = crypto_register_skcipher(algp);
12291201 if (err)
12301202 goto err_algs;
12311203
....@@ -1238,10 +1210,8 @@
12381210 !dd->pdata->aead_algs_info->registered) {
12391211 for (i = 0; i < dd->pdata->aead_algs_info->size; i++) {
12401212 aalg = &dd->pdata->aead_algs_info->algs_list[i];
1241
- algp = &aalg->base;
12421213
1243
- pr_debug("reg alg: %s\n", algp->cra_name);
1244
- INIT_LIST_HEAD(&algp->cra_list);
1214
+ pr_debug("reg alg: %s\n", aalg->base.cra_name);
12451215
12461216 err = crypto_register_aead(aalg);
12471217 if (err)
....@@ -1266,7 +1236,7 @@
12661236 err_algs:
12671237 for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
12681238 for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1269
- crypto_unregister_alg(
1239
+ crypto_unregister_skcipher(
12701240 &dd->pdata->algs_info[i].algs_list[j]);
12711241
12721242 err_engine:
....@@ -1294,18 +1264,22 @@
12941264 if (!dd)
12951265 return -ENODEV;
12961266
1297
- spin_lock(&list_lock);
1267
+ spin_lock_bh(&list_lock);
12981268 list_del(&dd->list);
1299
- spin_unlock(&list_lock);
1269
+ spin_unlock_bh(&list_lock);
13001270
13011271 for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1302
- for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1303
- crypto_unregister_alg(
1272
+ for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) {
1273
+ crypto_unregister_skcipher(
13041274 &dd->pdata->algs_info[i].algs_list[j]);
1275
+ dd->pdata->algs_info[i].registered--;
1276
+ }
13051277
1306
- for (i = dd->pdata->aead_algs_info->size - 1; i >= 0; i--) {
1278
+ for (i = dd->pdata->aead_algs_info->registered - 1; i >= 0; i--) {
13071279 aalg = &dd->pdata->aead_algs_info->algs_list[i];
13081280 crypto_unregister_aead(aalg);
1281
+ dd->pdata->aead_algs_info->registered--;
1282
+
13091283 }
13101284
13111285 crypto_engine_exit(dd->engine);
....@@ -1313,7 +1287,8 @@
13131287 tasklet_kill(&dd->done_task);
13141288 omap_aes_dma_cleanup(dd);
13151289 pm_runtime_disable(dd->dev);
1316
- dd = NULL;
1290
+
1291
+ sysfs_remove_group(&dd->dev->kobj, &omap_aes_attr_group);
13171292
13181293 return 0;
13191294 }