.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Cryptographic API. |
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3 | 4 | * |
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.. | .. |
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6 | 7 | * Copyright (c) 2010 Nokia Corporation |
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7 | 8 | * Author: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> |
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8 | 9 | * Copyright (c) 2011 Texas Instruments Incorporated |
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9 | | - * |
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10 | | - * This program is free software; you can redistribute it and/or modify |
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11 | | - * it under the terms of the GNU General Public License version 2 as published |
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12 | | - * by the Free Software Foundation. |
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13 | | - * |
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14 | 10 | */ |
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15 | 11 | |
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16 | 12 | #define pr_fmt(fmt) "%20s: " fmt, __func__ |
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.. | .. |
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107 | 103 | dd->err = 0; |
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108 | 104 | } |
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109 | 105 | |
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110 | | - err = pm_runtime_get_sync(dd->dev); |
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| 106 | + err = pm_runtime_resume_and_get(dd->dev); |
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111 | 107 | if (err < 0) { |
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112 | 108 | dev_err(dd->dev, "failed to get sync: %d\n", err); |
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113 | 109 | return err; |
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.. | .. |
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143 | 139 | |
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144 | 140 | for (i = 0; i < key32; i++) { |
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145 | 141 | omap_aes_write(dd, AES_REG_KEY(dd, i), |
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146 | | - __le32_to_cpu(dd->ctx->key[i])); |
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| 142 | + (__force u32)cpu_to_le32(dd->ctx->key[i])); |
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147 | 143 | } |
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148 | 144 | |
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149 | | - if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->info) |
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150 | | - omap_aes_write_n(dd, AES_REG_IV(dd, 0), dd->req->info, 4); |
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| 145 | + if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->iv) |
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| 146 | + omap_aes_write_n(dd, AES_REG_IV(dd, 0), (void *)dd->req->iv, 4); |
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151 | 147 | |
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152 | 148 | if ((dd->flags & (FLAGS_GCM)) && dd->aead_req->iv) { |
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153 | 149 | rctx = aead_request_ctx(dd->aead_req); |
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.. | .. |
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273 | 269 | struct scatterlist *out_sg, |
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274 | 270 | int in_sg_len, int out_sg_len) |
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275 | 271 | { |
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276 | | - struct dma_async_tx_descriptor *tx_in, *tx_out; |
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| 272 | + struct dma_async_tx_descriptor *tx_in, *tx_out = NULL, *cb_desc; |
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277 | 273 | struct dma_slave_config cfg; |
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278 | 274 | int ret; |
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279 | 275 | |
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280 | 276 | if (dd->pio_only) { |
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281 | 277 | scatterwalk_start(&dd->in_walk, dd->in_sg); |
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282 | | - scatterwalk_start(&dd->out_walk, dd->out_sg); |
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| 278 | + if (out_sg_len) |
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| 279 | + scatterwalk_start(&dd->out_walk, dd->out_sg); |
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283 | 280 | |
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284 | 281 | /* Enable DATAIN interrupt and let it take |
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285 | 282 | care of the rest */ |
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.. | .. |
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316 | 313 | |
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317 | 314 | /* No callback necessary */ |
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318 | 315 | tx_in->callback_param = dd; |
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| 316 | + tx_in->callback = NULL; |
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319 | 317 | |
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320 | 318 | /* OUT */ |
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321 | | - ret = dmaengine_slave_config(dd->dma_lch_out, &cfg); |
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322 | | - if (ret) { |
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323 | | - dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n", |
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324 | | - ret); |
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325 | | - return ret; |
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326 | | - } |
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| 319 | + if (out_sg_len) { |
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| 320 | + ret = dmaengine_slave_config(dd->dma_lch_out, &cfg); |
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| 321 | + if (ret) { |
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| 322 | + dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n", |
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| 323 | + ret); |
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| 324 | + return ret; |
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| 325 | + } |
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327 | 326 | |
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328 | | - tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg, out_sg_len, |
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329 | | - DMA_DEV_TO_MEM, |
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330 | | - DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
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331 | | - if (!tx_out) { |
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332 | | - dev_err(dd->dev, "OUT prep_slave_sg() failed\n"); |
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333 | | - return -EINVAL; |
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| 327 | + tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg, |
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| 328 | + out_sg_len, |
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| 329 | + DMA_DEV_TO_MEM, |
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| 330 | + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
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| 331 | + if (!tx_out) { |
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| 332 | + dev_err(dd->dev, "OUT prep_slave_sg() failed\n"); |
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| 333 | + return -EINVAL; |
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| 334 | + } |
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| 335 | + |
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| 336 | + cb_desc = tx_out; |
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| 337 | + } else { |
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| 338 | + cb_desc = tx_in; |
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334 | 339 | } |
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335 | 340 | |
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336 | 341 | if (dd->flags & FLAGS_GCM) |
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337 | | - tx_out->callback = omap_aes_gcm_dma_out_callback; |
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| 342 | + cb_desc->callback = omap_aes_gcm_dma_out_callback; |
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338 | 343 | else |
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339 | | - tx_out->callback = omap_aes_dma_out_callback; |
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340 | | - tx_out->callback_param = dd; |
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| 344 | + cb_desc->callback = omap_aes_dma_out_callback; |
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| 345 | + cb_desc->callback_param = dd; |
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| 346 | + |
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341 | 347 | |
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342 | 348 | dmaengine_submit(tx_in); |
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343 | | - dmaengine_submit(tx_out); |
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| 349 | + if (tx_out) |
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| 350 | + dmaengine_submit(tx_out); |
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344 | 351 | |
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345 | 352 | dma_async_issue_pending(dd->dma_lch_in); |
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346 | | - dma_async_issue_pending(dd->dma_lch_out); |
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| 353 | + if (out_sg_len) |
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| 354 | + dma_async_issue_pending(dd->dma_lch_out); |
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347 | 355 | |
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348 | 356 | /* start DMA */ |
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349 | 357 | dd->pdata->trigger(dd, dd->total); |
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.. | .. |
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355 | 363 | { |
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356 | 364 | int err; |
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357 | 365 | |
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358 | | - pr_debug("total: %d\n", dd->total); |
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| 366 | + pr_debug("total: %zu\n", dd->total); |
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359 | 367 | |
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360 | 368 | if (!dd->pio_only) { |
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361 | 369 | err = dma_map_sg(dd->dev, dd->in_sg, dd->in_sg_len, |
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.. | .. |
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365 | 373 | return -EINVAL; |
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366 | 374 | } |
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367 | 375 | |
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368 | | - err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len, |
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369 | | - DMA_FROM_DEVICE); |
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370 | | - if (!err) { |
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371 | | - dev_err(dd->dev, "dma_map_sg() error\n"); |
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372 | | - return -EINVAL; |
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| 376 | + if (dd->out_sg_len) { |
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| 377 | + err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len, |
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| 378 | + DMA_FROM_DEVICE); |
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| 379 | + if (!err) { |
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| 380 | + dev_err(dd->dev, "dma_map_sg() error\n"); |
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| 381 | + return -EINVAL; |
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| 382 | + } |
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373 | 383 | } |
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374 | 384 | } |
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375 | 385 | |
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.. | .. |
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377 | 387 | dd->out_sg_len); |
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378 | 388 | if (err && !dd->pio_only) { |
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379 | 389 | dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE); |
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380 | | - dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len, |
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381 | | - DMA_FROM_DEVICE); |
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| 390 | + if (dd->out_sg_len) |
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| 391 | + dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len, |
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| 392 | + DMA_FROM_DEVICE); |
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382 | 393 | } |
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383 | 394 | |
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384 | 395 | return err; |
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.. | .. |
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386 | 397 | |
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387 | 398 | static void omap_aes_finish_req(struct omap_aes_dev *dd, int err) |
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388 | 399 | { |
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389 | | - struct ablkcipher_request *req = dd->req; |
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| 400 | + struct skcipher_request *req = dd->req; |
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390 | 401 | |
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391 | 402 | pr_debug("err: %d\n", err); |
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392 | 403 | |
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393 | | - crypto_finalize_ablkcipher_request(dd->engine, req, err); |
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| 404 | + crypto_finalize_skcipher_request(dd->engine, req, err); |
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394 | 405 | |
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395 | 406 | pm_runtime_mark_last_busy(dd->dev); |
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396 | 407 | pm_runtime_put_autosuspend(dd->dev); |
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.. | .. |
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398 | 409 | |
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399 | 410 | int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd) |
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400 | 411 | { |
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401 | | - pr_debug("total: %d\n", dd->total); |
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| 412 | + pr_debug("total: %zu\n", dd->total); |
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402 | 413 | |
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403 | 414 | omap_aes_dma_stop(dd); |
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404 | 415 | |
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.. | .. |
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407 | 418 | } |
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408 | 419 | |
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409 | 420 | static int omap_aes_handle_queue(struct omap_aes_dev *dd, |
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410 | | - struct ablkcipher_request *req) |
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| 421 | + struct skcipher_request *req) |
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411 | 422 | { |
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412 | 423 | if (req) |
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413 | | - return crypto_transfer_ablkcipher_request_to_engine(dd->engine, req); |
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| 424 | + return crypto_transfer_skcipher_request_to_engine(dd->engine, req); |
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414 | 425 | |
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415 | 426 | return 0; |
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416 | 427 | } |
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.. | .. |
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418 | 429 | static int omap_aes_prepare_req(struct crypto_engine *engine, |
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419 | 430 | void *areq) |
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420 | 431 | { |
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421 | | - struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base); |
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422 | | - struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx( |
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423 | | - crypto_ablkcipher_reqtfm(req)); |
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424 | | - struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req); |
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| 432 | + struct skcipher_request *req = container_of(areq, struct skcipher_request, base); |
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| 433 | + struct omap_aes_ctx *ctx = crypto_skcipher_ctx( |
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| 434 | + crypto_skcipher_reqtfm(req)); |
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| 435 | + struct omap_aes_reqctx *rctx = skcipher_request_ctx(req); |
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425 | 436 | struct omap_aes_dev *dd = rctx->dd; |
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426 | 437 | int ret; |
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427 | 438 | u16 flags; |
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.. | .. |
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431 | 442 | |
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432 | 443 | /* assign new request to device */ |
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433 | 444 | dd->req = req; |
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434 | | - dd->total = req->nbytes; |
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435 | | - dd->total_save = req->nbytes; |
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| 445 | + dd->total = req->cryptlen; |
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| 446 | + dd->total_save = req->cryptlen; |
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436 | 447 | dd->in_sg = req->src; |
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437 | 448 | dd->out_sg = req->dst; |
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438 | 449 | dd->orig_out = req->dst; |
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.. | .. |
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473 | 484 | static int omap_aes_crypt_req(struct crypto_engine *engine, |
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474 | 485 | void *areq) |
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475 | 486 | { |
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476 | | - struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base); |
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477 | | - struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req); |
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| 487 | + struct skcipher_request *req = container_of(areq, struct skcipher_request, base); |
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| 488 | + struct omap_aes_reqctx *rctx = skcipher_request_ctx(req); |
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478 | 489 | struct omap_aes_dev *dd = rctx->dd; |
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479 | 490 | |
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480 | 491 | if (!dd) |
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481 | 492 | return -ENODEV; |
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482 | 493 | |
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483 | 494 | return omap_aes_crypt_dma_start(dd); |
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| 495 | +} |
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| 496 | + |
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| 497 | +static void omap_aes_copy_ivout(struct omap_aes_dev *dd, u8 *ivbuf) |
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| 498 | +{ |
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| 499 | + int i; |
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| 500 | + |
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| 501 | + for (i = 0; i < 4; i++) |
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| 502 | + ((u32 *)ivbuf)[i] = omap_aes_read(dd, AES_REG_IV(dd, i)); |
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484 | 503 | } |
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485 | 504 | |
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486 | 505 | static void omap_aes_done_task(unsigned long data) |
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.. | .. |
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498 | 517 | omap_aes_crypt_dma_stop(dd); |
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499 | 518 | } |
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500 | 519 | |
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501 | | - omap_crypto_cleanup(dd->in_sgl, NULL, 0, dd->total_save, |
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| 520 | + omap_crypto_cleanup(dd->in_sg, NULL, 0, dd->total_save, |
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502 | 521 | FLAGS_IN_DATA_ST_SHIFT, dd->flags); |
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503 | 522 | |
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504 | | - omap_crypto_cleanup(&dd->out_sgl, dd->orig_out, 0, dd->total_save, |
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| 523 | + omap_crypto_cleanup(dd->out_sg, dd->orig_out, 0, dd->total_save, |
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505 | 524 | FLAGS_OUT_DATA_ST_SHIFT, dd->flags); |
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| 525 | + |
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| 526 | + /* Update IV output */ |
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| 527 | + if (dd->flags & (FLAGS_CBC | FLAGS_CTR)) |
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| 528 | + omap_aes_copy_ivout(dd, dd->req->iv); |
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506 | 529 | |
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507 | 530 | omap_aes_finish_req(dd, 0); |
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508 | 531 | |
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509 | 532 | pr_debug("exit\n"); |
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510 | 533 | } |
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511 | 534 | |
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512 | | -static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode) |
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| 535 | +static int omap_aes_crypt(struct skcipher_request *req, unsigned long mode) |
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513 | 536 | { |
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514 | | - struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx( |
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515 | | - crypto_ablkcipher_reqtfm(req)); |
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516 | | - struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req); |
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| 537 | + struct omap_aes_ctx *ctx = crypto_skcipher_ctx( |
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| 538 | + crypto_skcipher_reqtfm(req)); |
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| 539 | + struct omap_aes_reqctx *rctx = skcipher_request_ctx(req); |
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517 | 540 | struct omap_aes_dev *dd; |
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518 | 541 | int ret; |
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519 | 542 | |
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520 | | - pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes, |
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| 543 | + if ((req->cryptlen % AES_BLOCK_SIZE) && !(mode & FLAGS_CTR)) |
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| 544 | + return -EINVAL; |
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| 545 | + |
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| 546 | + pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->cryptlen, |
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521 | 547 | !!(mode & FLAGS_ENCRYPT), |
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522 | 548 | !!(mode & FLAGS_CBC)); |
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523 | 549 | |
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524 | | - if (req->nbytes < aes_fallback_sz) { |
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525 | | - SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback); |
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526 | | - |
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527 | | - skcipher_request_set_tfm(subreq, ctx->fallback); |
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528 | | - skcipher_request_set_callback(subreq, req->base.flags, NULL, |
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529 | | - NULL); |
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530 | | - skcipher_request_set_crypt(subreq, req->src, req->dst, |
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531 | | - req->nbytes, req->info); |
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| 550 | + if (req->cryptlen < aes_fallback_sz) { |
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| 551 | + skcipher_request_set_tfm(&rctx->fallback_req, ctx->fallback); |
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| 552 | + skcipher_request_set_callback(&rctx->fallback_req, |
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| 553 | + req->base.flags, |
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| 554 | + req->base.complete, |
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| 555 | + req->base.data); |
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| 556 | + skcipher_request_set_crypt(&rctx->fallback_req, req->src, |
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| 557 | + req->dst, req->cryptlen, req->iv); |
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532 | 558 | |
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533 | 559 | if (mode & FLAGS_ENCRYPT) |
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534 | | - ret = crypto_skcipher_encrypt(subreq); |
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| 560 | + ret = crypto_skcipher_encrypt(&rctx->fallback_req); |
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535 | 561 | else |
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536 | | - ret = crypto_skcipher_decrypt(subreq); |
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537 | | - |
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538 | | - skcipher_request_zero(subreq); |
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| 562 | + ret = crypto_skcipher_decrypt(&rctx->fallback_req); |
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539 | 563 | return ret; |
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540 | 564 | } |
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541 | 565 | dd = omap_aes_find_dev(rctx); |
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.. | .. |
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549 | 573 | |
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550 | 574 | /* ********************** ALG API ************************************ */ |
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551 | 575 | |
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552 | | -static int omap_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key, |
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| 576 | +static int omap_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, |
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553 | 577 | unsigned int keylen) |
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554 | 578 | { |
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555 | | - struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm); |
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| 579 | + struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm); |
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556 | 580 | int ret; |
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557 | 581 | |
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558 | 582 | if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 && |
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.. | .. |
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575 | 599 | return 0; |
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576 | 600 | } |
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577 | 601 | |
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578 | | -static int omap_aes_ecb_encrypt(struct ablkcipher_request *req) |
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| 602 | +static int omap_aes_ecb_encrypt(struct skcipher_request *req) |
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579 | 603 | { |
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580 | 604 | return omap_aes_crypt(req, FLAGS_ENCRYPT); |
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581 | 605 | } |
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582 | 606 | |
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583 | | -static int omap_aes_ecb_decrypt(struct ablkcipher_request *req) |
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| 607 | +static int omap_aes_ecb_decrypt(struct skcipher_request *req) |
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584 | 608 | { |
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585 | 609 | return omap_aes_crypt(req, 0); |
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586 | 610 | } |
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587 | 611 | |
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588 | | -static int omap_aes_cbc_encrypt(struct ablkcipher_request *req) |
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| 612 | +static int omap_aes_cbc_encrypt(struct skcipher_request *req) |
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589 | 613 | { |
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590 | 614 | return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC); |
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591 | 615 | } |
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592 | 616 | |
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593 | | -static int omap_aes_cbc_decrypt(struct ablkcipher_request *req) |
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| 617 | +static int omap_aes_cbc_decrypt(struct skcipher_request *req) |
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594 | 618 | { |
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595 | 619 | return omap_aes_crypt(req, FLAGS_CBC); |
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596 | 620 | } |
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597 | 621 | |
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598 | | -static int omap_aes_ctr_encrypt(struct ablkcipher_request *req) |
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| 622 | +static int omap_aes_ctr_encrypt(struct skcipher_request *req) |
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599 | 623 | { |
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600 | 624 | return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CTR); |
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601 | 625 | } |
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602 | 626 | |
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603 | | -static int omap_aes_ctr_decrypt(struct ablkcipher_request *req) |
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| 627 | +static int omap_aes_ctr_decrypt(struct skcipher_request *req) |
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604 | 628 | { |
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605 | 629 | return omap_aes_crypt(req, FLAGS_CTR); |
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606 | 630 | } |
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.. | .. |
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610 | 634 | static int omap_aes_crypt_req(struct crypto_engine *engine, |
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611 | 635 | void *req); |
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612 | 636 | |
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613 | | -static int omap_aes_cra_init(struct crypto_tfm *tfm) |
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| 637 | +static int omap_aes_init_tfm(struct crypto_skcipher *tfm) |
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614 | 638 | { |
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615 | | - const char *name = crypto_tfm_alg_name(tfm); |
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616 | | - const u32 flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK; |
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617 | | - struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm); |
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| 639 | + const char *name = crypto_tfm_alg_name(&tfm->base); |
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| 640 | + struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm); |
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618 | 641 | struct crypto_skcipher *blk; |
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619 | 642 | |
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620 | | - blk = crypto_alloc_skcipher(name, 0, flags); |
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| 643 | + blk = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); |
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621 | 644 | if (IS_ERR(blk)) |
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622 | 645 | return PTR_ERR(blk); |
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623 | 646 | |
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624 | 647 | ctx->fallback = blk; |
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625 | 648 | |
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626 | | - tfm->crt_ablkcipher.reqsize = sizeof(struct omap_aes_reqctx); |
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| 649 | + crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_aes_reqctx) + |
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| 650 | + crypto_skcipher_reqsize(blk)); |
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627 | 651 | |
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628 | 652 | ctx->enginectx.op.prepare_request = omap_aes_prepare_req; |
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629 | 653 | ctx->enginectx.op.unprepare_request = NULL; |
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.. | .. |
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632 | 656 | return 0; |
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633 | 657 | } |
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634 | 658 | |
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635 | | -static int omap_aes_gcm_cra_init(struct crypto_aead *tfm) |
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| 659 | +static void omap_aes_exit_tfm(struct crypto_skcipher *tfm) |
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636 | 660 | { |
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637 | | - struct omap_aes_dev *dd = NULL; |
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638 | | - struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm); |
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639 | | - int err; |
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640 | | - |
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641 | | - /* Find AES device, currently picks the first device */ |
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642 | | - spin_lock_bh(&list_lock); |
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643 | | - list_for_each_entry(dd, &dev_list, list) { |
---|
644 | | - break; |
---|
645 | | - } |
---|
646 | | - spin_unlock_bh(&list_lock); |
---|
647 | | - |
---|
648 | | - err = pm_runtime_get_sync(dd->dev); |
---|
649 | | - if (err < 0) { |
---|
650 | | - dev_err(dd->dev, "%s: failed to get_sync(%d)\n", |
---|
651 | | - __func__, err); |
---|
652 | | - return err; |
---|
653 | | - } |
---|
654 | | - |
---|
655 | | - tfm->reqsize = sizeof(struct omap_aes_reqctx); |
---|
656 | | - ctx->ctr = crypto_alloc_skcipher("ecb(aes)", 0, 0); |
---|
657 | | - if (IS_ERR(ctx->ctr)) { |
---|
658 | | - pr_warn("could not load aes driver for encrypting IV\n"); |
---|
659 | | - return PTR_ERR(ctx->ctr); |
---|
660 | | - } |
---|
661 | | - |
---|
662 | | - return 0; |
---|
663 | | -} |
---|
664 | | - |
---|
665 | | -static void omap_aes_cra_exit(struct crypto_tfm *tfm) |
---|
666 | | -{ |
---|
667 | | - struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm); |
---|
| 661 | + struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm); |
---|
668 | 662 | |
---|
669 | 663 | if (ctx->fallback) |
---|
670 | 664 | crypto_free_skcipher(ctx->fallback); |
---|
.. | .. |
---|
672 | 666 | ctx->fallback = NULL; |
---|
673 | 667 | } |
---|
674 | 668 | |
---|
675 | | -static void omap_aes_gcm_cra_exit(struct crypto_aead *tfm) |
---|
676 | | -{ |
---|
677 | | - struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm); |
---|
678 | | - |
---|
679 | | - omap_aes_cra_exit(crypto_aead_tfm(tfm)); |
---|
680 | | - |
---|
681 | | - if (ctx->ctr) |
---|
682 | | - crypto_free_skcipher(ctx->ctr); |
---|
683 | | -} |
---|
684 | | - |
---|
685 | 669 | /* ********************** ALGS ************************************ */ |
---|
686 | 670 | |
---|
687 | | -static struct crypto_alg algs_ecb_cbc[] = { |
---|
| 671 | +static struct skcipher_alg algs_ecb_cbc[] = { |
---|
688 | 672 | { |
---|
689 | | - .cra_name = "ecb(aes)", |
---|
690 | | - .cra_driver_name = "ecb-aes-omap", |
---|
691 | | - .cra_priority = 300, |
---|
692 | | - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | |
---|
693 | | - CRYPTO_ALG_KERN_DRIVER_ONLY | |
---|
694 | | - CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, |
---|
695 | | - .cra_blocksize = AES_BLOCK_SIZE, |
---|
696 | | - .cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
697 | | - .cra_alignmask = 0, |
---|
698 | | - .cra_type = &crypto_ablkcipher_type, |
---|
699 | | - .cra_module = THIS_MODULE, |
---|
700 | | - .cra_init = omap_aes_cra_init, |
---|
701 | | - .cra_exit = omap_aes_cra_exit, |
---|
702 | | - .cra_u.ablkcipher = { |
---|
703 | | - .min_keysize = AES_MIN_KEY_SIZE, |
---|
704 | | - .max_keysize = AES_MAX_KEY_SIZE, |
---|
705 | | - .setkey = omap_aes_setkey, |
---|
706 | | - .encrypt = omap_aes_ecb_encrypt, |
---|
707 | | - .decrypt = omap_aes_ecb_decrypt, |
---|
708 | | - } |
---|
| 673 | + .base.cra_name = "ecb(aes)", |
---|
| 674 | + .base.cra_driver_name = "ecb-aes-omap", |
---|
| 675 | + .base.cra_priority = 300, |
---|
| 676 | + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | |
---|
| 677 | + CRYPTO_ALG_ASYNC | |
---|
| 678 | + CRYPTO_ALG_NEED_FALLBACK, |
---|
| 679 | + .base.cra_blocksize = AES_BLOCK_SIZE, |
---|
| 680 | + .base.cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
| 681 | + .base.cra_module = THIS_MODULE, |
---|
| 682 | + |
---|
| 683 | + .min_keysize = AES_MIN_KEY_SIZE, |
---|
| 684 | + .max_keysize = AES_MAX_KEY_SIZE, |
---|
| 685 | + .setkey = omap_aes_setkey, |
---|
| 686 | + .encrypt = omap_aes_ecb_encrypt, |
---|
| 687 | + .decrypt = omap_aes_ecb_decrypt, |
---|
| 688 | + .init = omap_aes_init_tfm, |
---|
| 689 | + .exit = omap_aes_exit_tfm, |
---|
709 | 690 | }, |
---|
710 | 691 | { |
---|
711 | | - .cra_name = "cbc(aes)", |
---|
712 | | - .cra_driver_name = "cbc-aes-omap", |
---|
713 | | - .cra_priority = 300, |
---|
714 | | - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | |
---|
715 | | - CRYPTO_ALG_KERN_DRIVER_ONLY | |
---|
716 | | - CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, |
---|
717 | | - .cra_blocksize = AES_BLOCK_SIZE, |
---|
718 | | - .cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
719 | | - .cra_alignmask = 0, |
---|
720 | | - .cra_type = &crypto_ablkcipher_type, |
---|
721 | | - .cra_module = THIS_MODULE, |
---|
722 | | - .cra_init = omap_aes_cra_init, |
---|
723 | | - .cra_exit = omap_aes_cra_exit, |
---|
724 | | - .cra_u.ablkcipher = { |
---|
725 | | - .min_keysize = AES_MIN_KEY_SIZE, |
---|
726 | | - .max_keysize = AES_MAX_KEY_SIZE, |
---|
727 | | - .ivsize = AES_BLOCK_SIZE, |
---|
728 | | - .setkey = omap_aes_setkey, |
---|
729 | | - .encrypt = omap_aes_cbc_encrypt, |
---|
730 | | - .decrypt = omap_aes_cbc_decrypt, |
---|
731 | | - } |
---|
| 692 | + .base.cra_name = "cbc(aes)", |
---|
| 693 | + .base.cra_driver_name = "cbc-aes-omap", |
---|
| 694 | + .base.cra_priority = 300, |
---|
| 695 | + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | |
---|
| 696 | + CRYPTO_ALG_ASYNC | |
---|
| 697 | + CRYPTO_ALG_NEED_FALLBACK, |
---|
| 698 | + .base.cra_blocksize = AES_BLOCK_SIZE, |
---|
| 699 | + .base.cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
| 700 | + .base.cra_module = THIS_MODULE, |
---|
| 701 | + |
---|
| 702 | + .min_keysize = AES_MIN_KEY_SIZE, |
---|
| 703 | + .max_keysize = AES_MAX_KEY_SIZE, |
---|
| 704 | + .ivsize = AES_BLOCK_SIZE, |
---|
| 705 | + .setkey = omap_aes_setkey, |
---|
| 706 | + .encrypt = omap_aes_cbc_encrypt, |
---|
| 707 | + .decrypt = omap_aes_cbc_decrypt, |
---|
| 708 | + .init = omap_aes_init_tfm, |
---|
| 709 | + .exit = omap_aes_exit_tfm, |
---|
732 | 710 | } |
---|
733 | 711 | }; |
---|
734 | 712 | |
---|
735 | | -static struct crypto_alg algs_ctr[] = { |
---|
| 713 | +static struct skcipher_alg algs_ctr[] = { |
---|
736 | 714 | { |
---|
737 | | - .cra_name = "ctr(aes)", |
---|
738 | | - .cra_driver_name = "ctr-aes-omap", |
---|
739 | | - .cra_priority = 300, |
---|
740 | | - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | |
---|
741 | | - CRYPTO_ALG_KERN_DRIVER_ONLY | |
---|
742 | | - CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, |
---|
743 | | - .cra_blocksize = AES_BLOCK_SIZE, |
---|
744 | | - .cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
745 | | - .cra_alignmask = 0, |
---|
746 | | - .cra_type = &crypto_ablkcipher_type, |
---|
747 | | - .cra_module = THIS_MODULE, |
---|
748 | | - .cra_init = omap_aes_cra_init, |
---|
749 | | - .cra_exit = omap_aes_cra_exit, |
---|
750 | | - .cra_u.ablkcipher = { |
---|
751 | | - .min_keysize = AES_MIN_KEY_SIZE, |
---|
752 | | - .max_keysize = AES_MAX_KEY_SIZE, |
---|
753 | | - .geniv = "eseqiv", |
---|
754 | | - .ivsize = AES_BLOCK_SIZE, |
---|
755 | | - .setkey = omap_aes_setkey, |
---|
756 | | - .encrypt = omap_aes_ctr_encrypt, |
---|
757 | | - .decrypt = omap_aes_ctr_decrypt, |
---|
758 | | - } |
---|
759 | | -} , |
---|
| 715 | + .base.cra_name = "ctr(aes)", |
---|
| 716 | + .base.cra_driver_name = "ctr-aes-omap", |
---|
| 717 | + .base.cra_priority = 300, |
---|
| 718 | + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | |
---|
| 719 | + CRYPTO_ALG_ASYNC | |
---|
| 720 | + CRYPTO_ALG_NEED_FALLBACK, |
---|
| 721 | + .base.cra_blocksize = 1, |
---|
| 722 | + .base.cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
| 723 | + .base.cra_module = THIS_MODULE, |
---|
| 724 | + |
---|
| 725 | + .min_keysize = AES_MIN_KEY_SIZE, |
---|
| 726 | + .max_keysize = AES_MAX_KEY_SIZE, |
---|
| 727 | + .ivsize = AES_BLOCK_SIZE, |
---|
| 728 | + .setkey = omap_aes_setkey, |
---|
| 729 | + .encrypt = omap_aes_ctr_encrypt, |
---|
| 730 | + .decrypt = omap_aes_ctr_decrypt, |
---|
| 731 | + .init = omap_aes_init_tfm, |
---|
| 732 | + .exit = omap_aes_exit_tfm, |
---|
| 733 | +} |
---|
760 | 734 | }; |
---|
761 | 735 | |
---|
762 | 736 | static struct omap_aes_algs_info omap_aes_algs_info_ecb_cbc[] = { |
---|
.. | .. |
---|
775 | 749 | .cra_flags = CRYPTO_ALG_ASYNC | |
---|
776 | 750 | CRYPTO_ALG_KERN_DRIVER_ONLY, |
---|
777 | 751 | .cra_blocksize = 1, |
---|
778 | | - .cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
| 752 | + .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx), |
---|
779 | 753 | .cra_alignmask = 0xf, |
---|
780 | 754 | .cra_module = THIS_MODULE, |
---|
781 | 755 | }, |
---|
782 | 756 | .init = omap_aes_gcm_cra_init, |
---|
783 | | - .exit = omap_aes_gcm_cra_exit, |
---|
784 | 757 | .ivsize = GCM_AES_IV_SIZE, |
---|
785 | 758 | .maxauthsize = AES_BLOCK_SIZE, |
---|
786 | 759 | .setkey = omap_aes_gcm_setkey, |
---|
| 760 | + .setauthsize = omap_aes_gcm_setauthsize, |
---|
787 | 761 | .encrypt = omap_aes_gcm_encrypt, |
---|
788 | 762 | .decrypt = omap_aes_gcm_decrypt, |
---|
789 | 763 | }, |
---|
.. | .. |
---|
795 | 769 | .cra_flags = CRYPTO_ALG_ASYNC | |
---|
796 | 770 | CRYPTO_ALG_KERN_DRIVER_ONLY, |
---|
797 | 771 | .cra_blocksize = 1, |
---|
798 | | - .cra_ctxsize = sizeof(struct omap_aes_ctx), |
---|
| 772 | + .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx), |
---|
799 | 773 | .cra_alignmask = 0xf, |
---|
800 | 774 | .cra_module = THIS_MODULE, |
---|
801 | 775 | }, |
---|
802 | 776 | .init = omap_aes_gcm_cra_init, |
---|
803 | | - .exit = omap_aes_gcm_cra_exit, |
---|
804 | 777 | .maxauthsize = AES_BLOCK_SIZE, |
---|
805 | 778 | .ivsize = GCM_RFC4106_IV_SIZE, |
---|
806 | 779 | .setkey = omap_aes_4106gcm_setkey, |
---|
| 780 | + .setauthsize = omap_aes_4106gcm_setauthsize, |
---|
807 | 781 | .encrypt = omap_aes_4106gcm_encrypt, |
---|
808 | 782 | .decrypt = omap_aes_4106gcm_decrypt, |
---|
809 | 783 | }, |
---|
.. | .. |
---|
1127 | 1101 | { |
---|
1128 | 1102 | struct device *dev = &pdev->dev; |
---|
1129 | 1103 | struct omap_aes_dev *dd; |
---|
1130 | | - struct crypto_alg *algp; |
---|
| 1104 | + struct skcipher_alg *algp; |
---|
1131 | 1105 | struct aead_alg *aalg; |
---|
1132 | 1106 | struct resource res; |
---|
1133 | 1107 | int err = -ENOMEM, i, j, irq = -1; |
---|
.. | .. |
---|
1159 | 1133 | pm_runtime_set_autosuspend_delay(dev, DEFAULT_AUTOSUSPEND_DELAY); |
---|
1160 | 1134 | |
---|
1161 | 1135 | pm_runtime_enable(dev); |
---|
1162 | | - err = pm_runtime_get_sync(dev); |
---|
| 1136 | + err = pm_runtime_resume_and_get(dev); |
---|
1163 | 1137 | if (err < 0) { |
---|
1164 | 1138 | dev_err(dev, "%s: failed to get_sync(%d)\n", |
---|
1165 | 1139 | __func__, err); |
---|
.. | .. |
---|
1186 | 1160 | |
---|
1187 | 1161 | irq = platform_get_irq(pdev, 0); |
---|
1188 | 1162 | if (irq < 0) { |
---|
1189 | | - dev_err(dev, "can't get IRQ resource\n"); |
---|
1190 | 1163 | err = irq; |
---|
1191 | 1164 | goto err_irq; |
---|
1192 | 1165 | } |
---|
.. | .. |
---|
1202 | 1175 | spin_lock_init(&dd->lock); |
---|
1203 | 1176 | |
---|
1204 | 1177 | INIT_LIST_HEAD(&dd->list); |
---|
1205 | | - spin_lock(&list_lock); |
---|
| 1178 | + spin_lock_bh(&list_lock); |
---|
1206 | 1179 | list_add_tail(&dd->list, &dev_list); |
---|
1207 | | - spin_unlock(&list_lock); |
---|
| 1180 | + spin_unlock_bh(&list_lock); |
---|
1208 | 1181 | |
---|
1209 | 1182 | /* Initialize crypto engine */ |
---|
1210 | 1183 | dd->engine = crypto_engine_alloc_init(dev, 1); |
---|
.. | .. |
---|
1222 | 1195 | for (j = 0; j < dd->pdata->algs_info[i].size; j++) { |
---|
1223 | 1196 | algp = &dd->pdata->algs_info[i].algs_list[j]; |
---|
1224 | 1197 | |
---|
1225 | | - pr_debug("reg alg: %s\n", algp->cra_name); |
---|
1226 | | - INIT_LIST_HEAD(&algp->cra_list); |
---|
| 1198 | + pr_debug("reg alg: %s\n", algp->base.cra_name); |
---|
1227 | 1199 | |
---|
1228 | | - err = crypto_register_alg(algp); |
---|
| 1200 | + err = crypto_register_skcipher(algp); |
---|
1229 | 1201 | if (err) |
---|
1230 | 1202 | goto err_algs; |
---|
1231 | 1203 | |
---|
.. | .. |
---|
1238 | 1210 | !dd->pdata->aead_algs_info->registered) { |
---|
1239 | 1211 | for (i = 0; i < dd->pdata->aead_algs_info->size; i++) { |
---|
1240 | 1212 | aalg = &dd->pdata->aead_algs_info->algs_list[i]; |
---|
1241 | | - algp = &aalg->base; |
---|
1242 | 1213 | |
---|
1243 | | - pr_debug("reg alg: %s\n", algp->cra_name); |
---|
1244 | | - INIT_LIST_HEAD(&algp->cra_list); |
---|
| 1214 | + pr_debug("reg alg: %s\n", aalg->base.cra_name); |
---|
1245 | 1215 | |
---|
1246 | 1216 | err = crypto_register_aead(aalg); |
---|
1247 | 1217 | if (err) |
---|
.. | .. |
---|
1266 | 1236 | err_algs: |
---|
1267 | 1237 | for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) |
---|
1268 | 1238 | for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) |
---|
1269 | | - crypto_unregister_alg( |
---|
| 1239 | + crypto_unregister_skcipher( |
---|
1270 | 1240 | &dd->pdata->algs_info[i].algs_list[j]); |
---|
1271 | 1241 | |
---|
1272 | 1242 | err_engine: |
---|
.. | .. |
---|
1294 | 1264 | if (!dd) |
---|
1295 | 1265 | return -ENODEV; |
---|
1296 | 1266 | |
---|
1297 | | - spin_lock(&list_lock); |
---|
| 1267 | + spin_lock_bh(&list_lock); |
---|
1298 | 1268 | list_del(&dd->list); |
---|
1299 | | - spin_unlock(&list_lock); |
---|
| 1269 | + spin_unlock_bh(&list_lock); |
---|
1300 | 1270 | |
---|
1301 | 1271 | for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) |
---|
1302 | | - for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) |
---|
1303 | | - crypto_unregister_alg( |
---|
| 1272 | + for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) { |
---|
| 1273 | + crypto_unregister_skcipher( |
---|
1304 | 1274 | &dd->pdata->algs_info[i].algs_list[j]); |
---|
| 1275 | + dd->pdata->algs_info[i].registered--; |
---|
| 1276 | + } |
---|
1305 | 1277 | |
---|
1306 | | - for (i = dd->pdata->aead_algs_info->size - 1; i >= 0; i--) { |
---|
| 1278 | + for (i = dd->pdata->aead_algs_info->registered - 1; i >= 0; i--) { |
---|
1307 | 1279 | aalg = &dd->pdata->aead_algs_info->algs_list[i]; |
---|
1308 | 1280 | crypto_unregister_aead(aalg); |
---|
| 1281 | + dd->pdata->aead_algs_info->registered--; |
---|
| 1282 | + |
---|
1309 | 1283 | } |
---|
1310 | 1284 | |
---|
1311 | 1285 | crypto_engine_exit(dd->engine); |
---|
.. | .. |
---|
1313 | 1287 | tasklet_kill(&dd->done_task); |
---|
1314 | 1288 | omap_aes_dma_cleanup(dd); |
---|
1315 | 1289 | pm_runtime_disable(dd->dev); |
---|
1316 | | - dd = NULL; |
---|
| 1290 | + |
---|
| 1291 | + sysfs_remove_group(&dd->dev->kobj, &omap_aes_attr_group); |
---|
1317 | 1292 | |
---|
1318 | 1293 | return 0; |
---|
1319 | 1294 | } |
---|