hc
2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb
kernel/drivers/crypto/ccree/cc_sram_mgr.c
....@@ -1,27 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0
2
-/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
2
+/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
33
44 #include "cc_driver.h"
55 #include "cc_sram_mgr.h"
6
-
7
-/**
8
- * struct cc_sram_ctx -Internal RAM context manager
9
- * @sram_free_offset: the offset to the non-allocated area
10
- */
11
-struct cc_sram_ctx {
12
- cc_sram_addr_t sram_free_offset;
13
-};
14
-
15
-/**
16
- * cc_sram_mgr_fini() - Cleanup SRAM pool.
17
- *
18
- * @drvdata: Associated device driver context
19
- */
20
-void cc_sram_mgr_fini(struct cc_drvdata *drvdata)
21
-{
22
- /* Free "this" context */
23
- kfree(drvdata->sram_mgr_handle);
24
-}
256
267 /**
278 * cc_sram_mgr_init() - Initializes SRAM pool.
....@@ -29,65 +10,56 @@
2910 * Returns zero for success, negative value otherwise.
3011 *
3112 * @drvdata: Associated device driver context
13
+ *
14
+ * Return:
15
+ * 0 for success, negative error code for failure.
3216 */
3317 int cc_sram_mgr_init(struct cc_drvdata *drvdata)
3418 {
35
- struct cc_sram_ctx *ctx;
36
- dma_addr_t start = 0;
19
+ u32 start = 0;
3720 struct device *dev = drvdata_to_dev(drvdata);
3821
3922 if (drvdata->hw_rev < CC_HW_REV_712) {
4023 /* Pool starts after ROM bytes */
41
- start = (dma_addr_t)cc_ioread(drvdata,
42
- CC_REG(HOST_SEP_SRAM_THRESHOLD));
43
-
24
+ start = cc_ioread(drvdata, CC_REG(HOST_SEP_SRAM_THRESHOLD));
4425 if ((start & 0x3) != 0) {
45
- dev_err(dev, "Invalid SRAM offset %pad\n", &start);
26
+ dev_err(dev, "Invalid SRAM offset 0x%x\n", start);
4627 return -EINVAL;
4728 }
4829 }
4930
50
- /* Allocate "this" context */
51
- ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
52
-
53
- if (!ctx)
54
- return -ENOMEM;
55
-
56
- ctx->sram_free_offset = start;
57
- drvdata->sram_mgr_handle = ctx;
58
-
31
+ drvdata->sram_free_offset = start;
5932 return 0;
6033 }
6134
62
-/*!
63
- * Allocated buffer from SRAM pool.
64
- * Note: Caller is responsible to free the LAST allocated buffer.
65
- * This function does not taking care of any fragmentation may occur
66
- * by the order of calls to alloc/free.
35
+/**
36
+ * cc_sram_alloc() - Allocate buffer from SRAM pool.
6737 *
68
- * \param drvdata
69
- * \param size The requested bytes to allocate
38
+ * @drvdata: Associated device driver context
39
+ * @size: The requested numer of bytes to allocate
40
+ *
41
+ * Return:
42
+ * Address offset in SRAM or NULL_SRAM_ADDR for failure.
7043 */
71
-cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
44
+u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
7245 {
73
- struct cc_sram_ctx *smgr_ctx = drvdata->sram_mgr_handle;
7446 struct device *dev = drvdata_to_dev(drvdata);
75
- cc_sram_addr_t p;
47
+ u32 p;
7648
7749 if ((size & 0x3)) {
7850 dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
7951 size);
8052 return NULL_SRAM_ADDR;
8153 }
82
- if (size > (CC_CC_SRAM_SIZE - smgr_ctx->sram_free_offset)) {
83
- dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n",
84
- size, smgr_ctx->sram_free_offset);
54
+ if (size > (CC_CC_SRAM_SIZE - drvdata->sram_free_offset)) {
55
+ dev_err(dev, "Not enough space to allocate %u B (at offset %u)\n",
56
+ size, drvdata->sram_free_offset);
8557 return NULL_SRAM_ADDR;
8658 }
8759
88
- p = smgr_ctx->sram_free_offset;
89
- smgr_ctx->sram_free_offset += size;
90
- dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p);
60
+ p = drvdata->sram_free_offset;
61
+ drvdata->sram_free_offset += size;
62
+ dev_dbg(dev, "Allocated %u B @ %u\n", size, p);
9163 return p;
9264 }
9365
....@@ -98,13 +70,12 @@
9870 *
9971 * @src: A pointer to array of words to set as consts.
10072 * @dst: The target SRAM buffer to set into
101
- * @nelements: The number of words in "src" array
73
+ * @nelement: The number of words in "src" array
10274 * @seq: A pointer to the given IN/OUT descriptor sequence
10375 * @seq_len: A pointer to the given IN/OUT sequence length
10476 */
105
-void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst,
106
- unsigned int nelement, struct cc_hw_desc *seq,
107
- unsigned int *seq_len)
77
+void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,
78
+ struct cc_hw_desc *seq, unsigned int *seq_len)
10879 {
10980 u32 i;
11081 unsigned int idx = *seq_len;