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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * AMD Cryptographic Coprocessor (CCP) driver |
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3 | 4 | * |
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4 | | - * Copyright (C) 2016,2017 Advanced Micro Devices, Inc. |
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| 5 | + * Copyright (C) 2016,2019 Advanced Micro Devices, Inc. |
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5 | 6 | * |
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6 | 7 | * Author: Gary R Hook <gary.hook@amd.com> |
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7 | | - * |
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8 | | - * This program is free software; you can redistribute it and/or modify |
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9 | | - * it under the terms of the GNU General Public License version 2 as |
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10 | | - * published by the Free Software Foundation. |
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11 | 8 | */ |
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12 | 9 | |
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13 | 10 | #include <linux/module.h> |
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14 | 11 | #include <linux/kernel.h> |
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| 12 | +#include <linux/dma-mapping.h> |
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15 | 13 | #include <linux/dmaengine.h> |
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16 | 14 | #include <linux/spinlock.h> |
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17 | 15 | #include <linux/mutex.h> |
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.. | .. |
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37 | 35 | static unsigned int dma_chan_attr = CCP_DMA_DFLT; |
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38 | 36 | module_param(dma_chan_attr, uint, 0444); |
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39 | 37 | MODULE_PARM_DESC(dma_chan_attr, "Set DMA channel visibility: 0 (default) = device defaults, 1 = make private, 2 = make public"); |
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| 38 | + |
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| 39 | +static unsigned int dmaengine = 1; |
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| 40 | +module_param(dmaengine, uint, 0444); |
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| 41 | +MODULE_PARM_DESC(dmaengine, "Register services with the DMA subsystem (any non-zero value, default: 1)"); |
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40 | 42 | |
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41 | 43 | static unsigned int ccp_get_dma_chan_attr(struct ccp_device *ccp) |
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42 | 44 | { |
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.. | .. |
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631 | 633 | return 0; |
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632 | 634 | } |
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633 | 635 | |
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| 636 | +static void ccp_dma_release(struct ccp_device *ccp) |
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| 637 | +{ |
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| 638 | + struct ccp_dma_chan *chan; |
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| 639 | + struct dma_chan *dma_chan; |
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| 640 | + unsigned int i; |
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| 641 | + |
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| 642 | + for (i = 0; i < ccp->cmd_q_count; i++) { |
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| 643 | + chan = ccp->ccp_dma_chan + i; |
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| 644 | + dma_chan = &chan->dma_chan; |
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| 645 | + |
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| 646 | + tasklet_kill(&chan->cleanup_tasklet); |
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| 647 | + list_del_rcu(&dma_chan->device_node); |
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| 648 | + } |
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| 649 | +} |
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| 650 | + |
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| 651 | +static void ccp_dma_release_channels(struct ccp_device *ccp) |
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| 652 | +{ |
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| 653 | + struct ccp_dma_chan *chan; |
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| 654 | + struct dma_chan *dma_chan; |
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| 655 | + unsigned int i; |
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| 656 | + |
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| 657 | + for (i = 0; i < ccp->cmd_q_count; i++) { |
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| 658 | + chan = ccp->ccp_dma_chan + i; |
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| 659 | + dma_chan = &chan->dma_chan; |
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| 660 | + |
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| 661 | + if (dma_chan->client_count) |
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| 662 | + dma_release_channel(dma_chan); |
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| 663 | + } |
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| 664 | +} |
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| 665 | + |
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634 | 666 | int ccp_dmaengine_register(struct ccp_device *ccp) |
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635 | 667 | { |
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636 | 668 | struct ccp_dma_chan *chan; |
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.. | .. |
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640 | 672 | char *dma_desc_cache_name; |
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641 | 673 | unsigned int i; |
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642 | 674 | int ret; |
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| 675 | + |
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| 676 | + if (!dmaengine) |
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| 677 | + return 0; |
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643 | 678 | |
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644 | 679 | ccp->ccp_dma_chan = devm_kcalloc(ccp->dev, ccp->cmd_q_count, |
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645 | 680 | sizeof(*(ccp->ccp_dma_chan)), |
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.. | .. |
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732 | 767 | return 0; |
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733 | 768 | |
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734 | 769 | err_reg: |
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| 770 | + ccp_dma_release(ccp); |
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735 | 771 | kmem_cache_destroy(ccp->dma_desc_cache); |
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736 | 772 | |
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737 | 773 | err_cache: |
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.. | .. |
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744 | 780 | { |
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745 | 781 | struct dma_device *dma_dev = &ccp->dma_dev; |
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746 | 782 | |
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| 783 | + if (!dmaengine) |
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| 784 | + return; |
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| 785 | + |
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| 786 | + ccp_dma_release_channels(ccp); |
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747 | 787 | dma_async_device_unregister(dma_dev); |
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| 788 | + ccp_dma_release(ccp); |
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748 | 789 | |
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749 | 790 | kmem_cache_destroy(ccp->dma_desc_cache); |
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750 | 791 | kmem_cache_destroy(ccp->dma_cmd_cache); |
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