.. | .. |
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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | |
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2 | 3 | menuconfig CRYPTO_HW |
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3 | 4 | bool "Hardware crypto devices" |
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4 | 5 | default y |
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5 | | - ---help--- |
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| 6 | + help |
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6 | 7 | Say Y here to get to see options for hardware crypto devices and |
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7 | 8 | processors. This option alone does not add any kernel code. |
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8 | 9 | |
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9 | 10 | If you say N, all options in this submenu will be skipped and disabled. |
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10 | 11 | |
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11 | 12 | if CRYPTO_HW |
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| 13 | + |
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| 14 | +source "drivers/crypto/allwinner/Kconfig" |
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12 | 15 | |
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13 | 16 | config CRYPTO_DEV_PADLOCK |
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14 | 17 | tristate "Support for VIA PadLock ACE" |
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.. | .. |
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25 | 28 | config CRYPTO_DEV_PADLOCK_AES |
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26 | 29 | tristate "PadLock driver for AES algorithm" |
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27 | 30 | depends on CRYPTO_DEV_PADLOCK |
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28 | | - select CRYPTO_BLKCIPHER |
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29 | | - select CRYPTO_AES |
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| 31 | + select CRYPTO_SKCIPHER |
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| 32 | + select CRYPTO_LIB_AES |
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30 | 33 | help |
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31 | 34 | Use VIA PadLock for AES algorithm. |
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32 | 35 | |
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.. | .. |
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53 | 56 | tristate "Support for the Geode LX AES engine" |
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54 | 57 | depends on X86_32 && PCI |
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55 | 58 | select CRYPTO_ALGAPI |
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56 | | - select CRYPTO_BLKCIPHER |
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| 59 | + select CRYPTO_SKCIPHER |
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57 | 60 | help |
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58 | 61 | Say 'Y' here to use the AMD Geode LX processor on-board AES |
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59 | 62 | engine for the CryptoAPI AES algorithm. |
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.. | .. |
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68 | 71 | help |
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69 | 72 | Select this option if you want to enable support for |
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70 | 73 | s390 cryptographic adapters like: |
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71 | | - + PCI-X Cryptographic Coprocessor (PCIXCC) |
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72 | | - + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) |
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73 | | - + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) |
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74 | | - + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) |
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| 74 | + + Crypto Express 2 up to 7 Coprocessor (CEXxC) |
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| 75 | + + Crypto Express 2 up to 7 Accelerator (CEXxA) |
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| 76 | + + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP) |
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| 77 | + |
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| 78 | +config ZCRYPT_DEBUG |
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| 79 | + bool "Enable debug features for s390 cryptographic adapters" |
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| 80 | + default n |
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| 81 | + depends on DEBUG_KERNEL |
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| 82 | + depends on ZCRYPT |
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| 83 | + help |
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| 84 | + Say 'Y' here to enable some additional debug features on the |
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| 85 | + s390 cryptographic adapters driver. |
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| 86 | + |
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| 87 | + There will be some more sysfs attributes displayed for ap cards |
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| 88 | + and queues and some flags on crypto requests are interpreted as |
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| 89 | + debugging messages to force error injection. |
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| 90 | + |
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| 91 | + Do not enable on production level kernel build. |
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| 92 | + |
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| 93 | + If unsure, say N. |
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| 94 | + |
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| 95 | +config ZCRYPT_MULTIDEVNODES |
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| 96 | + bool "Support for multiple zcrypt device nodes" |
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| 97 | + default y |
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| 98 | + depends on S390 |
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| 99 | + depends on ZCRYPT |
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| 100 | + help |
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| 101 | + With this option enabled the zcrypt device driver can |
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| 102 | + provide multiple devices nodes in /dev. Each device |
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| 103 | + node can get customized to limit access and narrow |
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| 104 | + down the use of the available crypto hardware. |
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75 | 105 | |
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76 | 106 | config PKEY |
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77 | 107 | tristate "Kernel API for protected key handling" |
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.. | .. |
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95 | 125 | depends on ZCRYPT |
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96 | 126 | depends on PKEY |
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97 | 127 | select CRYPTO_ALGAPI |
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98 | | - select CRYPTO_BLKCIPHER |
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| 128 | + select CRYPTO_SKCIPHER |
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99 | 129 | help |
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100 | 130 | This is the s390 hardware accelerated implementation of the |
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101 | 131 | AES cipher algorithms for use with protected key. |
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.. | .. |
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133 | 163 | |
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134 | 164 | It is available as of z10. |
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135 | 165 | |
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| 166 | +config CRYPTO_SHA3_256_S390 |
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| 167 | + tristate "SHA3_224 and SHA3_256 digest algorithm" |
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| 168 | + depends on S390 |
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| 169 | + select CRYPTO_HASH |
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| 170 | + help |
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| 171 | + This is the s390 hardware accelerated implementation of the |
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| 172 | + SHA3_256 secure hash standard. |
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| 173 | + |
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| 174 | + It is available as of z14. |
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| 175 | + |
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| 176 | +config CRYPTO_SHA3_512_S390 |
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| 177 | + tristate "SHA3_384 and SHA3_512 digest algorithm" |
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| 178 | + depends on S390 |
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| 179 | + select CRYPTO_HASH |
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| 180 | + help |
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| 181 | + This is the s390 hardware accelerated implementation of the |
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| 182 | + SHA3_512 secure hash standard. |
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| 183 | + |
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| 184 | + It is available as of z14. |
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| 185 | + |
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136 | 186 | config CRYPTO_DES_S390 |
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137 | 187 | tristate "DES and Triple DES cipher algorithms" |
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138 | 188 | depends on S390 |
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139 | 189 | select CRYPTO_ALGAPI |
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140 | | - select CRYPTO_BLKCIPHER |
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141 | | - select CRYPTO_DES |
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| 190 | + select CRYPTO_SKCIPHER |
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| 191 | + select CRYPTO_LIB_DES |
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142 | 192 | help |
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143 | 193 | This is the s390 hardware accelerated implementation of the |
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144 | 194 | DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). |
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.. | .. |
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150 | 200 | tristate "AES cipher algorithms" |
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151 | 201 | depends on S390 |
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152 | 202 | select CRYPTO_ALGAPI |
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153 | | - select CRYPTO_BLKCIPHER |
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| 203 | + select CRYPTO_SKCIPHER |
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154 | 204 | help |
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155 | 205 | This is the s390 hardware accelerated implementation of the |
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156 | 206 | AES cipher algorithms (FIPS-197). |
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.. | .. |
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177 | 227 | It is available as of z9. |
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178 | 228 | |
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179 | 229 | config CRYPTO_GHASH_S390 |
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180 | | - tristate "GHASH digest algorithm" |
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| 230 | + tristate "GHASH hash function" |
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181 | 231 | depends on S390 |
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182 | 232 | select CRYPTO_HASH |
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183 | 233 | help |
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184 | | - This is the s390 hardware accelerated implementation of the |
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185 | | - GHASH message digest algorithm for GCM (Galois/Counter Mode). |
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| 234 | + This is the s390 hardware accelerated implementation of GHASH, |
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| 235 | + the hash function used in GCM (Galois/Counter mode). |
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186 | 236 | |
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187 | 237 | It is available as of z196. |
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188 | 238 | |
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.. | .. |
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199 | 249 | |
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200 | 250 | It is available with IBM z13 or later. |
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201 | 251 | |
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202 | | -config CRYPTO_DEV_MARVELL_CESA |
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203 | | - tristate "Marvell's Cryptographic Engine driver" |
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204 | | - depends on PLAT_ORION || ARCH_MVEBU |
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205 | | - select CRYPTO_AES |
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206 | | - select CRYPTO_DES |
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207 | | - select CRYPTO_BLKCIPHER |
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208 | | - select CRYPTO_HASH |
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209 | | - select SRAM |
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210 | | - help |
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211 | | - This driver allows you to utilize the Cryptographic Engines and |
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212 | | - Security Accelerator (CESA) which can be found on MVEBU and ORION |
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213 | | - platforms. |
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214 | | - This driver supports CPU offload through DMA transfers. |
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215 | | - |
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216 | 252 | config CRYPTO_DEV_NIAGARA2 |
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217 | | - tristate "Niagara2 Stream Processing Unit driver" |
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218 | | - select CRYPTO_DES |
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219 | | - select CRYPTO_BLKCIPHER |
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220 | | - select CRYPTO_HASH |
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221 | | - select CRYPTO_MD5 |
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222 | | - select CRYPTO_SHA1 |
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223 | | - select CRYPTO_SHA256 |
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224 | | - depends on SPARC64 |
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225 | | - help |
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| 253 | + tristate "Niagara2 Stream Processing Unit driver" |
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| 254 | + select CRYPTO_LIB_DES |
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| 255 | + select CRYPTO_SKCIPHER |
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| 256 | + select CRYPTO_HASH |
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| 257 | + select CRYPTO_MD5 |
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| 258 | + select CRYPTO_SHA1 |
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| 259 | + select CRYPTO_SHA256 |
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| 260 | + depends on SPARC64 |
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| 261 | + help |
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226 | 262 | Each core of a Niagara2 processor contains a Stream |
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227 | 263 | Processing Unit, which itself contains several cryptographic |
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228 | 264 | sub-units. One set provides the Modular Arithmetic Unit, |
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.. | .. |
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232 | 268 | |
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233 | 269 | config CRYPTO_DEV_HIFN_795X |
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234 | 270 | tristate "Driver HIFN 795x crypto accelerator chips" |
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235 | | - select CRYPTO_DES |
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236 | | - select CRYPTO_BLKCIPHER |
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| 271 | + select CRYPTO_LIB_DES |
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| 272 | + select CRYPTO_SKCIPHER |
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237 | 273 | select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG |
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238 | 274 | depends on PCI |
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239 | 275 | depends on !ARCH_DMA_ADDR_T_64BIT |
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.. | .. |
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247 | 283 | Select this option if you want to enable the random number generator |
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248 | 284 | on the HIFN 795x crypto adapters. |
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249 | 285 | |
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250 | | -source drivers/crypto/caam/Kconfig |
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| 286 | +source "drivers/crypto/caam/Kconfig" |
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251 | 287 | |
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252 | 288 | config CRYPTO_DEV_TALITOS |
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253 | 289 | tristate "Talitos Freescale Security Engine (SEC)" |
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254 | 290 | select CRYPTO_AEAD |
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255 | 291 | select CRYPTO_AUTHENC |
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256 | | - select CRYPTO_BLKCIPHER |
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| 292 | + select CRYPTO_SKCIPHER |
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257 | 293 | select CRYPTO_HASH |
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| 294 | + select CRYPTO_LIB_DES |
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258 | 295 | select HW_RANDOM |
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259 | 296 | depends on FSL_SOC |
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260 | 297 | help |
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.. | .. |
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288 | 325 | config CRYPTO_DEV_IXP4XX |
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289 | 326 | tristate "Driver for IXP4xx crypto hardware acceleration" |
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290 | 327 | depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE |
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291 | | - select CRYPTO_DES |
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| 328 | + select CRYPTO_LIB_DES |
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292 | 329 | select CRYPTO_AEAD |
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293 | 330 | select CRYPTO_AUTHENC |
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294 | | - select CRYPTO_BLKCIPHER |
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| 331 | + select CRYPTO_SKCIPHER |
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295 | 332 | help |
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296 | 333 | Driver for the IXP4xx NPE crypto engine. |
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297 | 334 | |
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.. | .. |
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301 | 338 | select CRYPTO_HASH |
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302 | 339 | select CRYPTO_AEAD |
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303 | 340 | select CRYPTO_AES |
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| 341 | + select CRYPTO_LIB_AES |
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304 | 342 | select CRYPTO_CCM |
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305 | 343 | select CRYPTO_CTR |
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306 | 344 | select CRYPTO_GCM |
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307 | | - select CRYPTO_BLKCIPHER |
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| 345 | + select CRYPTO_SKCIPHER |
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308 | 346 | help |
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309 | 347 | This option allows you to have support for AMCC crypto acceleration. |
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310 | 348 | |
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.. | .. |
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312 | 350 | bool "PowerPC 4xx generic true random number generator support" |
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313 | 351 | depends on CRYPTO_DEV_PPC4XX && HW_RANDOM |
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314 | 352 | default y |
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315 | | - ---help--- |
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| 353 | + help |
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316 | 354 | This option provides the kernel-side support for the TRNG hardware |
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317 | 355 | found in the security function of some PowerPC 4xx SoCs. |
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318 | 356 | |
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.. | .. |
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321 | 359 | depends on ARCH_OMAP2PLUS |
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322 | 360 | help |
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323 | 361 | OMAP processors have various crypto HW accelerators. Select this if |
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324 | | - you want to use the OMAP modules for any of the crypto algorithms. |
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| 362 | + you want to use the OMAP modules for any of the crypto algorithms. |
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325 | 363 | |
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326 | 364 | if CRYPTO_DEV_OMAP |
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327 | 365 | |
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328 | 366 | config CRYPTO_DEV_OMAP_SHAM |
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329 | 367 | tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" |
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330 | 368 | depends on ARCH_OMAP2PLUS |
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| 369 | + select CRYPTO_ENGINE |
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331 | 370 | select CRYPTO_SHA1 |
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332 | 371 | select CRYPTO_MD5 |
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333 | 372 | select CRYPTO_SHA256 |
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.. | .. |
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341 | 380 | tristate "Support for OMAP AES hw engine" |
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342 | 381 | depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS |
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343 | 382 | select CRYPTO_AES |
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344 | | - select CRYPTO_BLKCIPHER |
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| 383 | + select CRYPTO_SKCIPHER |
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345 | 384 | select CRYPTO_ENGINE |
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346 | 385 | select CRYPTO_CBC |
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347 | 386 | select CRYPTO_ECB |
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.. | .. |
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354 | 393 | config CRYPTO_DEV_OMAP_DES |
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355 | 394 | tristate "Support for OMAP DES/3DES hw engine" |
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356 | 395 | depends on ARCH_OMAP2PLUS |
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357 | | - select CRYPTO_DES |
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358 | | - select CRYPTO_BLKCIPHER |
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| 396 | + select CRYPTO_LIB_DES |
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| 397 | + select CRYPTO_SKCIPHER |
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359 | 398 | select CRYPTO_ENGINE |
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360 | 399 | help |
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361 | 400 | OMAP processors have DES/3DES module accelerator. Select this if you |
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.. | .. |
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371 | 410 | select CRYPTO_AEAD |
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372 | 411 | select CRYPTO_AES |
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373 | 412 | select CRYPTO_AUTHENC |
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374 | | - select CRYPTO_BLKCIPHER |
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375 | | - select CRYPTO_DES |
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| 413 | + select CRYPTO_SKCIPHER |
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| 414 | + select CRYPTO_LIB_DES |
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376 | 415 | select CRYPTO_CBC |
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377 | 416 | select CRYPTO_ECB |
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378 | 417 | select CRYPTO_SEQIV |
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.. | .. |
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381 | 420 | Picochip picoXcell SoC devices. Select this for IPSEC ESP offload |
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382 | 421 | and for 3gpp Layer 2 ciphering support. |
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383 | 422 | |
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384 | | - Saying m here will build a module named pipcoxcell_crypto. |
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| 423 | + Saying m here will build a module named picoxcell_crypto. |
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385 | 424 | |
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386 | 425 | config CRYPTO_DEV_SAHARA |
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387 | 426 | tristate "Support for SAHARA crypto accelerator" |
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388 | 427 | depends on ARCH_MXC && OF |
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389 | | - select CRYPTO_BLKCIPHER |
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| 428 | + select CRYPTO_SKCIPHER |
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390 | 429 | select CRYPTO_AES |
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391 | 430 | select CRYPTO_ECB |
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392 | 431 | help |
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393 | 432 | This option enables support for the SAHARA HW crypto accelerator |
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394 | 433 | found in some Freescale i.MX chips. |
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395 | 434 | |
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396 | | -config CRYPTO_DEV_MXC_SCC |
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397 | | - tristate "Support for Freescale Security Controller (SCC)" |
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398 | | - depends on ARCH_MXC && OF |
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399 | | - select CRYPTO_BLKCIPHER |
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400 | | - select CRYPTO_DES |
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401 | | - help |
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402 | | - This option enables support for the Security Controller (SCC) |
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403 | | - found in Freescale i.MX25 chips. |
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404 | | - |
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405 | 435 | config CRYPTO_DEV_EXYNOS_RNG |
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406 | | - tristate "EXYNOS HW pseudo random number generator support" |
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| 436 | + tristate "Exynos HW pseudo random number generator support" |
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407 | 437 | depends on ARCH_EXYNOS || COMPILE_TEST |
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408 | 438 | depends on HAS_IOMEM |
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409 | 439 | select CRYPTO_RNG |
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410 | | - ---help--- |
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| 440 | + help |
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411 | 441 | This driver provides kernel-side support through the |
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412 | 442 | cryptographic API for the pseudo random number generator hardware |
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413 | 443 | found on Exynos SoCs. |
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.. | .. |
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422 | 452 | depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST |
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423 | 453 | depends on HAS_IOMEM |
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424 | 454 | select CRYPTO_AES |
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425 | | - select CRYPTO_BLKCIPHER |
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| 455 | + select CRYPTO_SKCIPHER |
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426 | 456 | help |
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427 | 457 | This option allows you to have support for S5P crypto acceleration. |
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428 | 458 | Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES |
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.. | .. |
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466 | 496 | endif # if CRYPTO_DEV_UX500 |
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467 | 497 | |
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468 | 498 | config CRYPTO_DEV_ATMEL_AUTHENC |
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469 | | - tristate "Support for Atmel IPSEC/SSL hw accelerator" |
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| 499 | + bool "Support for Atmel IPSEC/SSL hw accelerator" |
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470 | 500 | depends on ARCH_AT91 || COMPILE_TEST |
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471 | | - select CRYPTO_AUTHENC |
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472 | | - select CRYPTO_DEV_ATMEL_AES |
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473 | | - select CRYPTO_DEV_ATMEL_SHA |
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| 501 | + depends on CRYPTO_DEV_ATMEL_AES |
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474 | 502 | help |
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475 | 503 | Some Atmel processors can combine the AES and SHA hw accelerators |
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476 | 504 | to enhance support of IPSEC/SSL. |
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.. | .. |
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482 | 510 | depends on ARCH_AT91 || COMPILE_TEST |
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483 | 511 | select CRYPTO_AES |
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484 | 512 | select CRYPTO_AEAD |
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485 | | - select CRYPTO_BLKCIPHER |
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| 513 | + select CRYPTO_SKCIPHER |
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| 514 | + select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC |
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| 515 | + select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC |
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486 | 516 | help |
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487 | 517 | Some Atmel processors have AES hw accelerator. |
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488 | 518 | Select this if you want to use the Atmel module for |
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.. | .. |
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494 | 524 | config CRYPTO_DEV_ATMEL_TDES |
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495 | 525 | tristate "Support for Atmel DES/TDES hw accelerator" |
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496 | 526 | depends on ARCH_AT91 || COMPILE_TEST |
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497 | | - select CRYPTO_DES |
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498 | | - select CRYPTO_BLKCIPHER |
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| 527 | + select CRYPTO_LIB_DES |
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| 528 | + select CRYPTO_SKCIPHER |
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499 | 529 | help |
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500 | 530 | Some Atmel processors have DES/TDES hw accelerator. |
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501 | 531 | Select this if you want to use the Atmel module for |
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.. | .. |
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517 | 547 | To compile this driver as a module, choose M here: the module |
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518 | 548 | will be called atmel-sha. |
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519 | 549 | |
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| 550 | +config CRYPTO_DEV_ATMEL_I2C |
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| 551 | + tristate |
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| 552 | + select BITREVERSE |
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| 553 | + |
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520 | 554 | config CRYPTO_DEV_ATMEL_ECC |
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521 | 555 | tristate "Support for Microchip / Atmel ECC hw accelerator" |
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522 | | - depends on ARCH_AT91 || COMPILE_TEST |
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523 | 556 | depends on I2C |
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| 557 | + select CRYPTO_DEV_ATMEL_I2C |
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524 | 558 | select CRYPTO_ECDH |
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525 | 559 | select CRC16 |
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526 | 560 | help |
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.. | .. |
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530 | 564 | |
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531 | 565 | To compile this driver as a module, choose M here: the module |
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532 | 566 | will be called atmel-ecc. |
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| 567 | + |
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| 568 | +config CRYPTO_DEV_ATMEL_SHA204A |
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| 569 | + tristate "Support for Microchip / Atmel SHA accelerator and RNG" |
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| 570 | + depends on I2C |
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| 571 | + select CRYPTO_DEV_ATMEL_I2C |
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| 572 | + select HW_RANDOM |
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| 573 | + select CRC16 |
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| 574 | + help |
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| 575 | + Microhip / Atmel SHA accelerator and RNG. |
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| 576 | + Select this if you want to use the Microchip / Atmel SHA204A |
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| 577 | + module as a random number generator. (Other functions of the |
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| 578 | + chip are currently not exposed by this driver) |
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| 579 | + |
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| 580 | + To compile this driver as a module, choose M here: the module |
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| 581 | + will be called atmel-sha204a. |
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533 | 582 | |
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534 | 583 | config CRYPTO_DEV_CCP |
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535 | 584 | bool "Support for AMD Secure Processor" |
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.. | .. |
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549 | 598 | select CRYPTO_CBC |
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550 | 599 | select CRYPTO_ECB |
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551 | 600 | select CRYPTO_AES |
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552 | | - select CRYPTO_BLKCIPHER |
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| 601 | + select CRYPTO_SKCIPHER |
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553 | 602 | select CRYPTO_HASH |
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554 | 603 | help |
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555 | 604 | The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB |
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.. | .. |
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561 | 610 | source "drivers/crypto/qat/Kconfig" |
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562 | 611 | source "drivers/crypto/cavium/cpt/Kconfig" |
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563 | 612 | source "drivers/crypto/cavium/nitrox/Kconfig" |
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| 613 | +source "drivers/crypto/marvell/Kconfig" |
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564 | 614 | |
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565 | 615 | config CRYPTO_DEV_CAVIUM_ZIP |
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566 | 616 | tristate "Cavium ZIP driver" |
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567 | 617 | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) |
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568 | | - ---help--- |
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| 618 | + help |
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569 | 619 | Select this option if you want to enable compression/decompression |
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570 | 620 | acceleration on Cavium's ARM based SoCs |
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571 | 621 | |
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.. | .. |
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573 | 623 | tristate "Qualcomm crypto engine accelerator" |
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574 | 624 | depends on ARCH_QCOM || COMPILE_TEST |
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575 | 625 | depends on HAS_IOMEM |
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576 | | - select CRYPTO_AES |
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577 | | - select CRYPTO_DES |
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578 | | - select CRYPTO_ECB |
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579 | | - select CRYPTO_CBC |
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580 | | - select CRYPTO_XTS |
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581 | | - select CRYPTO_CTR |
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582 | | - select CRYPTO_BLKCIPHER |
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583 | 626 | help |
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584 | 627 | This driver supports Qualcomm crypto engine accelerator |
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585 | 628 | hardware. To compile this driver as a module, choose M here. The |
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586 | 629 | module will be called qcrypto. |
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| 630 | + |
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| 631 | +config CRYPTO_DEV_QCE_SKCIPHER |
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| 632 | + bool |
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| 633 | + depends on CRYPTO_DEV_QCE |
---|
| 634 | + select CRYPTO_AES |
---|
| 635 | + select CRYPTO_LIB_DES |
---|
| 636 | + select CRYPTO_ECB |
---|
| 637 | + select CRYPTO_CBC |
---|
| 638 | + select CRYPTO_XTS |
---|
| 639 | + select CRYPTO_CTR |
---|
| 640 | + select CRYPTO_SKCIPHER |
---|
| 641 | + |
---|
| 642 | +config CRYPTO_DEV_QCE_SHA |
---|
| 643 | + bool |
---|
| 644 | + depends on CRYPTO_DEV_QCE |
---|
| 645 | + select CRYPTO_SHA1 |
---|
| 646 | + select CRYPTO_SHA256 |
---|
| 647 | + |
---|
| 648 | +choice |
---|
| 649 | + prompt "Algorithms enabled for QCE acceleration" |
---|
| 650 | + default CRYPTO_DEV_QCE_ENABLE_ALL |
---|
| 651 | + depends on CRYPTO_DEV_QCE |
---|
| 652 | + help |
---|
| 653 | + This option allows to choose whether to build support for all algorihtms |
---|
| 654 | + (default), hashes-only, or skciphers-only. |
---|
| 655 | + |
---|
| 656 | + The QCE engine does not appear to scale as well as the CPU to handle |
---|
| 657 | + multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the |
---|
| 658 | + QCE handles only 2 requests in parallel. |
---|
| 659 | + |
---|
| 660 | + Ipsec throughput seems to improve when disabling either family of |
---|
| 661 | + algorithms, sharing the load with the CPU. Enabling skciphers-only |
---|
| 662 | + appears to work best. |
---|
| 663 | + |
---|
| 664 | + config CRYPTO_DEV_QCE_ENABLE_ALL |
---|
| 665 | + bool "All supported algorithms" |
---|
| 666 | + select CRYPTO_DEV_QCE_SKCIPHER |
---|
| 667 | + select CRYPTO_DEV_QCE_SHA |
---|
| 668 | + help |
---|
| 669 | + Enable all supported algorithms: |
---|
| 670 | + - AES (CBC, CTR, ECB, XTS) |
---|
| 671 | + - 3DES (CBC, ECB) |
---|
| 672 | + - DES (CBC, ECB) |
---|
| 673 | + - SHA1, HMAC-SHA1 |
---|
| 674 | + - SHA256, HMAC-SHA256 |
---|
| 675 | + |
---|
| 676 | + config CRYPTO_DEV_QCE_ENABLE_SKCIPHER |
---|
| 677 | + bool "Symmetric-key ciphers only" |
---|
| 678 | + select CRYPTO_DEV_QCE_SKCIPHER |
---|
| 679 | + help |
---|
| 680 | + Enable symmetric-key ciphers only: |
---|
| 681 | + - AES (CBC, CTR, ECB, XTS) |
---|
| 682 | + - 3DES (ECB, CBC) |
---|
| 683 | + - DES (ECB, CBC) |
---|
| 684 | + |
---|
| 685 | + config CRYPTO_DEV_QCE_ENABLE_SHA |
---|
| 686 | + bool "Hash/HMAC only" |
---|
| 687 | + select CRYPTO_DEV_QCE_SHA |
---|
| 688 | + help |
---|
| 689 | + Enable hashes/HMAC algorithms only: |
---|
| 690 | + - SHA1, HMAC-SHA1 |
---|
| 691 | + - SHA256, HMAC-SHA256 |
---|
| 692 | + |
---|
| 693 | +endchoice |
---|
| 694 | + |
---|
| 695 | +config CRYPTO_DEV_QCE_SW_MAX_LEN |
---|
| 696 | + int "Default maximum request size to use software for AES" |
---|
| 697 | + depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER |
---|
| 698 | + default 512 |
---|
| 699 | + help |
---|
| 700 | + This sets the default maximum request size to perform AES requests |
---|
| 701 | + using software instead of the crypto engine. It can be changed by |
---|
| 702 | + setting the aes_sw_max_len parameter. |
---|
| 703 | + |
---|
| 704 | + Small blocks are processed faster in software than hardware. |
---|
| 705 | + Considering the 256-bit ciphers, software is 2-3 times faster than |
---|
| 706 | + qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. |
---|
| 707 | + With 128-bit keys, the break-even point would be around 1024-bytes. |
---|
| 708 | + |
---|
| 709 | + The default is set a little lower, to 512 bytes, to balance the |
---|
| 710 | + cost in CPU usage. The minimum recommended setting is 16-bytes |
---|
| 711 | + (1 AES block), since AES-GCM will fail if you set it lower. |
---|
| 712 | + Setting this to zero will send all requests to the hardware. |
---|
| 713 | + |
---|
| 714 | + Note that 192-bit keys are not supported by the hardware and are |
---|
| 715 | + always processed by the software fallback, and all DES requests |
---|
| 716 | + are done by the hardware. |
---|
587 | 717 | |
---|
588 | 718 | config CRYPTO_DEV_QCOM_RNG |
---|
589 | 719 | tristate "Qualcomm Random Number Generator Driver" |
---|
.. | .. |
---|
594 | 724 | Generator hardware found on Qualcomm SoCs. |
---|
595 | 725 | |
---|
596 | 726 | To compile this driver as a module, choose M here. The |
---|
597 | | - module will be called qcom-rng. If unsure, say N. |
---|
| 727 | + module will be called qcom-rng. If unsure, say N. |
---|
598 | 728 | |
---|
599 | 729 | config CRYPTO_DEV_VMX |
---|
600 | 730 | bool "Support for VMX cryptographic acceleration instructions" |
---|
.. | .. |
---|
615 | 745 | This driver interfaces with the Imagination Technologies |
---|
616 | 746 | hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 |
---|
617 | 747 | hashing algorithms. |
---|
618 | | - |
---|
619 | | -config CRYPTO_DEV_SUN4I_SS |
---|
620 | | - tristate "Support for Allwinner Security System cryptographic accelerator" |
---|
621 | | - depends on ARCH_SUNXI && !64BIT |
---|
622 | | - select CRYPTO_MD5 |
---|
623 | | - select CRYPTO_SHA1 |
---|
624 | | - select CRYPTO_AES |
---|
625 | | - select CRYPTO_DES |
---|
626 | | - select CRYPTO_BLKCIPHER |
---|
627 | | - help |
---|
628 | | - Some Allwinner SoC have a crypto accelerator named |
---|
629 | | - Security System. Select this if you want to use it. |
---|
630 | | - The Security System handle AES/DES/3DES ciphers in CBC mode |
---|
631 | | - and SHA1 and MD5 hash algorithms. |
---|
632 | | - |
---|
633 | | - To compile this driver as a module, choose M here: the module |
---|
634 | | - will be called sun4i-ss. |
---|
635 | | - |
---|
636 | | -config CRYPTO_DEV_SUN4I_SS_PRNG |
---|
637 | | - bool "Support for Allwinner Security System PRNG" |
---|
638 | | - depends on CRYPTO_DEV_SUN4I_SS |
---|
639 | | - select CRYPTO_RNG |
---|
640 | | - help |
---|
641 | | - Select this option if you want to provide kernel-side support for |
---|
642 | | - the Pseudo-Random Number Generator found in the Security System. |
---|
643 | 748 | |
---|
644 | 749 | config CRYPTO_DEV_ROCKCHIP |
---|
645 | 750 | tristate "Rockchip's Cryptographic Engine driver" |
---|
.. | .. |
---|
670 | 775 | |
---|
671 | 776 | source "drivers/crypto/rockchip/Kconfig" |
---|
672 | 777 | |
---|
| 778 | +config CRYPTO_DEV_ZYNQMP_AES |
---|
| 779 | + tristate "Support for Xilinx ZynqMP AES hw accelerator" |
---|
| 780 | + depends on ZYNQMP_FIRMWARE || COMPILE_TEST |
---|
| 781 | + select CRYPTO_AES |
---|
| 782 | + select CRYPTO_ENGINE |
---|
| 783 | + select CRYPTO_AEAD |
---|
| 784 | + help |
---|
| 785 | + Xilinx ZynqMP has AES-GCM engine used for symmetric key |
---|
| 786 | + encryption and decryption. This driver interfaces with AES hw |
---|
| 787 | + accelerator. Select this if you want to use the ZynqMP module |
---|
| 788 | + for AES algorithms. |
---|
| 789 | + |
---|
673 | 790 | config CRYPTO_DEV_MEDIATEK |
---|
674 | 791 | tristate "MediaTek's EIP97 Cryptographic Engine driver" |
---|
675 | 792 | depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST |
---|
676 | | - select CRYPTO_AES |
---|
| 793 | + select CRYPTO_LIB_AES |
---|
677 | 794 | select CRYPTO_AEAD |
---|
678 | | - select CRYPTO_BLKCIPHER |
---|
679 | | - select CRYPTO_CTR |
---|
| 795 | + select CRYPTO_SKCIPHER |
---|
680 | 796 | select CRYPTO_SHA1 |
---|
681 | 797 | select CRYPTO_SHA256 |
---|
682 | 798 | select CRYPTO_SHA512 |
---|
.. | .. |
---|
696 | 812 | depends on MAILBOX |
---|
697 | 813 | default m |
---|
698 | 814 | select CRYPTO_AUTHENC |
---|
699 | | - select CRYPTO_DES |
---|
| 815 | + select CRYPTO_LIB_DES |
---|
700 | 816 | select CRYPTO_MD5 |
---|
701 | 817 | select CRYPTO_SHA1 |
---|
702 | 818 | select CRYPTO_SHA256 |
---|
703 | 819 | select CRYPTO_SHA512 |
---|
704 | 820 | help |
---|
705 | 821 | This driver provides support for Broadcom crypto acceleration using the |
---|
706 | | - Secure Processing Unit (SPU). The SPU driver registers ablkcipher, |
---|
| 822 | + Secure Processing Unit (SPU). The SPU driver registers skcipher, |
---|
707 | 823 | ahash, and aead algorithms with the kernel cryptographic API. |
---|
708 | 824 | |
---|
709 | 825 | source "drivers/crypto/stm32/Kconfig" |
---|
710 | 826 | |
---|
711 | 827 | config CRYPTO_DEV_SAFEXCEL |
---|
712 | 828 | tristate "Inside Secure's SafeXcel cryptographic engine driver" |
---|
713 | | - depends on OF |
---|
714 | | - depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT) |
---|
715 | | - select CRYPTO_AES |
---|
| 829 | + depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM |
---|
| 830 | + select CRYPTO_LIB_AES |
---|
716 | 831 | select CRYPTO_AUTHENC |
---|
717 | | - select CRYPTO_BLKCIPHER |
---|
718 | | - select CRYPTO_DES |
---|
| 832 | + select CRYPTO_SKCIPHER |
---|
| 833 | + select CRYPTO_LIB_DES |
---|
719 | 834 | select CRYPTO_HASH |
---|
720 | 835 | select CRYPTO_HMAC |
---|
721 | 836 | select CRYPTO_MD5 |
---|
722 | 837 | select CRYPTO_SHA1 |
---|
723 | 838 | select CRYPTO_SHA256 |
---|
724 | 839 | select CRYPTO_SHA512 |
---|
| 840 | + select CRYPTO_CHACHA20POLY1305 |
---|
| 841 | + select CRYPTO_SHA3 |
---|
725 | 842 | help |
---|
726 | | - This driver interfaces with the SafeXcel EIP-197 cryptographic engine |
---|
727 | | - designed by Inside Secure. Select this if you want to use CBC/ECB |
---|
728 | | - chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash |
---|
729 | | - algorithms. |
---|
| 843 | + This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic |
---|
| 844 | + engines designed by Inside Secure. It currently accelerates DES, 3DES and |
---|
| 845 | + AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, |
---|
| 846 | + SHA384 and SHA512 hash algorithms for both basic hash and HMAC. |
---|
| 847 | + Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. |
---|
730 | 848 | |
---|
731 | 849 | config CRYPTO_DEV_ARTPEC6 |
---|
732 | 850 | tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." |
---|
.. | .. |
---|
735 | 853 | select CRYPTO_AEAD |
---|
736 | 854 | select CRYPTO_AES |
---|
737 | 855 | select CRYPTO_ALGAPI |
---|
738 | | - select CRYPTO_BLKCIPHER |
---|
| 856 | + select CRYPTO_SKCIPHER |
---|
739 | 857 | select CRYPTO_CTR |
---|
740 | 858 | select CRYPTO_HASH |
---|
741 | 859 | select CRYPTO_SHA1 |
---|
.. | .. |
---|
752 | 870 | depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA |
---|
753 | 871 | default n |
---|
754 | 872 | select CRYPTO_HASH |
---|
755 | | - select CRYPTO_BLKCIPHER |
---|
756 | | - select CRYPTO_DES |
---|
| 873 | + select CRYPTO_SKCIPHER |
---|
| 874 | + select CRYPTO_LIB_DES |
---|
757 | 875 | select CRYPTO_AEAD |
---|
758 | 876 | select CRYPTO_AUTHENC |
---|
759 | 877 | select CRYPTO_SHA1 |
---|
.. | .. |
---|
766 | 884 | select CRYPTO_ECB |
---|
767 | 885 | select CRYPTO_CTR |
---|
768 | 886 | select CRYPTO_XTS |
---|
| 887 | + select CRYPTO_SM4 |
---|
| 888 | + select CRYPTO_SM3 |
---|
769 | 889 | help |
---|
770 | 890 | Say 'Y' to enable a driver for the REE interface of the Arm |
---|
771 | 891 | TrustZone CryptoCell family of processors. Currently the |
---|
772 | | - CryptoCell 712, 710 and 630 are supported. |
---|
| 892 | + CryptoCell 713, 703, 712, 710 and 630 are supported. |
---|
773 | 893 | Choose this if you wish to use hardware acceleration of |
---|
774 | 894 | cryptographic operations on the system REE. |
---|
775 | 895 | If unsure say Y. |
---|
776 | 896 | |
---|
777 | 897 | source "drivers/crypto/hisilicon/Kconfig" |
---|
778 | 898 | |
---|
| 899 | +source "drivers/crypto/amlogic/Kconfig" |
---|
| 900 | + |
---|
| 901 | +config CRYPTO_DEV_SA2UL |
---|
| 902 | + tristate "Support for TI security accelerator" |
---|
| 903 | + depends on ARCH_K3 || COMPILE_TEST |
---|
| 904 | + select ARM64_CRYPTO |
---|
| 905 | + select CRYPTO_AES |
---|
| 906 | + select CRYPTO_AES_ARM64 |
---|
| 907 | + select CRYPTO_ALGAPI |
---|
| 908 | + select CRYPTO_AUTHENC |
---|
| 909 | + select CRYPTO_DES |
---|
| 910 | + select CRYPTO_SHA1 |
---|
| 911 | + select CRYPTO_SHA256 |
---|
| 912 | + select CRYPTO_SHA512 |
---|
| 913 | + select HW_RANDOM |
---|
| 914 | + select SG_SPLIT |
---|
| 915 | + help |
---|
| 916 | + K3 devices include a security accelerator engine that may be |
---|
| 917 | + used for crypto offload. Select this if you want to use hardware |
---|
| 918 | + acceleration for cryptographic algorithms on these devices. |
---|
| 919 | + |
---|
779 | 920 | endif # CRYPTO_HW |
---|