.. | .. |
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189 | 189 | init.num_parents = of_clk_get_parent_count(node); |
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190 | 190 | |
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191 | 191 | if (init.num_parents != 1) { |
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192 | | - pr_err("%s: atl clock %s must have 1 parent\n", __func__, |
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193 | | - node->name); |
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| 192 | + pr_err("%s: atl clock %pOFn must have 1 parent\n", __func__, |
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| 193 | + node); |
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194 | 194 | goto cleanup; |
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195 | 195 | } |
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196 | 196 | |
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.. | .. |
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233 | 233 | cinfo->iobase = of_iomap(node, 0); |
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234 | 234 | cinfo->dev = &pdev->dev; |
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235 | 235 | pm_runtime_enable(cinfo->dev); |
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236 | | - pm_runtime_irq_safe(cinfo->dev); |
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237 | 236 | |
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238 | 237 | pm_runtime_get_sync(cinfo->dev); |
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239 | 238 | atl_write(cinfo, DRA7_ATL_PCLKMUX_REG(0), DRA7_ATL_PCLKMUX); |
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.. | .. |
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252 | 251 | if (rc) { |
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253 | 252 | pr_err("%s: failed to lookup atl clock %d\n", __func__, |
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254 | 253 | i); |
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255 | | - return -EINVAL; |
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| 254 | + ret = -EINVAL; |
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| 255 | + goto pm_put; |
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256 | 256 | } |
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257 | 257 | |
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258 | 258 | clk = of_clk_get_from_provider(&clkspec); |
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259 | 259 | if (IS_ERR(clk)) { |
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260 | 260 | pr_err("%s: failed to get atl clock %d from provider\n", |
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261 | 261 | __func__, i); |
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262 | | - return PTR_ERR(clk); |
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| 262 | + ret = PTR_ERR(clk); |
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| 263 | + goto pm_put; |
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263 | 264 | } |
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264 | 265 | |
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265 | 266 | cdesc = to_atl_desc(__clk_get_hw(clk)); |
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.. | .. |
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292 | 293 | if (cdesc->enabled) |
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293 | 294 | atl_clk_enable(__clk_get_hw(clk)); |
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294 | 295 | } |
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295 | | - pm_runtime_put_sync(cinfo->dev); |
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296 | 296 | |
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| 297 | +pm_put: |
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| 298 | + pm_runtime_put_sync(cinfo->dev); |
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297 | 299 | return ret; |
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298 | 300 | } |
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299 | 301 | |
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