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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/drivers/clk/st/clkgen-pll.c
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@@ -1,11 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Copyright (C) 2014 STMicroelectronics (R&D) Limited
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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  */
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 /*
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@@ -65,19 +60,6 @@
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 static const struct clk_ops stm_pll3200c32_ops;
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 static const struct clk_ops stm_pll3200c32_a9_ops;
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 static const struct clk_ops stm_pll4600c28_ops;
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-
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-static const struct clkgen_pll_data st_pll3200c32_407_a0 = {
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-	/* 407 A0 */
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-	.pdn_status	= CLKGEN_FIELD(0x2a0,	0x1,			8),
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-	.pdn_ctrl	= CLKGEN_FIELD(0x2a0,	0x1,			8),
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-	.locked_status	= CLKGEN_FIELD(0x2a0,	0x1,			24),
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-	.ndiv		= CLKGEN_FIELD(0x2a4,	C32_NDIV_MASK,		16),
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-	.idf		= CLKGEN_FIELD(0x2a4,	C32_IDF_MASK,		0x0),
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-	.num_odfs = 1,
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-	.odf		= { CLKGEN_FIELD(0x2b4, C32_ODF_MASK,		0) },
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-	.odf_gate	= { CLKGEN_FIELD(0x2b4,	0x1,			6) },
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-	.ops		= &stm_pll3200c32_ops,
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-};
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 static const struct clkgen_pll_data st_pll3200c32_cx_0 = {
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 	/* 407 C0 PLL0 */
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@@ -604,7 +586,7 @@
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 {
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 	struct clkgen_pll *pll;
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 	struct clk *clk;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);
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 	if (!pll)
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@@ -613,7 +595,7 @@
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 	init.name = clk_name;
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 	init.ops = pll_data->ops;
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-	init.flags = pll_flags | CLK_IS_BASIC | CLK_GET_RATE_NOCACHE;
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+	init.flags = pll_flags | CLK_GET_RATE_NOCACHE;
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 	init.parent_names = &parent_name;
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 	init.num_parents  = 1;
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