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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/drivers/clk/mmp/clk.h
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@@ -3,6 +3,7 @@
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 #define __MACH_MMP_CLK_H
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 #include <linux/clk-provider.h>
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+#include <linux/pm_domain.h>
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 #include <linux/clkdev.h>
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 #define APBC_NO_BUS_CTRL	BIT(0)
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@@ -16,6 +17,7 @@
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 	unsigned int den_mask;
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 	unsigned int num_shift;
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 	unsigned int den_shift;
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+	unsigned int enable_mask;
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 };
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 struct mmp_clk_factor_tbl {
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@@ -97,7 +99,7 @@
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 extern const struct clk_ops mmp_clk_mix_ops;
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 extern struct clk *mmp_clk_register_mix(struct device *dev,
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 					const char *name,
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-					const char **parent_names,
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+					const char * const *parent_names,
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 					u8 num_parents,
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 					unsigned long flags,
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 					struct mmp_clk_mix_config *config,
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@@ -124,9 +126,6 @@
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 			u32 val_disable, unsigned int gate_flags,
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 			spinlock_t *lock);
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-
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-extern struct clk *mmp_clk_register_pll2(const char *name,
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-		const char *parent_name, unsigned long flags);
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 extern struct clk *mmp_clk_register_apbc(const char *name,
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 		const char *parent_name, void __iomem *base,
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 		unsigned int delay, unsigned int apbc_flags, spinlock_t *lock);
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@@ -196,7 +195,7 @@
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 struct mmp_param_mux_clk {
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 	unsigned int id;
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 	char *name;
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-	const char **parent_name;
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+	const char * const *parent_name;
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 	u8 num_parents;
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 	unsigned long flags;
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 	unsigned long offset;
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@@ -224,6 +223,23 @@
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 			struct mmp_param_div_clk *clks,
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 			void __iomem *base, int size);
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+struct mmp_param_pll_clk {
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+	unsigned int id;
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+	char *name;
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+	unsigned long default_rate;
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+	unsigned long enable_offset;
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+	u32 enable;
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+	unsigned long offset;
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+	u8 shift;
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+	/* MMP3 specific: */
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+	unsigned long input_rate;
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+	unsigned long postdiv_offset;
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+	unsigned long postdiv_shift;
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+};
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+void mmp_register_pll_clks(struct mmp_clk_unit *unit,
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+			struct mmp_param_pll_clk *clks,
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+			void __iomem *base, int size);
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+
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 #define DEFINE_MIX_REG_INFO(w_d, s_d, w_m, s_m, fc)	\
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 {							\
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 	.width_div = (w_d),				\
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@@ -237,4 +253,13 @@
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 		int nr_clks);
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 void mmp_clk_add(struct mmp_clk_unit *unit, unsigned int id,
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 		struct clk *clk);
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+
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+/* Power islands */
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+#define MMP_PM_DOMAIN_NO_DISABLE		BIT(0)
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+
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+struct generic_pm_domain *mmp_pm_domain_register(const char *name,
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+		void __iomem *reg,
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+		u32 power_on, u32 reset, u32 clock_enable,
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+		unsigned int flags, spinlock_t *lock);
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+
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 #endif