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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/drivers/clk/at91/clk-programmable.c
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..
@@ -1,11 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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  */
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5
 
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 #include <linux/clk-provider.h>
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..
@@ -17,23 +12,16 @@
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12
 
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 #include "pmc.h"
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14
 
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-#define PROG_SOURCE_MAX		5
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 #define PROG_ID_MAX		7
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 #define PROG_STATUS_MASK(id)	(1 << ((id) + 8))
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-#define PROG_PRES_MASK		0x7
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-#define PROG_PRES(layout, pckr)	((pckr >> layout->pres_shift) & PROG_PRES_MASK)
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+#define PROG_PRES(layout, pckr)	((pckr >> layout->pres_shift) & layout->pres_mask)
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 #define PROG_MAX_RM9200_CSS	3
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-
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-struct clk_programmable_layout {
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-	u8 pres_shift;
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-	u8 css_mask;
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-	u8 have_slck_mck;
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-};
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 struct clk_programmable {
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 	struct clk_hw hw;
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 	struct regmap *regmap;
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+	u32 *mux_table;
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 	u8 id;
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 	const struct clk_programmable_layout *layout;
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 };
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@@ -44,20 +32,29 @@
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 						  unsigned long parent_rate)
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 {
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 	struct clk_programmable *prog = to_clk_programmable(hw);
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+	const struct clk_programmable_layout *layout = prog->layout;
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 	unsigned int pckr;
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+	unsigned long rate;
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 	regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), &pckr);
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40
 
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-	return parent_rate >> PROG_PRES(prog->layout, pckr);
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+	if (layout->is_pres_direct)
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+		rate = parent_rate / (PROG_PRES(layout, pckr) + 1);
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+	else
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+		rate = parent_rate >> PROG_PRES(layout, pckr);
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+
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+	return rate;
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 }
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48
 
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 static int clk_programmable_determine_rate(struct clk_hw *hw,
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 					   struct clk_rate_request *req)
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 {
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+	struct clk_programmable *prog = to_clk_programmable(hw);
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+	const struct clk_programmable_layout *layout = prog->layout;
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 	struct clk_hw *parent;
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 	long best_rate = -EINVAL;
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 	unsigned long parent_rate;
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-	unsigned long tmp_rate;
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+	unsigned long tmp_rate = 0;
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 	int shift;
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 	int i;
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@@ -67,10 +64,18 @@
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64
 			continue;
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65
 
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 		parent_rate = clk_hw_get_rate(parent);
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-		for (shift = 0; shift < PROG_PRES_MASK; shift++) {
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-			tmp_rate = parent_rate >> shift;
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-			if (tmp_rate <= req->rate)
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-				break;
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+		if (layout->is_pres_direct) {
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+			for (shift = 0; shift <= layout->pres_mask; shift++) {
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+				tmp_rate = parent_rate / (shift + 1);
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+				if (tmp_rate <= req->rate)
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+					break;
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+			}
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+		} else {
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+			for (shift = 0; shift < layout->pres_mask; shift++) {
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+				tmp_rate = parent_rate >> shift;
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+				if (tmp_rate <= req->rate)
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+					break;
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+			}
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 		}
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 		if (tmp_rate > req->rate)
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@@ -104,6 +109,9 @@
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 	if (layout->have_slck_mck)
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 		mask |= AT91_PMC_CSSMCK_MCK;
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+	if (prog->mux_table)
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+		pckr = clk_mux_index_to_val(prog->mux_table, 0, index);
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+
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 	if (index > layout->css_mask) {
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 		if (index > PROG_MAX_RM9200_CSS && !layout->have_slck_mck)
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 			return -EINVAL;
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@@ -130,6 +138,9 @@
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 	if (layout->have_slck_mck && (pckr & AT91_PMC_CSSMCK_MCK) && !ret)
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 		ret = PROG_MAX_RM9200_CSS + 1;
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+	if (prog->mux_table)
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+		ret = clk_mux_val_to_index(&prog->hw, prog->mux_table, 0, ret);
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+
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 	return ret;
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 }
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@@ -139,24 +150,28 @@
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 	struct clk_programmable *prog = to_clk_programmable(hw);
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 	const struct clk_programmable_layout *layout = prog->layout;
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 	unsigned long div = parent_rate / rate;
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-	unsigned int pckr;
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 	int shift = 0;
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-
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-	regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), &pckr);
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154
 
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 	if (!div)
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 		return -EINVAL;
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-	shift = fls(div) - 1;
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+	if (layout->is_pres_direct) {
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+		shift = div - 1;
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160
 
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-	if (div != (1 << shift))
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-		return -EINVAL;
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+		if (shift > layout->pres_mask)
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+			return -EINVAL;
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+	} else {
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+		shift = fls(div) - 1;
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-	if (shift >= PROG_PRES_MASK)
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-		return -EINVAL;
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+		if (div != (1 << shift))
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+			return -EINVAL;
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+
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+		if (shift >= layout->pres_mask)
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+			return -EINVAL;
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+	}
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 	regmap_update_bits(prog->regmap, AT91_PMC_PCKR(prog->id),
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-			   PROG_PRES_MASK << layout->pres_shift,
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+			   layout->pres_mask << layout->pres_shift,
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 			   shift << layout->pres_shift);
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 	return 0;
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@@ -170,15 +185,16 @@
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 	.set_rate = clk_programmable_set_rate,
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186
 };
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187
 
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-static struct clk_hw * __init
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+struct clk_hw * __init
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189
 at91_clk_register_programmable(struct regmap *regmap,
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 			       const char *name, const char **parent_names,
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 			       u8 num_parents, u8 id,
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-			       const struct clk_programmable_layout *layout)
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+			       const struct clk_programmable_layout *layout,
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+			       u32 *mux_table)
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 {
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 	struct clk_programmable *prog;
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 	struct clk_hw *hw;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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 	int ret;
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 	if (id > PROG_ID_MAX)
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@@ -198,6 +214,7 @@
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 	prog->layout = layout;
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 	prog->hw.init = &init;
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 	prog->regmap = regmap;
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+	prog->mux_table = mux_table;
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 	hw = &prog->hw;
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 	ret = clk_hw_register(NULL, &prog->hw);
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@@ -211,86 +228,26 @@
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 	return hw;
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 }
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-static const struct clk_programmable_layout at91rm9200_programmable_layout = {
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+const struct clk_programmable_layout at91rm9200_programmable_layout = {
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+	.pres_mask = 0x7,
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 	.pres_shift = 2,
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 	.css_mask = 0x3,
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 	.have_slck_mck = 0,
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+	.is_pres_direct = 0,
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 };
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-static const struct clk_programmable_layout at91sam9g45_programmable_layout = {
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+const struct clk_programmable_layout at91sam9g45_programmable_layout = {
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+	.pres_mask = 0x7,
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 	.pres_shift = 2,
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 	.css_mask = 0x3,
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 	.have_slck_mck = 1,
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+	.is_pres_direct = 0,
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 };
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246
 
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-static const struct clk_programmable_layout at91sam9x5_programmable_layout = {
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+const struct clk_programmable_layout at91sam9x5_programmable_layout = {
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+	.pres_mask = 0x7,
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 	.pres_shift = 4,
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 	.css_mask = 0x7,
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 	.have_slck_mck = 0,
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+	.is_pres_direct = 0,
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 };
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-
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-static void __init
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-of_at91_clk_prog_setup(struct device_node *np,
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-		       const struct clk_programmable_layout *layout)
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-{
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-	int num;
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-	u32 id;
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-	struct clk_hw *hw;
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-	unsigned int num_parents;
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-	const char *parent_names[PROG_SOURCE_MAX];
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-	const char *name;
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-	struct device_node *progclknp;
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-	struct regmap *regmap;
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-
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-	num_parents = of_clk_get_parent_count(np);
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-	if (num_parents == 0 || num_parents > PROG_SOURCE_MAX)
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-		return;
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-
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-	of_clk_parent_fill(np, parent_names, num_parents);
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-
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-	num = of_get_child_count(np);
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-	if (!num || num > (PROG_ID_MAX + 1))
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-		return;
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-
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-	regmap = syscon_node_to_regmap(of_get_parent(np));
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-	if (IS_ERR(regmap))
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-		return;
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-
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-	for_each_child_of_node(np, progclknp) {
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-		if (of_property_read_u32(progclknp, "reg", &id))
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-			continue;
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-
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-		if (of_property_read_string(np, "clock-output-names", &name))
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-			name = progclknp->name;
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-
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-		hw = at91_clk_register_programmable(regmap, name,
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-						     parent_names, num_parents,
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-						     id, layout);
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-		if (IS_ERR(hw))
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-			continue;
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-
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-		of_clk_add_hw_provider(progclknp, of_clk_hw_simple_get, hw);
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-	}
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-}
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-
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-
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-static void __init of_at91rm9200_clk_prog_setup(struct device_node *np)
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-{
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-	of_at91_clk_prog_setup(np, &at91rm9200_programmable_layout);
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-}
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-CLK_OF_DECLARE(at91rm9200_clk_prog, "atmel,at91rm9200-clk-programmable",
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-	       of_at91rm9200_clk_prog_setup);
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-
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-static void __init of_at91sam9g45_clk_prog_setup(struct device_node *np)
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-{
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-	of_at91_clk_prog_setup(np, &at91sam9g45_programmable_layout);
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-}
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-CLK_OF_DECLARE(at91sam9g45_clk_prog, "atmel,at91sam9g45-clk-programmable",
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-	       of_at91sam9g45_clk_prog_setup);
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-
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-static void __init of_at91sam9x5_clk_prog_setup(struct device_node *np)
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-{
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-	of_at91_clk_prog_setup(np, &at91sam9x5_programmable_layout);
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-}
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-CLK_OF_DECLARE(at91sam9x5_clk_prog, "atmel,at91sam9x5-clk-programmable",
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-	       of_at91sam9x5_clk_prog_setup);